@phdthesis{poss12,
	Abstract = {Multi-core chips are currently in the spotlight as a potential means to overcome the limits of frequency scaling for performance increases in processors. In this direction, the CSA group at the University of Amsterdam is investigating a new design for processors towards faster and more efficient general-purpose multi-core chips. However this design changes the interface between the hardware and software, compared to existing chips, in ways that have not been dared previously. Consequently, the concepts underlying existing operating systems and compilers must be adapted before this new design can be fully integrated and evaluated in computing systems.
This dissertation investigates the impact of the changes in the machine interface on operating software and makes four contributions. The first contribution is a comprehensive presentation of the design proposed by the CSA group. The second contribution is formed by technology that demonstrates that the chip can be programmed using standard programming tools. The third contribution is a demonstration that the hardware components can be optimized by starting to implement operating software during the hardware design instead of afterwards. The fourth contribution is an analysis of which parts of the hardware design will require further improvements before it can be fully accepted as a general- purpose platform. The first conclusion is a confirmation that the specific design considered can yield higher performance at lower cost with relatively minimal implementation effort in software. The second conclusion is that the processor interface can be redefined while designing multi-core chips as long as the design work is carried out hand in hand with operating software providers.},
	Author = {Poss, {Raphael `kena'}},


	Doi = {11245/2.109482}, Urldoi = {http://dx.doi.org/11245/2.109482},
	Isbn = {978-94-6108-320-3},
	Month = {September},
	Publisher = {Gildeprint Drukkerijen},
	Read = {1},
	School = {University of Amsterdam},
	Title = {On the realizability of hardware microthreading---Revisting the general-purpose processor interface: consequences and challenges},
	Url = {http://www.raphael.poss.name/on-the-realizability-of-hardware-microthreading/},
	Year = {2012},
	}

{"_id":{"_str":"522f496baa2f288d1f0030ec"},"__v":3,"authorIDs":["54c2dea9b5fb1e5511000919","5dfafc26fa2bbbde01000122","5e35eb445cd57fde01000070","5e38ff13dc5b8ade01000077","5e64a5962551dede01000063","ZGRaLkjmxPcmJ739z","efnDKftzuGYiXXauW","pgjx6rQxQDmzHuwRK","sCob7zjTXbp95CmbP"],"author_short":["Poss, R."],"bibbaseid":"poss-ontherealizabilityofhardwaremicrothreadingrevistingthegeneralpurposeprocessorinterfaceconsequencesandchallenges-2012","bibdata":{"bibtype":"phdthesis","type":"phdthesis","abstract":"Multi-core chips are currently in the spotlight as a potential means to overcome the limits of frequency scaling for performance increases in processors. In this direction, the CSA group at the University of Amsterdam is investigating a new design for processors towards faster and more efficient general-purpose multi-core chips. However this design changes the interface between the hardware and software, compared to existing chips, in ways that have not been dared previously. Consequently, the concepts underlying existing operating systems and compilers must be adapted before this new design can be fully integrated and evaluated in computing systems. This dissertation investigates the impact of the changes in the machine interface on operating software and makes four contributions. The first contribution is a comprehensive presentation of the design proposed by the CSA group. The second contribution is formed by technology that demonstrates that the chip can be programmed using standard programming tools. The third contribution is a demonstration that the hardware components can be optimized by starting to implement operating software during the hardware design instead of afterwards. The fourth contribution is an analysis of which parts of the hardware design will require further improvements before it can be fully accepted as a general- purpose platform. The first conclusion is a confirmation that the specific design considered can yield higher performance at lower cost with relatively minimal implementation effort in software. The second conclusion is that the processor interface can be redefined while designing multi-core chips as long as the design work is carried out hand in hand with operating software providers.","author":[{"propositions":[],"lastnames":["Poss"],"firstnames":["Raphael `kena'"],"suffixes":[]}],"doi":"11245/2.109482","urldoi":"http://dx.doi.org/11245/2.109482","isbn":"978-94-6108-320-3","month":"September","publisher":"Gildeprint Drukkerijen","read":"1","school":"University of Amsterdam","title":"On the realizability of hardware microthreading—Revisting the general-purpose processor interface: consequences and challenges","url":"http://www.raphael.poss.name/on-the-realizability-of-hardware-microthreading/","year":"2012","bibtex":"@phdthesis{poss12,\n\tAbstract = {Multi-core chips are currently in the spotlight as a potential means to overcome the limits of frequency scaling for performance increases in processors. In this direction, the CSA group at the University of Amsterdam is investigating a new design for processors towards faster and more efficient general-purpose multi-core chips. However this design changes the interface between the hardware and software, compared to existing chips, in ways that have not been dared previously. Consequently, the concepts underlying existing operating systems and compilers must be adapted before this new design can be fully integrated and evaluated in computing systems.\nThis dissertation investigates the impact of the changes in the machine interface on operating software and makes four contributions. The first contribution is a comprehensive presentation of the design proposed by the CSA group. The second contribution is formed by technology that demonstrates that the chip can be programmed using standard programming tools. The third contribution is a demonstration that the hardware components can be optimized by starting to implement operating software during the hardware design instead of afterwards. The fourth contribution is an analysis of which parts of the hardware design will require further improvements before it can be fully accepted as a general- purpose platform. The first conclusion is a confirmation that the specific design considered can yield higher performance at lower cost with relatively minimal implementation effort in software. The second conclusion is that the processor interface can be redefined while designing multi-core chips as long as the design work is carried out hand in hand with operating software providers.},\n\tAuthor = {Poss, {Raphael `kena'}},\n\n\n\tDoi = {11245/2.109482}, Urldoi = {http://dx.doi.org/11245/2.109482},\n\tIsbn = {978-94-6108-320-3},\n\tMonth = {September},\n\tPublisher = {Gildeprint Drukkerijen},\n\tRead = {1},\n\tSchool = {University of Amsterdam},\n\tTitle = {On the realizability of hardware microthreading---Revisting the general-purpose processor interface: consequences and challenges},\n\tUrl = {http://www.raphael.poss.name/on-the-realizability-of-hardware-microthreading/},\n\tYear = {2012},\n\t}\n\n","author_short":["Poss, R."],"key":"poss12","id":"poss12","bibbaseid":"poss-ontherealizabilityofhardwaremicrothreadingrevistingthegeneralpurposeprocessorinterfaceconsequencesandchallenges-2012","role":"author","urls":{"Doi":"http://dx.doi.org/11245/2.109482","Paper":"http://www.raphael.poss.name/on-the-realizability-of-hardware-microthreading/"},"metadata":{"authorlinks":{"poss, r":"https://bibbase.org/show?bib=https%3A%2F%2Fscience.raphael.poss.name%2Fpub.bib"}}},"bibtype":"phdthesis","biburl":"http://science.raphael.poss.name/pub.bib","downloads":1,"keywords":[],"search_terms":["realizability","hardware","microthreading","revisting","general","purpose","processor","interface","consequences","challenges","poss"],"title":"On the realizability of hardware microthreading—Revisting the general-purpose processor interface: consequences and challenges","title_words":["realizability","hardware","microthreading","revisting","general","purpose","processor","interface","consequences","challenges"],"year":2012,"dataSources":["75cdFjzQkYc9cKbYS","ibJp9P4KitKPT3bh2","vwHwD5AQxBhRxMsmz","nMjrEFThibKqpZt4n","ob9Lo6tki9nBzzxK9"]}