@article{
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@article{
 title = {Declarative Guide Creation},
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@article{
 title = {Asymptotic Computing – Undoing the Damage},
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 year = {2017},
 pages = {55 - 73},
 volume = {30},
 publisher = {IOS Press},
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 abstract = {While the very far future well beyond exaflops computing may encompass such paradigm shifts as quantum computing or neuromorphic computing, a critical window of change exists within the domain of semiconductor digital logic technology but beyond conventional practices of architecture, system software, and programming. As key parameters such as Dennard scaling, nano-scale component densities, clock rates, pin I/O, and voltage represent asymptotic operational regimes, one major area of untapped opportunity is computer architecture which has been severely limited by conventional practices of organization and control semantics. Mainstream computer architecture in HPC has been inhibited in innovation by the original von Neumann architecture of seven decades ago. Although notably diverse in form of parallelism exploited, six major epochs of computer architecture through to the present are all von Neumann derivatives. At their core is the use of single instruction issue and the prioritization of Floating Point ALU (FPU) utilization. However, in the modern age, FPUs consume only a small part of die real estate while the plethora of mechanisms to achieve maximum floating point efficiency take up the majority of the chip. The von Neumann bottleneck, the separation of memory and processor, is also retained. A revolution in computer architecture design is possible by undoing the damage of the von Neumann heritage and emphasizing the key challenges of data movement latency and bandwidth which are the true precious resources along with operation/instruction issue control. This paper discusses key tradeoffs that should drive computer architecture in what might be called the “Neo-Digital Age”.},
 bibtype = {article},
 author = {Sterling, Thomas and Brodowicz, Maciej and Kogler, Danny and Anderson, Matthew},
 doi = {10.3233/978-1-61499-816-7-55},
 journal = {New Frontiers in High Performance Computing and Big Data}
}

While the very far future well beyond exaflops computing may encompass such paradigm shifts as quantum computing or neuromorphic computing, a critical window of change exists within the domain of semiconductor digital logic technology but beyond conventional practices of architecture, system software, and programming. As key parameters such as Dennard scaling, nano-scale component densities, clock rates, pin I/O, and voltage represent asymptotic operational regimes, one major area of untapped opportunity is computer architecture which has been severely limited by conventional practices of organization and control semantics. Mainstream computer architecture in HPC has been inhibited in innovation by the original von Neumann architecture of seven decades ago. Although notably diverse in form of parallelism exploited, six major epochs of computer architecture through to the present are all von Neumann derivatives. At their core is the use of single instruction issue and the prioritization of Floating Point ALU (FPU) utilization. However, in the modern age, FPUs consume only a small part of die real estate while the plethora of mechanisms to achieve maximum floating point efficiency take up the majority of the chip. The von Neumann bottleneck, the separation of memory and processor, is also retained. A revolution in computer architecture design is possible by undoing the damage of the von Neumann heritage and emphasizing the key challenges of data movement latency and bandwidth which are the true precious resources along with operation/instruction issue control. This paper discusses key tradeoffs that should drive computer architecture in what might be called the “Neo-Digital Age”.

@article{
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@inproceedings{
 title = {Facilitating Visualization Capacity Building},
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 pages = {156},
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 booktitle = {Proceedings of the 9th International Symposium on Visual Information Communication and Interaction}
}

@inproceedings{
 title = {Epoch Persistence: Safe, efficient, on-demand rendering for streaming data},
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}

@inproceedings{
 title = {Dynamic parallelism for simple and efficient gpu graph algorithms},
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@inproceedings{
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}

@inproceedings{
 title = {Dynamic Adaptation for Elastic System Services Using Virtual Servers},
 type = {inproceedings},
 year = {2015},
 pages = {125-134},
 publisher = {IEEE},
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}

@inproceedings{
 title = {Pixel-oriented techniques for visualizing next-generation HPC systems},
 type = {inproceedings},
 year = {2015},
 pages = {160-164},
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 author = {Cottam, Joseph and Martin, Ben and Dalessandro, Luke and Lumsdaine, Andrew},
 booktitle = {Software Visualization (VISSOFT), 2015 IEEE 3rd Working Conference on}
}

@article{
 title = {A dynamic execution model applied to distributed collision detection},
 type = {article},
 year = {2014},
 keywords = {Collision detection,Collision detection algorithm,Computer aided design,Concurrent threads,Distributed Memory,Dynamic management,Execution strategies,Global address spaces,Programming methodology,Scalability},
 pages = {470-477},
 volume = {8488 LNCS},
 websites = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-84903716715&doi=10.1007%2F978-3-319-07518-1_32&partnerID=40&md5=7d9007c6ad13f01ea4e2774ea551e1b3,https://www.scopus.com/inward/record.uri?eid=2-s2.0-84903795511&doi=10.1007%2F978-3-319-07518-1-32&partner},
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 notes = {cited By 1; Conference of 29th International Supercomputing Conference, ISC 2014 ; Conference Date: 22 June 2014 Through 26 June 2014; Conference Code:105925},
 private_publication = {false},
 abstract = {The end of Dennard scaling and the looming Exascale challenges of efficiency, reliability, and scalability are driving a shift in programming methodologies away from conventional practices towards dynamic runtimes and asynchronous, data driven execution. Since Exascale machines are not yet available, however, experimental runtime systems and application co-design can expose application-specific overhead and scalability concerns at extreme scale, while also investigating the execution model defined by the runtime system itself. Such results may also contribute to the development of effective Exascale hardware. This work presents a case study evaluating a dynamic, Exascale-inspired execution model and its associated experimental runtime system consisting of lightweight concurrent threads with dynamic management in the context of a global address space examining the problem of mesh collision detection. This type of problem constitutes an essential component of many CAD systems and industrial crash applications. The core of the algorithm depends upon determining if two triangles intersect in three dimensions for large meshes. The resulting collision detection algorithm exploits distributed memory to enable extremely large mesh simulation and is shown to be scalable thereby lending support to the execution strategy. © 2014 Springer International Publishing.},
 bibtype = {article},
 author = {Anderson, M and Brodowicz, M and Dalessandro, L and DeBuhr, J and Sterling, T},
 doi = {10.1007/978-3-319-07518-1-32},
 journal = {Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)}
}

The end of Dennard scaling and the looming Exascale challenges of efficiency, reliability, and scalability are driving a shift in programming methodologies away from conventional practices towards dynamic runtimes and asynchronous, data driven execution. Since Exascale machines are not yet available, however, experimental runtime systems and application co-design can expose application-specific overhead and scalability concerns at extreme scale, while also investigating the execution model defined by the runtime system itself. Such results may also contribute to the development of effective Exascale hardware. This work presents a case study evaluating a dynamic, Exascale-inspired execution model and its associated experimental runtime system consisting of lightweight concurrent threads with dynamic management in the context of a global address space examining the problem of mesh collision detection. This type of problem constitutes an essential component of many CAD systems and industrial crash applications. The core of the algorithm depends upon determining if two triangles intersect in three dimensions for large meshes. The resulting collision detection algorithm exploits distributed memory to enable extremely large mesh simulation and is shown to be scalable thereby lending support to the execution strategy. © 2014 Springer International Publishing.

@article{
 title = {SLOWER: A performance model for Exascale computing},
 type = {article},
 year = {2014},
 pages = {42-57},
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@inproceedings{
 title = {Scoping rules on a platter: A framework for understanding and specifying name binding},
 type = {inproceedings},
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 pages = {59-70},
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 booktitle = {Proceedings of the 10th ACM SIGPLAN workshop on Generic programming}
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@article{
 title = {Region-based memory management for GPU programming languages: enabling rich data structures on a spartan host},
 type = {article},
 year = {2014},
 pages = {141-155},
 volume = {49},
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 journal = {ACM SIGPLAN Notices},
 number = {10}
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@inproceedings{
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@inproceedings{
 title = {Abstract rendering: Out-of-core rendering for information visualization},
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 publisher = {International Society for Optics and Photonics},
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@inproceedings{
 title = {Distributed control: priority scheduling for single source shortest paths without synchronization},
 type = {inproceedings},
 year = {2014},
 pages = {17-24},
 publisher = {IEEE Press},
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@article{
 title = {Preserving Data While Rendering},
 type = {article},
 year = {2014},
 volume = {6},
 websites = {http://pjim.newschool.edu/issues/2014/01/pdfs/ParsonsJournalForInformationMapping_Joseph_Cottam.pdf},
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@inproceedings{
 title = {PXFS: A persistent storage model for extreme scale},
 type = {inproceedings},
 year = {2014},
 keywords = {Algorithms; Digital storage; Energy efficiency; Fi,Computational performance; Massively parallels; M,Distributed computer systems},
 pages = {900-906},
 websites = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-84899566905&doi=10.1109%2FICCNC.2014.6785457&partnerID=40&md5=5328204bef92e19ea687fea548b4682d},
 publisher = {IEEE Computer Society},
 city = {Honolulu, HI},
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 hidden = {false},
 citation_key = {Yang2014900},
 source_type = {conference},
 notes = {cited By 1; Conference of 2014 International Conference on Computing, Networking and Communications, ICNC 2014 ; Conference Date: 3 February 2014 Through 6 February 2014; Conference Code:104772},
 private_publication = {false},
 abstract = {The continuing technological progress resulted in sustained increase in the number of transistors per chip as well as improved energy efficiency per FLOPS. This spurred a dramatic growth in aggregate computational performance of the largest supercomputing systems, yielding multiple Petascale implementations deployed in various locations over the world. Unfortunately, these advances did not translate to the required extent into accompanying I/O systems, which primarily saw the improvement in cumulative storage sizes required to match the ever expanding volume of scientific data sets, but little more in terms of architecture or effective access latency. Moreover, while new models of computations are formulated to handle the burden of efficiently structuring the parallel computations in anticipation of the arrival of Exascale systems, a meager progress is observed in the area of storage subsystems. New classes of algorithms developed for massively parallel applications, that gracefully handle the challenges of asynchrony, heavily multithreaded distributed codes, and message-driven computation, must be matched by similar advances in I/O methods and algorithms to produce a well performing and balanced supercomputing system. This paper discusses PXFS, a file system model for persistent objects inspired by the ParalleX model of execution that addresses many of these challenges. An early implementation of PXFS utilizing a well known Orange parallel file system as its back-end via asynchronous I/O layer is also described along with the preliminary performance data. The results show perfect scalability and 3x to 20x times speedup of I/O throughput performance comparing to OrangeFS user interface. Also the PXFS module on OrangeFS with 24 clients sees a 5x to 10x times more throughput than NFS. © 2014 IEEE.},
 bibtype = {inproceedings},
 author = {Yang, S and Brodowicz, M and Ligon III, W B and Kaiser, H},
 doi = {10.1109/ICCNC.2014.6785457},
 booktitle = {2014 International Conference on Computing, Networking and Communications, ICNC 2014}
}

The continuing technological progress resulted in sustained increase in the number of transistors per chip as well as improved energy efficiency per FLOPS. This spurred a dramatic growth in aggregate computational performance of the largest supercomputing systems, yielding multiple Petascale implementations deployed in various locations over the world. Unfortunately, these advances did not translate to the required extent into accompanying I/O systems, which primarily saw the improvement in cumulative storage sizes required to match the ever expanding volume of scientific data sets, but little more in terms of architecture or effective access latency. Moreover, while new models of computations are formulated to handle the burden of efficiently structuring the parallel computations in anticipation of the arrival of Exascale systems, a meager progress is observed in the area of storage subsystems. New classes of algorithms developed for massively parallel applications, that gracefully handle the challenges of asynchrony, heavily multithreaded distributed codes, and message-driven computation, must be matched by similar advances in I/O methods and algorithms to produce a well performing and balanced supercomputing system. This paper discusses PXFS, a file system model for persistent objects inspired by the ParalleX model of execution that addresses many of these challenges. An early implementation of PXFS utilizing a well known Orange parallel file system as its back-end via asynchronous I/O layer is also described along with the preliminary performance data. The results show perfect scalability and 3x to 20x times speedup of I/O throughput performance comparing to OrangeFS user interface. Also the PXFS module on OrangeFS with 24 clients sees a 5x to 10x times more throughput than NFS. © 2014 IEEE.

@article{
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Gaze data collected during program comprehension provides insight into programmers’ thought processes. Manual coding of this data, however, can be tedious and subjective. We de- fine and demonstrate an automated coding scheme for most categories in this workshop’s coding scheme. We discuss potential sources of error when abstracting from fixations to areas of interest and patterns, and consider alternative definitions for some codes. For the high-level Strategy cat- egory, we inform coding decisions with metrics computed over a rolling time window.

@inproceedings{
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@inproceedings{
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@techreport{
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@inproceedings{
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@techreport{
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@inproceedings{
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@inproceedings{
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@inproceedings{
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@article{
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@inproceedings{
 title = {Performance Modeling of Gyrokinetic Toroidal Simulations for a many-tasking runtime system},
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@article{
 title = {Achieving scalability in the presence of Asynchrony for Exascale Computing},
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@inproceedings{
 title = {Tabulated equations of state with a many-tasking execution model},
 type = {inproceedings},
 year = {2013},
 keywords = {Astrophysics,Atomic physics,Distributed paramete,Futures,HPX,Memory overheads,Network latencies,Stars},
 pages = {1691-1699},
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 abstract = {The addition of nuclear and neutrino physics to general relativistic fluid codes allows for a more realistic description of hot nuclear matter in neutron star and black hole systems. This additional microphysics requires that each processor have access to large tables of data, such as equations of state, and in large simulations, the memory required to store these tables locally can become excessive unless an alternative execution model is used. In this work we present relativistic fluid evolutions of a neutron star obtained using a message driven multi-threaded execution model known as ParalleX. The goal of this work is to reduce the negative performance impact of distributing the tables. We introduce a component based on the notion of a future, or no blocking encapsulated delayed computation, for accessing large tables of data, including out of-core sized tables. The proposed technique does not impose substantial memory overhead and can hide increased network latency. © 2013 IEEE.},
 bibtype = {inproceedings},
 author = {Anderson, Matthew and Brodowicz, Maciej and Sterling, Thomas and Kaiser, Hartmut and Adelstein-Lelbach, Bryce},
 doi = {10.1109/IPDPSW.2013.162},
 booktitle = {Proceedings - IEEE 27th International Parallel and Distributed Processing Symposium Workshops and PhD Forum, IPDPSW 2013}
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The addition of nuclear and neutrino physics to general relativistic fluid codes allows for a more realistic description of hot nuclear matter in neutron star and black hole systems. This additional microphysics requires that each processor have access to large tables of data, such as equations of state, and in large simulations, the memory required to store these tables locally can become excessive unless an alternative execution model is used. In this work we present relativistic fluid evolutions of a neutron star obtained using a message driven multi-threaded execution model known as ParalleX. The goal of this work is to reduce the negative performance impact of distributing the tables. We introduce a component based on the notion of a future, or no blocking encapsulated delayed computation, for accessing large tables of data, including out of-core sized tables. The proposed technique does not impose substantial memory overhead and can hide increased network latency. © 2013 IEEE.

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@inproceedings{
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@techreport{
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@article{
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 private_publication = {false},
 bibtype = {article},
 author = {Kulkarni, Abhishek and Ionkov, Latchesar and Lang, Michael and Lumsdaine, Andrew},
 journal = {The International Journal of High Performance Computing Applications},
 number = {2}
}

@inproceedings{
 title = {Overplotting: Unified solutions under abstract rendering},
 type = {inproceedings},
 year = {2013},
 pages = {9-16},
 publisher = {IEEE},
 id = {4bf012e6-6f43-34d8-95bc-fdf8779f74b6},
 created = {2018-03-13T18:36:24.315Z},
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 last_modified = {2018-03-13T18:36:24.315Z},
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 starred = {false},
 authored = {false},
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 hidden = {false},
 citation_key = {Cottam2013a},
 source_type = {CONF},
 private_publication = {false},
 bibtype = {inproceedings},
 author = {Cottam, Joseph and Lumsdaine, Andrew and Wang, Peter},
 booktitle = {Big Data, 2013 IEEE International Conference on}
}

@techreport{
 title = {Compiled MPI: Cost-Effective Exascale Applications Development},
 type = {techreport},
 year = {2012},
 publisher = {Lawrence Livermore National Laboratory (LLNL), Livermore, CA},
 id = {4f376b33-bd3d-3908-a91a-2894c8045398},
 created = {2018-03-13T18:36:20.670Z},
 file_attached = {false},
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 last_modified = {2018-03-13T18:36:20.670Z},
 read = {false},
 starred = {false},
 authored = {false},
 confirmed = {true},
 hidden = {false},
 citation_key = {Bronevetsky2012},
 source_type = {RPRT},
 private_publication = {false},
 bibtype = {techreport},
 author = {Bronevetsky, G and Quinlan, D and Lumsdaine, A and Hoefler, T}
}

@article{
 title = {Declarative parallel programming for GPUs},
 type = {article},
 year = {2012},
 pages = {297-304},
 volume = {22},
 websites = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-84906571206&doi=10.3233%2F978-1-61499-041-3-297&partnerID=40&md5=0be2243f6de06cabbb665055c6c91e57},
 publisher = {IOS Press BV},
 id = {922a268f-30b2-3dc0-a37f-9a1d853c6b33},
 created = {2018-03-13T18:36:20.908Z},
 file_attached = {false},
 profile_id = {42d295c0-0737-38d6-8b43-508cab6ea85d},
 group_id = {be743863-c45b-320e-a8f8-6b8511f39f77},
 last_modified = {2018-03-13T18:36:20.908Z},
 read = {false},
 starred = {false},
 authored = {false},
 confirmed = {true},
 hidden = {false},
 citation_key = {Holk2012297},
 source_type = {article},
 notes = {cited By 2},
 private_publication = {false},
 abstract = {The recent rise in the popularity of Graphics Processing Units (GPUs) has been fueled by software frameworks, such as NVIDIA's Compute Unified Device Architecture (CUDA) and Khronos Group's OpenCL that make GPUs available for general purpose computing. However, CUDA and OpenCL are still low-level approaches that require users to handle details about data layout and movement across levels of memory hierarchy. We propose a declarative approach to coordinating computation and data movement between CPU and GPU, through a domain-specific language that we called Harlan. Not only does a declarative language obviate the need for the programmer to write low-level error-prone boilerplate code, by raising the abstraction of specifying GPU computation it also allows the compiler to optimize data movement and overlap between CPU and GPU computation. By focusing on the 'what', and not the 'how', of data layout, data movement, and computation scheduling, the language eliminates the sources of many programming errors related to correctness and performance. © 2012 The authors and IOS Press. All rights reserved.},
 bibtype = {article},
 author = {Holk, E and Byrd, W and Mahajan, N and Willcock, J and Chauhan, A and Lumsdaine, A},
 doi = {10.3233/978-1-61499-041-3-297},
 journal = {Advances in Parallel Computing}
}

The recent rise in the popularity of Graphics Processing Units (GPUs) has been fueled by software frameworks, such as NVIDIA's Compute Unified Device Architecture (CUDA) and Khronos Group's OpenCL that make GPUs available for general purpose computing. However, CUDA and OpenCL are still low-level approaches that require users to handle details about data layout and movement across levels of memory hierarchy. We propose a declarative approach to coordinating computation and data movement between CPU and GPU, through a domain-specific language that we called Harlan. Not only does a declarative language obviate the need for the programmer to write low-level error-prone boilerplate code, by raising the abstraction of specifying GPU computation it also allows the compiler to optimize data movement and overlap between CPU and GPU computation. By focusing on the 'what', and not the 'how', of data layout, data movement, and computation scheduling, the language eliminates the sources of many programming errors related to correctness and performance. © 2012 The authors and IOS Press. All rights reserved.

@inproceedings{
 title = {Cognitive architectures: A way forward for the psychology of programming},
 type = {inproceedings},
 year = {2012},
 pages = {27-38},
 publisher = {ACM},
 id = {44ea96b4-de99-3f72-a5a5-124404d6a84e},
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 last_modified = {2018-03-13T18:36:20.949Z},
 read = {false},
 starred = {false},
 authored = {false},
 confirmed = {false},
 hidden = {false},
 citation_key = {Hansen2012},
 source_type = {CONF},
 private_publication = {false},
 bibtype = {inproceedings},
 author = {Hansen, Michael E and Lumsdaine, Andrew and Goldstone, Robert L},
 booktitle = {Proceedings of the ACM international symposium on New ideas, new paradigms, and reflections on programming and software}
}

@inproceedings{
 title = {Efficient dynamic data visualization with persistent data structures},
 type = {inproceedings},
 year = {2012},
 keywords = {Data store,Data structures,Data visualization,Dynamic data,Flow visualization,Global maximum,Global s,Visualizatio},
 pages = {82940X},
 volume = {8294},
 websites = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-84856998737&doi=10.1117%2F12.909581&partnerID=40&md5=8e20785ef8530b4b8aac9f7f7189b463},
 city = {Burlingame, CA},
 id = {c4bbf7bb-3f56-3443-befe-c80c01a10c8f},
 created = {2018-03-13T18:36:21.137Z},
 file_attached = {false},
 profile_id = {42d295c0-0737-38d6-8b43-508cab6ea85d},
 group_id = {be743863-c45b-320e-a8f8-6b8511f39f77},
 last_modified = {2018-03-13T18:36:21.137Z},
 read = {false},
 starred = {false},
 authored = {false},
 confirmed = {true},
 hidden = {false},
 citation_key = {Cottam2012},
 source_type = {conference},
 notes = {<b>From Duplicate 2 (<i>Efficient dynamic data visualization with persistent data structures</i> - Cottam, Joseph A; Lumsdaine, Andrew)<br/></b><br/><b>From Duplicate 2 (<i>Efficient dynamic data visualization with persistent data structures</i> - Cottam, J A; Lumsdaine, A)<br/></b><br/>cited By 0; Conference of Visualization and Data Analysis 2012 ; Conference Date: 23 January 2012 Through 25 January 2012; Conference Code:88432},
 private_publication = {false},
 abstract = {Working with data that is changing while it is being worked on, so called "dynamic data", presents unique challenges to a visualization and analysis framework. In particular, making rendering and analysis mutually exclusive can quickly lead to either livelock in the analysis, unresponsive visuals or incorrect results. A framework's data store is a common point of contention that often drives the mutual exclusion. Providing safe, synchronous access to the data store eliminates the livelock scenarios and responsive visuals while maintaining result correctness. Persistent data structures are a technique for providing safe, synchronous access. They support safe, synchronous access by directly supporting multiple versions of the data structure with limited data duplication. With a persistent data structure, rendering acts on one version of the data structure while analysis updates another, effectively double-buffering the central data store. Pre-rendering work based on global state (such as scaling all values relative to the global maximum) is also efficiently treated if independently modified versions can be merged. The Stencil visualization system uses persistent data structures to achieve task-based parallelism between analysis, pre-rendering and rendering work with little synchronization overhead. With efficient persistent data structures, performance gains of several orders of magnitude are achieved. © 2012 SPIE-IS&T.},
 bibtype = {inproceedings},
 author = {Cottam, Joseph A and Lumsdaine, Andrew},
 doi = {10.1117/12.909581},
 booktitle = {Proceedings of SPIE - The International Society for Optical Engineering}
}

Working with data that is changing while it is being worked on, so called "dynamic data", presents unique challenges to a visualization and analysis framework. In particular, making rendering and analysis mutually exclusive can quickly lead to either livelock in the analysis, unresponsive visuals or incorrect results. A framework's data store is a common point of contention that often drives the mutual exclusion. Providing safe, synchronous access to the data store eliminates the livelock scenarios and responsive visuals while maintaining result correctness. Persistent data structures are a technique for providing safe, synchronous access. They support safe, synchronous access by directly supporting multiple versions of the data structure with limited data duplication. With a persistent data structure, rendering acts on one version of the data structure while analysis updates another, effectively double-buffering the central data store. Pre-rendering work based on global state (such as scaling all values relative to the global maximum) is also efficiently treated if independently modified versions can be merged. The Stencil visualization system uses persistent data structures to achieve task-based parallelism between analysis, pre-rendering and rendering work with little synchronization overhead. With efficient persistent data structures, performance gains of several orders of magnitude are achieved. © 2012 SPIE-IS&T.

@techreport{
 title = {Award ER25844: Minimizing System Noise Effects for Extreme-Scale Scientific Simulation Through Function Delegation},
 type = {techreport},
 year = {2012},
 publisher = {Indiana University, Bloomington, IN},
 id = {1487a1aa-a7f3-3a35-8d45-18ba112af454},
 created = {2018-03-13T18:36:21.242Z},
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 citation_key = {Lumsdaine2012a},
 source_type = {RPRT},
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 bibtype = {techreport},
 author = {Lumsdaine, Andrew}
}

@inproceedings{
 title = {Towards a new execution model for HPC clouds},
 type = {inproceedings},
 year = {2012},
 keywords = {Adaptive mesh refinement; Capability computing; Co,Computation theory,Semantics,and mathematics; Throughput computing,engineering,technology},
 websites = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-84887446790&partnerID=40&md5=90d2dd8a4c734a6b533b127e7901276e},
 city = {Taipei},
 id = {92ef4462-7e5b-32eb-9881-03994fbc1be5},
 created = {2018-03-13T18:36:21.335Z},
 file_attached = {false},
 profile_id = {42d295c0-0737-38d6-8b43-508cab6ea85d},
 group_id = {be743863-c45b-320e-a8f8-6b8511f39f77},
 last_modified = {2018-03-13T18:36:21.335Z},
 read = {false},
 starred = {false},
 authored = {false},
 confirmed = {true},
 hidden = {false},
 citation_key = {Sterling2012},
 source_type = {conference},
 notes = {cited By 0; Conference of 2012 International Symposium on Grids and Clouds, ISGC 2012 ; Conference Date: 26 February 2012 Through 2 March 2012; Conference Code:100658},
 private_publication = {false},
 abstract = {The application of emergent Clouds to the domain of high performance computing is considered by examining the various operational modalities comprising the field of supercomputing and by analyzing their suitability to Clouds based on underlying factors of performance degradation. It is found that while throughput computing may be readily supported for such HPC workflows as parameter sweeps, capability computing and even weak scaled " cooperative" computing may not be well served using conventional practices. But the possible advance of revolutionary methods to manage asynchrony, exploit message-driven computing techniques and declarative synchronization semantic constructs such as found in the experimental ParalleX execution model may provide an alternative paradigm for bringing Clouds more closely aligned to Science, Technology, Engineering, and Mathematics (STEM) applications. Experimental results capturing an Adaptive Mesh Refinement (AMR) application in numerical relativity using the ParalleX-based HPX-3 runtime system demonstrates many of the required properties for HPC Clouds. © Copyright owned by the author(s) under the terms of the Creative Commons Attribution-NonCommercial- ShareAlike License.},
 bibtype = {inproceedings},
 author = {Sterling, T and Anderson, M},
 booktitle = {Proceedings of Science}
}

The application of emergent Clouds to the domain of high performance computing is considered by examining the various operational modalities comprising the field of supercomputing and by analyzing their suitability to Clouds based on underlying factors of performance degradation. It is found that while throughput computing may be readily supported for such HPC workflows as parameter sweeps, capability computing and even weak scaled " cooperative" computing may not be well served using conventional practices. But the possible advance of revolutionary methods to manage asynchrony, exploit message-driven computing techniques and declarative synchronization semantic constructs such as found in the experimental ParalleX execution model may provide an alternative paradigm for bringing Clouds more closely aligned to Science, Technology, Engineering, and Mathematics (STEM) applications. Experimental results capturing an Adaptive Mesh Refinement (AMR) application in numerical relativity using the ParalleX-based HPX-3 runtime system demonstrates many of the required properties for HPC Clouds. © Copyright owned by the author(s) under the terms of the Creative Commons Attribution-NonCommercial- ShareAlike License.

@inproceedings{
 title = {Plenoptic rendering with interactive performance using GPUs},
 type = {inproceedings},
 year = {2012},
 keywords = {Algorithms,Cameras; Image processing; Program processors,Computational power; Frame rate; Frames per second},
 volume = {8295},
 websites = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-84857593637&doi=10.1117%2F12.909683&partnerID=40&md5=0472d63f7aacdc46fed76a0afe7c15bf},
 city = {Burlingame, CA},
 id = {383594a3-dfab-322b-942f-66147b5fecc3},
 created = {2018-03-13T18:36:21.358Z},
 file_attached = {false},
 profile_id = {42d295c0-0737-38d6-8b43-508cab6ea85d},
 group_id = {be743863-c45b-320e-a8f8-6b8511f39f77},
 last_modified = {2018-03-13T18:36:21.358Z},
 read = {false},
 starred = {false},
 authored = {false},
 confirmed = {true},
 hidden = {false},
 citation_key = {Lumsdaine2012},
 source_type = {conference},
 notes = {cited By 8; Conference of Image Processing: Algorithms and Systems X; and Parallel Processing for Imaging Applications II ; Conference Date: 23 January 2012 Through 25 January 2012; Conference Code:88791},
 private_publication = {false},
 abstract = {Processing and rendering of plenoptic camera data requires significant computational power and memory bandwidth. At the same time, real-time rendering performance is highly desirable so that users can interactively explore the infinite variety of images that can be rendered from a single plenoptic image. In this paper we describe a GPU-based approach for lightfield processing and rendering, with which we are able to achieve interactive performance for focused plenoptic rendering tasks such as refocusing and novel-view generation. We present a progression of rendering approaches for focused plenoptic camera data and analyze their performance on popular GPU-based systems. Our analyses are validated with experimental results on commercially available GPU hardware. Even for complicated rendering algorithms, we are able to render 39Mpixel plenoptic data to 2Mpixel images with frame rates in excess of 500 frames per second. © 2012 Copyright Society of Photo-Optical Instrumentation Engineers (SPIE).},
 bibtype = {inproceedings},
 author = {Lumsdaine, A and Chunev, G and Georgiev, T},
 doi = {10.1117/12.909683},
 booktitle = {Proceedings of SPIE - The International Society for Optical Engineering}
}

Processing and rendering of plenoptic camera data requires significant computational power and memory bandwidth. At the same time, real-time rendering performance is highly desirable so that users can interactively explore the infinite variety of images that can be rendered from a single plenoptic image. In this paper we describe a GPU-based approach for lightfield processing and rendering, with which we are able to achieve interactive performance for focused plenoptic rendering tasks such as refocusing and novel-view generation. We present a progression of rendering approaches for focused plenoptic camera data and analyze their performance on popular GPU-based systems. Our analyses are validated with experimental results on commercially available GPU hardware. Even for complicated rendering algorithms, we are able to render 39Mpixel plenoptic data to 2Mpixel images with frame rates in excess of 500 frames per second. © 2012 Copyright Society of Photo-Optical Instrumentation Engineers (SPIE).

@inproceedings{
 title = {Breaking the speed and scalability barriers for graph exploration on distributed-memory machines},
 type = {inproceedings},
 year = {2012},
 pages = {13},
 publisher = {IEEE Computer Society Press},
 id = {9128d747-cd83-31cc-b9ec-27607b7b407d},
 created = {2018-03-13T18:36:21.769Z},
 file_attached = {false},
 profile_id = {42d295c0-0737-38d6-8b43-508cab6ea85d},
 group_id = {be743863-c45b-320e-a8f8-6b8511f39f77},
 last_modified = {2018-03-13T18:36:21.769Z},
 read = {false},
 starred = {false},
 authored = {false},
 confirmed = {false},
 hidden = {false},
 citation_key = {Checconi2012},
 source_type = {CONF},
 private_publication = {false},
 bibtype = {inproceedings},
 author = {Checconi, Fabio and Petrini, Fabrizio and Willcock, Jeremiah and Lumsdaine, Andrew and Choudhury, Anamitra Roy and Sabharwal, Yogish},
 booktitle = {Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis}
}

@article{
 title = {Improving the scalability of parallel N-body applications with an event-driven constraint-based execution model},
 type = {article},
 year = {2012},
 keywords = {AS graph,Barnes-Hut,Computer systems programming,Constraint-based,Convention,Scalability,Semantics},
 pages = {319-332},
 volume = {26},
 websites = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-84863694538&doi=10.1177%2F1094342012440585&partnerID=40&md5=367e87c770fa077bf7845c533dee0e03},
 publisher = {Sage Publications Sage UK: London, England},
 id = {713c1a56-129f-3327-8821-e8034d865cd1},
 created = {2018-03-13T18:36:22.109Z},
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 last_modified = {2018-03-13T18:36:22.109Z},
 read = {false},
 starred = {false},
 authored = {false},
 confirmed = {true},
 hidden = {false},
 citation_key = {Dekate2012319},
 source_type = {article},
 notes = {<b>From Duplicate 1 (<i>Improving the scalability of parallel N-body applications with an event-driven constraint-based execution model</i> - Dekate, C; Anderson, M; Brodowicz, M; Kaiser, H; Adelstein-Lelbach, B; Sterling, T)<br/></b><br/>cited By 18},
 private_publication = {false},
 abstract = {The scalability and efficiency of graph applications are significantly constrained by conventional systems and their supporting programming models. Technology trends such as multicore, manycore, and heterogeneous system architectures are introducing further challenges and possibilities for emerging application domains such as graph applications. This paper explores the parallel execution of graphs that are generated using the Barnes-Hut algorithm to exemplify dynamic workloads. The workloads are expressed using the semantics of an exascale computing execution model called ParalleX. For comparison, results using conventional execution model semantics are also presented. We find improved load balancing during runtime and automatic parallelism discovery by using the advanced semantics for exascale computing. © The Author(s) 2012.},
 bibtype = {article},
 author = {Dekate, Chirag and Anderson, Matthew and Brodowicz, Maciej and Kaiser, Hartmut and Adelstein-Lelbach, Bryce and Sterling, Thomas},
 doi = {10.1177/1094342012440585},
 journal = {International Journal of High Performance Computing Applications},
 number = {3}
}

The scalability and efficiency of graph applications are significantly constrained by conventional systems and their supporting programming models. Technology trends such as multicore, manycore, and heterogeneous system architectures are introducing further challenges and possibilities for emerging application domains such as graph applications. This paper explores the parallel execution of graphs that are generated using the Barnes-Hut algorithm to exemplify dynamic workloads. The workloads are expressed using the semantics of an exascale computing execution model called ParalleX. For comparison, results using conventional execution model semantics are also presented. We find improved load balancing during runtime and automatic parallelism discovery by using the advanced semantics for exascale computing. © The Author(s) 2012.

@inproceedings{
 title = {Recursive thinkers and doers in CS1},
 type = {inproceedings},
 year = {2012},
 pages = {669},
 publisher = {ACM},
 id = {48ce4284-b089-3cb4-a738-39e1a5ab85b3},
 created = {2018-03-13T18:36:22.616Z},
 file_attached = {false},
 profile_id = {42d295c0-0737-38d6-8b43-508cab6ea85d},
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 last_modified = {2018-03-13T18:36:22.616Z},
 read = {false},
 starred = {false},
 authored = {false},
 confirmed = {false},
 hidden = {false},
 citation_key = {Cottam2012c},
 source_type = {CONF},
 private_publication = {false},
 bibtype = {inproceedings},
 author = {Cottam, Joseph A and Menzel, Suzanne},
 booktitle = {Proceedings of the 43rd ACM technical symposium on Computer Science Education}
}

@inproceedings{
 title = {MiniKanren, live and untagged: Quine generation via relational interpreters (programming pearl)},
 type = {inproceedings},
 year = {2012},
 keywords = {Codes (symbols); Functional programming; Logic pro,Dijkstra; List processing; miniKanren; quines; sc,Program interpreters},
 pages = {8-29},
 websites = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-84906815155&doi=10.1145%2F2661103.2661105&partnerID=40&md5=284b6592fe465f8d3f479e20d7bf980d},
 publisher = {Association for Computing Machinery},
 city = {Copenhagen},
 id = {ff9430a7-d9df-320f-adfe-b55584e56fea},
 created = {2018-03-13T18:36:22.988Z},
 file_attached = {false},
 profile_id = {42d295c0-0737-38d6-8b43-508cab6ea85d},
 group_id = {be743863-c45b-320e-a8f8-6b8511f39f77},
 last_modified = {2018-03-13T18:36:22.988Z},
 read = {false},
 starred = {false},
 authored = {false},
 confirmed = {true},
 hidden = {false},
 citation_key = {Byrd20128},
 source_type = {conference},
 notes = {cited By 1; Conference of 2012 Annual Workshop on Scheme and Functional Programming, Scheme 2012 ; Conference Date: 9 September 2012 Through 15 September 2012; Conference Code:107228},
 private_publication = {false},
 abstract = {We present relational interpreters for several subsets of Scheme, written in the pure logic programming language miniKanren. We demonstrate these interpreters running "backwards" - that is, generating programs that evaluate to a specified value - and show how the interpreters can trivially generate quines (programs that evaluate to themselves). We demonstrate how to transform environment-passing interpreters written in Scheme into relational interpreters written in miniKanren. We show how constraint extensions to core miniKanren can be used to allow shadowing of the interpreter's primitive forms (using the absent° tree constraint), and to avoid having to tag expressions in the languages being interpreted (using disequality constraints and symbol/number type-constraints), simplifying the interpreters and eliminating the need for parsers/unparsers. We provide four appendices to make the code in the paper completely self-contained. Three of these appendices contain new code: the complete implementation of core miniKanren extended with the new constraints; an extended relational interpreter capable of running factorial and doing list processing; and a simple pattern matcher that uses Dijkstra guards. The other appendix presents our preferred version of code that has been presented elsewhere: the miniKanren relational arithmetic system used in the extended interpreter. © 2012 ACM.},
 bibtype = {inproceedings},
 author = {Byrd, W E and Holk, E and Friedman, D P},
 doi = {10.1145/2661103.2661105},
 booktitle = {Proceedings of the ACM SIGPLAN International Conference on Functional Programming, ICFP}
}

We present relational interpreters for several subsets of Scheme, written in the pure logic programming language miniKanren. We demonstrate these interpreters running "backwards" - that is, generating programs that evaluate to a specified value - and show how the interpreters can trivially generate quines (programs that evaluate to themselves). We demonstrate how to transform environment-passing interpreters written in Scheme into relational interpreters written in miniKanren. We show how constraint extensions to core miniKanren can be used to allow shadowing of the interpreter's primitive forms (using the absent° tree constraint), and to avoid having to tag expressions in the languages being interpreted (using disequality constraints and symbol/number type-constraints), simplifying the interpreters and eliminating the need for parsers/unparsers. We provide four appendices to make the code in the paper completely self-contained. Three of these appendices contain new code: the complete implementation of core miniKanren extended with the new constraints; an extended relational interpreter capable of running factorial and doing list processing; and a simple pattern matcher that uses Dijkstra guards. The other appendix presents our preferred version of code that has been presented elsewhere: the miniKanren relational arithmetic system used in the extended interpreter. © 2012 ACM.

@article{
 title = {Toward a core undergraduate curriculum in parallel and distributed computing},
 type = {article},
 year = {2012},
 id = {6691c4ed-74ea-3d58-bc02-2ca9f78902ca},
 created = {2018-03-13T18:36:23.111Z},
 file_attached = {false},
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 last_modified = {2018-03-13T18:36:23.111Z},
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 starred = {false},
 authored = {false},
 confirmed = {true},
 hidden = {false},
 citation_key = {Prasad2012},
 source_type = {JOUR},
 private_publication = {false},
 bibtype = {article},
 author = {Prasad, Sushil K and Gupta, Anshul and Kant, Krishna and Lumsdaine, Andrew and Padua, David and Robert, Yves and Rosenberg, Arnold and Sussman, Alan and Weems, Charles},
 journal = {Computer Education},
 number = {2012-6}
}

@inproceedings{
 title = {Position Paper: Logic Programming for Parallel Irregular Applications},
 type = {inproceedings},
 year = {2012},
 pages = {269-272},
 publisher = {IEEE},
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}

@inproceedings{
 title = {Spatial autocorrelation-based information visualization evaluation},
 type = {inproceedings},
 year = {2012},
 pages = {8},
 publisher = {ACM},
 id = {f33b9fd3-f965-3dbb-b809-4d593b47945e},
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 author = {Cottam, Joseph A and Lumsdaine, Andrew},
 booktitle = {Proceedings of the 2012 BELIV Workshop: Beyond Time and Errors-Novel Evaluation Methods for Visualization}
}

@inproceedings{
 title = {GoDEL: A multidirectional dataflow execution model for large-scale computing},
 type = {inproceedings},
 year = {2012},
 keywords = {Computer architecture; Computer programming langu,Concurrent computing; Dataflow; Dataflow model; Da,Data flow analysis},
 pages = {10-18},
 websites = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-84860508407&doi=10.1109%2FDFM.2011.12&partnerID=40&md5=4ff3ed39a94ade43765d46673fd4806e},
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 read = {false},
 starred = {false},
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 citation_key = {Kulkarni201210},
 source_type = {conference},
 notes = {cited By 2; Conference of 1st International Workshop on Data-Flow Models, DFM 2011 ; Conference Date: 10 October 2011 Through 10 October 2011; Conference Code:89549},
 private_publication = {false},
 abstract = {As the emerging trends in hardware architecture guided by performance, power efficiency and complexity drive us towards massive processor parallelism, there has been a renewed interest in dataflow models for large-scale computing. Dataflow programming models, being declarative in nature, lead to improved programmability at scale by implicitly managing the computation and communication for the application. In this paper, we present GoDEL, a multidirectional dataflow execution model based on propagation networks. Propagator networks allow general-purpose parallel computation on partial data. Implemented with efficiency and programmer productivity as its goals, we describe the syntax and semantics of the GoDEL language and discuss its implementation and runtime. We further discuss representative examples from various programming paradigms that are encompassed by and benefit from the flexibility in the multidirectional execution model. © 2011 IEEE.},
 bibtype = {inproceedings},
 author = {Kulkarni, A and Lang, M and Lumsdaine, A},
 doi = {10.1109/DFM.2011.12},
 booktitle = {Proceedings - 2011 1st Workshop on Data-Flow Execution Models for Extreme Scale Computing, DFM 2011}
}

As the emerging trends in hardware architecture guided by performance, power efficiency and complexity drive us towards massive processor parallelism, there has been a renewed interest in dataflow models for large-scale computing. Dataflow programming models, being declarative in nature, lead to improved programmability at scale by implicitly managing the computation and communication for the application. In this paper, we present GoDEL, a multidirectional dataflow execution model based on propagation networks. Propagator networks allow general-purpose parallel computation on partial data. Implemented with efficiency and programmer productivity as its goals, we describe the syntax and semantics of the GoDEL language and discuss its implementation and runtime. We further discuss representative examples from various programming paradigms that are encompassed by and benefit from the flexibility in the multidirectional execution model. © 2011 IEEE.

@techreport{
 title = {48 Month Program Report},
 type = {techreport},
 year = {2012},
 id = {5ab3846a-4fe7-3ac1-ad9d-b6c6ac050f80},
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 author = {McRobbie, Michael A and Wheeler, Bradley C and Plale, Beth A and Stewart, Craig A}
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@inproceedings{
 title = {The design and implementation of a multi-level content-addressable checkpoint file system},
 type = {inproceedings},
 year = {2012},
 pages = {1-10},
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 booktitle = {High Performance Computing (HiPC), 2012 19th International Conference on}
}

@inproceedings{
 title = {Watch this: A taxonomy for dynamic data visualization},
 type = {inproceedings},
 year = {2012},
 pages = {193-202},
 publisher = {IEEE},
 id = {1b363eb8-b546-3954-8ab2-f99fcdc07df4},
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 citation_key = {Cottam2012a},
 source_type = {CONF},
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 bibtype = {inproceedings},
 author = {Cottam, Joseph A and Lumsdaine, Andrew and Weaver, Chris},
 booktitle = {Visual Analytics Science and Technology (VAST), 2012 IEEE Conference on}
}

@inproceedings{
 title = {Optimizing latency and throughput for spawning processes on massively multicore processors},
 type = {inproceedings},
 year = {2012},
 keywords = {Compute resources,Distributed process,Executable,Intelligent control,Launching,Optimization,Software architec},
 websites = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-84864764857&doi=10.1145%2F2318916.2318924&partnerID=40&md5=9206e53cd830e95869cf274a2eb31845},
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 notes = {<b>From Duplicate 1 (<i>Optimizing latency and throughput for spawning processes on massively multicore processors</i> - Kulkarni, A; Lumsdaine, A; Lang, M; Ionkov, L)<br/></b><br/>cited By 2; Conference of 2nd International Workshop on Runtime and Operating Systems for Supercomputers, ROSS 2012 - In Conjunction with: ICS 2012 ; Conference Date: 29 June 2012 Through 29 June 2012; Conference Code:91612},
 private_publication = {false},
 abstract = {The execution of a SPMD application involves running multiple instances of a process with possibly varying arguments. With the widespread adoption of massively multicore processors, there has been a focus towards harnessing the abundant compute resources effectively in a power-efficient manner. Although much work has been done towards optimizing distributed process launch using hierarchical techniques, there has been a void in studying the performance of spawning processes within a single node. Reducing the latency to spawn a new process locally results in faster global job launch. Further, emerging dynamic and resilient execution models are designed on the premise of maintaining process pools for fault isolation and launching several processes in a relatively shorter period of time. Optimizing the latency and throughput for spawning processes would help improve the overall performance of runtime systems, allow adaptive process-replication reliability and motivate the design and implementation of process management interfaces in future manycore operating systems. In this paper, we study the several limiting factors for efficient spawning of processes on massively multicore architectures. We have developed a library to optimize launching multiple instances of the same executable. Our microbenchmarks show a 20-80% decrease in the process spawn time for multiple executables. We further discuss the effects of memory locality and propose NUMA-aware extensions to optimize launching processes with large memory-mapped segments including dynamic shared libraries. Finally, we describe vector operating system interfaces for spawning a batch of processes from a given executable on specific cores. Our results show a 50x speedup over the traditional method of launching new processes using fork and exec system calls. © 2012 ACM.},
 bibtype = {inproceedings},
 author = {Lumsdaine, Abhishek Kulkarni Andrew and Ionkov, Michael Lang Latchesar and Kulkarni, A and Lumsdaine, Abhishek Kulkarni Andrew and Lang, M and Ionkov, L},
 doi = {10.1145/2318916.2318924},
 booktitle = {Proceedings of the 2nd International Workshop on Runtime and Operating Systems for Supercomputers, ROSS 2012 - In Conjunction with: ICS 2012}
}

The execution of a SPMD application involves running multiple instances of a process with possibly varying arguments. With the widespread adoption of massively multicore processors, there has been a focus towards harnessing the abundant compute resources effectively in a power-efficient manner. Although much work has been done towards optimizing distributed process launch using hierarchical techniques, there has been a void in studying the performance of spawning processes within a single node. Reducing the latency to spawn a new process locally results in faster global job launch. Further, emerging dynamic and resilient execution models are designed on the premise of maintaining process pools for fault isolation and launching several processes in a relatively shorter period of time. Optimizing the latency and throughput for spawning processes would help improve the overall performance of runtime systems, allow adaptive process-replication reliability and motivate the design and implementation of process management interfaces in future manycore operating systems. In this paper, we study the several limiting factors for efficient spawning of processes on massively multicore architectures. We have developed a library to optimize launching multiple instances of the same executable. Our microbenchmarks show a 20-80% decrease in the process spawn time for multiple executables. We further discuss the effects of memory locality and propose NUMA-aware extensions to optimize launching processes with large memory-mapped segments including dynamic shared libraries. Finally, we describe vector operating system interfaces for spawning a batch of processes from a given executable on specific cores. Our results show a 50x speedup over the traditional method of launching new processes using fork and exec system calls. © 2012 ACM.

@inproceedings{
 title = {Avalanche: a fine-grained flow graph model for irregular applications on distributed-memory systems},
 type = {inproceedings},
 year = {2012},
 pages = {15-26},
 publisher = {ACM},
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 authored = {false},
 confirmed = {false},
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 citation_key = {Willcock2012a},
 source_type = {CONF},
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 bibtype = {inproceedings},
 author = {Willcock, Jeremiah J and Newton, Ryan R and Lumsdaine, Andrew},
 booktitle = {Proceedings of the 1st ACM SIGPLAN workshop on Functional high-performance computing}
}

@inproceedings{
 title = {Reasonable abstractions: Semantics for dynamic data visualization},
 type = {inproceedings},
 year = {2011},
 keywords = {Compilation techniques; Complex analysis; Data flo,Data flow analysis,Data transfer; Data visualization; Graphical user},
 pages = {269-270},
 websites = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-84855762346&doi=10.1109%2FVAST.2011.6102468&partnerID=40&md5=d7ca7783dde434b85ea7823206cf0d35},
 city = {Providence, RI},
 id = {7d9f9528-752e-3dc5-9105-4e7b668b68a6},
 created = {2018-03-13T18:36:20.733Z},
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 last_modified = {2018-03-13T18:36:20.733Z},
 read = {false},
 starred = {false},
 authored = {false},
 confirmed = {true},
 hidden = {false},
 citation_key = {Cottam2011269},
 source_type = {conference},
 notes = {cited By 0; Conference of 2nd IEEE Conference on Visual Analytics Science and Technology 2011, VAST 2011 ; Conference Date: 23 October 2011 Through 28 October 2011; Conference Code:88078},
 private_publication = {false},
 abstract = {Chi showed how to treat visualization programing models abstractly. This provided a firm theoretical basis for the data-state model of visualization. However, Chi's models did not look deeper into fine-grained program properties, such as execution semantics. We present conditionally deterministic and resource bounded semantics for the data flow model of visualization based on E-FRP. These semantics are used in the Stencil system to move between data state and data flow execution, build task-based parallelism, and build complex analysis chains for dynamic data. This initial work also shows promise for other complex operators, compilation techniques to enable efficient use of time and space, and mixing task and data parallelism. © 2011 IEEE.},
 bibtype = {inproceedings},
 author = {Cottam, J A and Lumsdaine, A},
 doi = {10.1109/VAST.2011.6102468},
 booktitle = {VAST 2011 - IEEE Conference on Visual Analytics Science and Technology 2011, Proceedings}
}

Chi showed how to treat visualization programing models abstractly. This provided a firm theoretical basis for the data-state model of visualization. However, Chi's models did not look deeper into fine-grained program properties, such as execution semantics. We present conditionally deterministic and resource bounded semantics for the data flow model of visualization based on E-FRP. These semantics are used in the Stencil system to move between data state and data flow execution, build task-based parallelism, and build complex analysis chains for dynamic data. This initial work also shows promise for other complex operators, compilation techniques to enable efficient use of time and space, and mixing task and data parallelism. © 2011 IEEE.

@inproceedings{
 title = {Declarative Parallel Programming for GPUs.},
 type = {inproceedings},
 year = {2011},
 pages = {297-304},
 id = {3555addf-97b5-3017-aeac-430155f37561},
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 citation_key = {Holk2011a},
 source_type = {CONF},
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 bibtype = {inproceedings},
 author = {Holk, Eric and Byrd, William E and Mahajan, Nilesh and Willcock, Jeremiah and Chauhan, Arun and Lumsdaine, Andrew},
 booktitle = {PARCO}
}

@article{
 title = {A language for generic programming in the large},
 type = {article},
 year = {2011},
 keywords = {Associated types,Computer programming languages,Computer software,Concepts,Functors,Generic prog,Software design},
 pages = {423-465},
 volume = {76},
 websites = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-79952622013&doi=10.1016%2Fj.scico.2008.09.009&partnerID=40&md5=40022613401ffa5edec259dc309c7d7b},
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 id = {d265932d-2a86-3cd4-af0a-cb9a334cb695},
 created = {2018-03-13T18:36:21.636Z},
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 read = {false},
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 authored = {false},
 confirmed = {true},
 hidden = {false},
 citation_key = {Siek2011423},
 source_type = {article},
 notes = {<b>From Duplicate 2 (<i>A language for generic programming in the large</i> - Siek, J G; Lumsdaine, A)<br/></b><br/>cited By 9},
 private_publication = {false},
 abstract = {Generic programming is an effective methodology for developing reusable software libraries. Many programming languages provide generics and have features for describing interfaces, but none completely support the idioms used in generic programming. To address this need we developed the language G. The central feature of G is the concept, a mechanism for organizing constraints on generics that is inspired by the needs of modern C libraries. G provides modular type checking and separate compilation (even of generics). These characteristics support modular software development, especially the smooth integration of independently developed components. In this article we present the rationale for the design of G and demonstrate the expressiveness of G with two case studies: porting the Standard Template Library and the Boost Graph Library from C to G. The design of G shares much in common with the concept extension proposed for the next C Standard (the authors participated in its design) but there are important differences described in this article. © 2008 Elsevier B.V. All rights reserved.},
 bibtype = {article},
 author = {Siek, Jeremy G and Lumsdaine, Andrew},
 doi = {10.1016/j.scico.2008.09.009},
 journal = {Science of Computer Programming},
 number = {5}
}

Generic programming is an effective methodology for developing reusable software libraries. Many programming languages provide generics and have features for describing interfaces, but none completely support the idioms used in generic programming. To address this need we developed the language G. The central feature of G is the concept, a mechanism for organizing constraints on generics that is inspired by the needs of modern C libraries. G provides modular type checking and separate compilation (even of generics). These characteristics support modular software development, especially the smooth integration of independently developed components. In this article we present the rationale for the design of G and demonstrate the expressiveness of G with two case studies: porting the Standard Template Library and the Boost Graph Library from C to G. The design of G shares much in common with the concept extension proposed for the next C Standard (the authors participated in its design) but there are important differences described in this article. © 2008 Elsevier B.V. All rights reserved.

@inproceedings{
 title = {Active pebbles: A programming model for highly parallel fine-grained data-driven computations},
 type = {inproceedings},
 year = {2011},
 keywords = {Active message,Coarse-grained,Computer programming languages,Computer simulation,Data-driven,Distributed Memory,Electric network analysis,Execution model,Graph theory,Irregular applications,Models,Parallel Computation,Parallel programming,Physical world,Programming models,Scientific simulations,Social Network Analysis},
 pages = {305-306},
 volume = {46},
 issue = {8},
 websites = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-79952785450&doi=10.1145%2F1941553.1941601&partnerID=40&md5=064701e0c15633a34fddb7dc9d209c61,https://www.scopus.com/inward/record.uri?eid=2-s2.0-80053947834&doi=10.1145%2F2038037.1941601&partnerID=40&md5=},
 publisher = {ACM},
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 last_modified = {2018-03-13T18:36:22.300Z},
 read = {false},
 starred = {false},
 authored = {false},
 confirmed = {true},
 hidden = {false},
 citation_key = {Willcock2011305},
 source_type = {conference},
 notes = {<b>From Duplicate 2 (<i>Active pebbles: A programming model for highly parallel fine-grained data-driven computations</i> - Willcock, J; Hoefler, T; Edmonds, N; Lumsdaine, A)<br/></b><br/><b>From Duplicate 1 (<i>Active pebbles: A programming model for highly parallel fine-grained data-driven computations</i> - Willcock, J; Hoefler, T; Edmonds, N; Lumsdaine, A)<br/></b><br/>cited By 7; Conference of 16th ACM Symposium on Principles and Practice of Parallel Programming, PPoPP'11 ; Conference Date: 12 February 2011 Through 16 February 2011; Conference Code:84256<br/><br/><b>From Duplicate 2 (<i>Active pebbles: A programming model for highly parallel fine-grained data-driven computations</i> - Willcock, J; Hoefler, T; Edmonds, N; Lumsdaine, A)<br/></b><br/>cited By 3},
 private_publication = {false},
 abstract = {A variety of programming models exist to support large-scale, distributed memory, parallel computation. These programming models have historically targeted coarse-grained applications with natural locality such as those found in a variety of scientific simulations of the physical world. Fine-grained, irregular, and unstructured applications such as those found in biology, social network analysis, and graph theory are less well supported. We propose Active Pebbles, a programming model which allows these applications to be expressed naturally; an accompanying execution model ensures performance and scalability. Copyright © 2011 ACM.},
 bibtype = {inproceedings},
 author = {Willcock, Jeremiah James and Hoefler, Torsten and Edmonds, Nicholas Gerard and Lumsdaine, Andrew},
 doi = {10.1145/2038037.1941601},
 booktitle = {ACM SIGPLAN Notices}
}

A variety of programming models exist to support large-scale, distributed memory, parallel computation. These programming models have historically targeted coarse-grained applications with natural locality such as those found in a variety of scientific simulations of the physical world. Fine-grained, irregular, and unstructured applications such as those found in biology, social network analysis, and graph theory are less well supported. We propose Active Pebbles, a programming model which allows these applications to be expressed naturally; an accompanying execution model ensures performance and scalability. Copyright © 2011 ACM.

@inproceedings{
 title = {ConceptClang: An implementation of C++ concepts in Clang},
 type = {inproceedings},
 year = {2011},
 keywords = {C++,Clang,Computer programming languages,Concep,Concept designs,Concept-based},
 pages = {71-82},
 websites = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-80155172914&doi=10.1145%2F2036918.2036929&partnerID=40&md5=9e26eebac90e4faeb1a7d0b343dfb6be},
 publisher = {ACM},
 city = {Tokyo},
 id = {2eba69e0-f29e-3bb4-9d4a-0b1238ed95cf},
 created = {2018-03-13T18:36:22.500Z},
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 last_modified = {2018-03-13T18:36:22.500Z},
 read = {false},
 starred = {false},
 authored = {false},
 confirmed = {true},
 hidden = {false},
 citation_key = {Voufo201171},
 source_type = {conference},
 notes = {<b>From Duplicate 1 (<i>ConceptClang: An implementation of C++ concepts in Clang</i> - Voufo, Larisse; Zalewski, Marcin; Lumsdaine, Andrew)<br/></b><br/><b>From Duplicate 1 (<i>ConceptClang: An implementation of C++ concepts in Clang</i> - Voufo, Larisse; Zalewski, Marcin; Lumsdaine, Andrew)<br/></b><br/><b>From Duplicate 1 (<i>ConceptClang: An implementation of C++ concepts in Clang</i> - Voufo, L; Zalewski, M; Lumsdaine, A)<br/></b><br/>cited By 4; Conference of 7th ACM SIGPLAN Workshop on Generic Programming, WGP'11 ; Conference Date: 18 September 2011 Through 18 September 2011; Conference Code:87109<br/><br/><b>From Duplicate 2 (<i>ConceptClang: An implementation of C++ concepts in Clang</i> - Voufo, L; Zalewski, M; Lumsdaine, A)<br/></b><br/>cited By 4; Conference of 7th ACM SIGPLAN Workshop on Generic Programming, WGP'11 ; Conference Date: 18 September 2011 Through 18 September 2011; Conference Code:87109<br/><br/><b>From Duplicate 2 (<i>ConceptClang: An implementation of C++ concepts in Clang</i> - Voufo, L; Zalewski, M; Lumsdaine, A)<br/></b><br/>cited By 4; Conference of 7th ACM SIGPLAN Workshop on Generic Programming, WGP'11 ; Conference Date: 18 September 2011 Through 18 September 2011; Conference Code:87109},
 private_publication = {false},
 abstract = {Concepts are a proposed C++ extension for constraints-based polymorphism. In this paper, we present our experience implementing an infrastructure for exploring concept designs based on Clang-an LLVM frontend for the C family of languages. We discuss how the primary proposed features of concepts (such as concept-based lookup, overloading and constrained templates) are implemented in Clang, and how our implementation can be extended to support the different approaches suggested within the C++ community. Some illustrations are presented and include a subset of the Boost Graph Library. Copyright © 2011 ACM.},
 bibtype = {inproceedings},
 author = {Voufo, Larisse and Zalewski, Marcin and Lumsdaine, Andrew},
 doi = {10.1145/2036918.2036929},
 booktitle = {WGP'11 - Proceedings of the 2011 ACM SIGPLAN Workshop on Generic Programming}
}

Concepts are a proposed C++ extension for constraints-based polymorphism. In this paper, we present our experience implementing an infrastructure for exploring concept designs based on Clang-an LLVM frontend for the C family of languages. We discuss how the primary proposed features of concepts (such as concept-based lookup, overloading and constrained templates) are implemented in Clang, and how our implementation can be extended to support the different approaches suggested within the C++ community. Some illustrations are presented and include a subset of the Boost Graph Library. Copyright © 2011 ACM.

@inproceedings{
 title = {8 Scalable Parallel Solution Techniques for Data-Intensive Problems in Distributed Memory},
 type = {inproceedings},
 year = {2011},
 pages = {26},
 id = {093dce42-8b1a-3047-b07e-e1096e7ff96e},
 created = {2018-03-13T18:36:22.500Z},
 file_attached = {false},
 profile_id = {42d295c0-0737-38d6-8b43-508cab6ea85d},
 group_id = {be743863-c45b-320e-a8f8-6b8511f39f77},
 last_modified = {2018-03-13T18:36:22.500Z},
 read = {false},
 starred = {false},
 authored = {false},
 confirmed = {false},
 hidden = {false},
 citation_key = {Edmonds2011},
 source_type = {CONF},
 private_publication = {false},
 bibtype = {inproceedings},
 author = {Edmonds, Nicholas and Lumsdaine, Andrew},
 booktitle = {Fifth SIAM Workshop on Combinatorial Scientific Computing, May 19–21, 2011, Darmstadt, Germany}
}

@article{
 title = {Kanor},
 type = {article},
 year = {2011},
 pages = {190-204},
 publisher = {Springer},
 id = {2d21dc13-7968-3694-8f8b-fb55e9f4f9fe},
 created = {2018-03-13T18:36:23.100Z},
 file_attached = {false},
 profile_id = {42d295c0-0737-38d6-8b43-508cab6ea85d},
 group_id = {be743863-c45b-320e-a8f8-6b8511f39f77},
 last_modified = {2018-03-13T18:36:23.100Z},
 read = {false},
 starred = {false},
 authored = {false},
 confirmed = {false},
 hidden = {false},
 citation_key = {Holk2011},
 source_type = {JOUR},
 private_publication = {false},
 bibtype = {article},
 author = {Holk, Eric and Byrd, William and Willcock, Jeremiah and Hoefler, Torsten and Chauhan, Arun and Lumsdaine, Andrew},
 journal = {Practical Aspects of Declarative Languages}
}

@inproceedings{
 title = {Communication optimization beyond MPI},
 type = {inproceedings},
 year = {2011},
 keywords = {Communication,Communication models,Communication optimization,Computer software selection and ev,Message passing},
 pages = {2018-2021},
 websites = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-83455203547&doi=10.1109%2FIPDPS.2011.366&partnerID=40&md5=16cb543881a6acd8f936b9ba3abdcdaf},
 publisher = {IEEE},
 city = {Anchorage, AK},
 id = {b86de96f-fcb7-3d6e-b97d-57e3cc96c873},
 created = {2018-03-13T18:36:23.238Z},
 file_attached = {false},
 profile_id = {42d295c0-0737-38d6-8b43-508cab6ea85d},
 group_id = {be743863-c45b-320e-a8f8-6b8511f39f77},
 last_modified = {2018-03-13T18:36:23.238Z},
 read = {false},
 starred = {false},
 authored = {false},
 confirmed = {true},
 hidden = {false},
 citation_key = {Friedley20112018},
 source_type = {conference},
 notes = {<b>From Duplicate 2 (<i>Communication optimization beyond MPI</i> - Friedley, A; Lumsdaine, A)<br/></b><br/>cited By 6; Conference of 25th IEEE International Parallel and Distributed Processing Symposium, Workshops and Phd Forum, IPDPSW 2011 ; Conference Date: 16 May 2011 Through 20 May 2011; Conference Code:87731},
 private_publication = {false},
 abstract = {The Message Passing Interface (MPI) is the defacto standard for parallel processing on high-performance computing systems. As a result, significant research effort has been spent on optimizing the performance of MPI implementations. However, MPI's specific semantics can limit performance when using modern networks with Remote DMA capabilities. We propose a compiler-assisted approach to optimization of MPI-based applications by transforming MPI calls to a onesided (as opposed to message passing) communication model. In this paper we present a research plan for developing new optimizations using this approach, then show preliminary results with up to a 40% increase in bandwidth over MPI by using a simpler one-sided communication model. © 2011 IEEE.},
 bibtype = {inproceedings},
 author = {Friedley, Andrew and Lumsdaine, Andrew},
 doi = {10.1109/IPDPS.2011.366},
 booktitle = {IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum}
}

The Message Passing Interface (MPI) is the defacto standard for parallel processing on high-performance computing systems. As a result, significant research effort has been spent on optimizing the performance of MPI implementations. However, MPI's specific semantics can limit performance when using modern networks with Remote DMA capabilities. We propose a compiler-assisted approach to optimization of MPI-based applications by transforming MPI calls to a onesided (as opposed to message passing) communication model. In this paper we present a research plan for developing new optimizations using this approach, then show preliminary results with up to a 40% increase in bandwidth over MPI by using a simpler one-sided communication model. © 2011 IEEE.

@inproceedings{
 title = {Partial globalization of partitioned address spaces for zero-copy communication with shared memory},
 type = {inproceedings},
 year = {2011},
 keywords = {Address space,Algorithms,Buffer sharing,Bulk synchronous pa,Communication,Multicore programming,Program compilers},
 pages = {1-10},
 websites = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-84858045403&doi=10.1109%2FHiPC.2011.6152733&partnerID=40&md5=e072bc6bd6a9bebb3c383cf1a74678f4},
 publisher = {IEEE},
 city = {Bangalore},
 id = {7a047e44-8457-3c5b-a11e-3045f8c2fa05},
 created = {2018-03-13T18:36:23.283Z},
 file_attached = {false},
 profile_id = {42d295c0-0737-38d6-8b43-508cab6ea85d},
 group_id = {be743863-c45b-320e-a8f8-6b8511f39f77},
 last_modified = {2018-03-13T18:36:23.283Z},
 read = {false},
 starred = {false},
 authored = {false},
 confirmed = {true},
 hidden = {false},
 citation_key = {Jiao2011},
 source_type = {conference},
 notes = {<b>From Duplicate 2 (<i>Partial globalization of partitioned address spaces for zero-copy communication with shared memory</i> - Jiao, F; Mahajan, N; Willcock, J; Chauhan, A; Lumsdaine, A)<br/></b><br/>cited By 3; Conference of 18th International Conference on High Performance Computing, HiPC 2011 ; Conference Date: 18 December 2011 Through 21 December 2011; Conference Code:88861},
 private_publication = {false},
 abstract = {We have developed a high-level language, called Kanor, for declaratively specifying communication in parallel programs. Designed as an extension of C, it serves to coordinate partitioned address space programs written in the bulk synchronous parallel (BSP) style. Kanor's declarative semantics enable the programmers to write correct and maintainable parallel applications. The communication abstraction has been carefully designed to be amenable to compiler optimizations. While partitioned address space programming has several advantages, it needs special compiler optimizations to effectively leverage the shared memory hardware when running on multicore machines. In this paper, we introduce such shared-memory optimizations in the context of Kanor. One major way we achieve these optimizations is by selectively moving some of the variables into a globally shared address space a process that we term partial globalization. We identify scenarios in which such a transformation is beneficial, and present an algorithm to identify and correctly transform Kanor communication steps into zero-copy communication using hardware shared memory, by introducing minimal synchronization. We then present a runtime strategy that complements the compiler algorithm to eliminate most of the runtime synchronization overheads by using a copy-on-conflict technique. Finally, we show that our solution often performs much better than shared-memory optimized MPI, and ne ver performs significantly worse than MPI even in the presence of dependencies introduced due to buffer sharing. The techniques in this paper demonstrate that it is possible to program in a partitioned address space style, without sacrificing the performance advantages of hardware shared memory. To the best of our knowledge no other automatic compiler techniques have been developed so far that achieve zero-copy communication from a partitioned address space program. We expect out results to be applicable beyond Kanor, to other partitioned address space programming environments, such as MPI. © 2011 IEEE.},
 bibtype = {inproceedings},
 author = {Jiao, Fangzhou and Mahajan, Nilesh and Willcock, Jeremiah and Chauhan, Arun and Lumsdaine, Andrew},
 doi = {10.1109/HiPC.2011.6152733},
 booktitle = {18th International Conference on High Performance Computing, HiPC 2011}
}

We have developed a high-level language, called Kanor, for declaratively specifying communication in parallel programs. Designed as an extension of C, it serves to coordinate partitioned address space programs written in the bulk synchronous parallel (BSP) style. Kanor's declarative semantics enable the programmers to write correct and maintainable parallel applications. The communication abstraction has been carefully designed to be amenable to compiler optimizations. While partitioned address space programming has several advantages, it needs special compiler optimizations to effectively leverage the shared memory hardware when running on multicore machines. In this paper, we introduce such shared-memory optimizations in the context of Kanor. One major way we achieve these optimizations is by selectively moving some of the variables into a globally shared address space a process that we term partial globalization. We identify scenarios in which such a transformation is beneficial, and present an algorithm to identify and correctly transform Kanor communication steps into zero-copy communication using hardware shared memory, by introducing minimal synchronization. We then present a runtime strategy that complements the compiler algorithm to eliminate most of the runtime synchronization overheads by using a copy-on-conflict technique. Finally, we show that our solution often performs much better than shared-memory optimized MPI, and ne ver performs significantly worse than MPI even in the presence of dependencies introduced due to buffer sharing. The techniques in this paper demonstrate that it is possible to program in a partitioned address space style, without sacrificing the performance advantages of hardware shared memory. To the best of our knowledge no other automatic compiler techniques have been developed so far that achieve zero-copy communication from a partitioned address space program. We expect out results to be applicable beyond Kanor, to other partitioned address space programming environments, such as MPI. © 2011 IEEE.

@article{
 title = {Extending transfer entropy improves identification of effective connectivity in a spiking cortical network model},
 type = {article},
 year = {2011},
 keywords = {Action Potentials; Algorithms; Computer Simulatio,Neurological; Nerve Net; Neural Networks (Compute,algorithm; article; computer program; controlled s},
 volume = {6},
 websites = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-81055144854&doi=10.1371%2Fjournal.pone.0027431&partnerID=40&md5=be2e2de2460fd59098e2bf769df59084},
 id = {8434a900-5284-3468-bb78-85f369bcd7ce},
 created = {2018-03-13T18:36:23.467Z},
 file_attached = {false},
 profile_id = {42d295c0-0737-38d6-8b43-508cab6ea85d},
 group_id = {be743863-c45b-320e-a8f8-6b8511f39f77},
 last_modified = {2018-03-13T18:36:23.467Z},
 read = {false},
 starred = {false},
 authored = {false},
 confirmed = {true},
 hidden = {false},
 citation_key = {Ito2011},
 source_type = {article},
 notes = {cited By 62},
 private_publication = {false},
 abstract = {Transfer entropy (TE) is an information-theoretic measure which has received recent attention in neuroscience for its potential to identify effective connectivity between neurons. Calculating TE for large ensembles of spiking neurons is computationally intensive, and has caused most investigators to probe neural interactions at only a single time delay and at a message length of only a single time bin. This is problematic, as synaptic delays between cortical neurons, for example, range from one to tens of milliseconds. In addition, neurons produce bursts of spikes spanning multiple time bins. To address these issues, here we introduce a free software package that allows TE to be measured at multiple delays and message lengths. To assess performance, we applied these extensions of TE to a spiking cortical network model (Izhikevich, 2006) with known connectivity and a range of synaptic delays. For comparison, we also investigated single-delay TE, at a message length of one bin (D1TE), and cross-correlation (CC) methods. We found that D1TE could identify 36% of true connections when evaluated at a false positive rate of 1%. For extended versions of TE, this dramatically improved to 73% of true connections. In addition, the connections correctly identified by extended versions of TE accounted for 85% of the total synaptic weight in the network. Cross correlation methods generally performed more poorly than extended TE, but were useful when data length was short. A computational performance analysis demonstrated that the algorithm for extended TE, when used on currently available desktop computers, could extract effective connectivity from 1 hr recordings containing 200 neurons in ~5 min. We conclude that extending TE to multiple delays and message lengths improves its ability to assess effective connectivity between spiking neurons. These extensions to TE soon could become practical tools for experimentalists who record hundreds of spiking neurons. © 2011 Ito et al.},
 bibtype = {article},
 author = {Ito, S and Hansen, M E and Heiland, R and Lumsdaine, A and Litke, A M and Beggs, J M},
 doi = {10.1371/journal.pone.0027431},
 journal = {PLoS ONE},
 number = {11}
}

Transfer entropy (TE) is an information-theoretic measure which has received recent attention in neuroscience for its potential to identify effective connectivity between neurons. Calculating TE for large ensembles of spiking neurons is computationally intensive, and has caused most investigators to probe neural interactions at only a single time delay and at a message length of only a single time bin. This is problematic, as synaptic delays between cortical neurons, for example, range from one to tens of milliseconds. In addition, neurons produce bursts of spikes spanning multiple time bins. To address these issues, here we introduce a free software package that allows TE to be measured at multiple delays and message lengths. To assess performance, we applied these extensions of TE to a spiking cortical network model (Izhikevich, 2006) with known connectivity and a range of synaptic delays. For comparison, we also investigated single-delay TE, at a message length of one bin (D1TE), and cross-correlation (CC) methods. We found that D1TE could identify 36% of true connections when evaluated at a false positive rate of 1%. For extended versions of TE, this dramatically improved to 73% of true connections. In addition, the connections correctly identified by extended versions of TE accounted for 85% of the total synaptic weight in the network. Cross correlation methods generally performed more poorly than extended TE, but were useful when data length was short. A computational performance analysis demonstrated that the algorithm for extended TE, when used on currently available desktop computers, could extract effective connectivity from 1 hr recordings containing 200 neurons in ~5 min. We conclude that extending TE to multiple delays and message lengths improves its ability to assess effective connectivity between spiking neurons. These extensions to TE soon could become practical tools for experimentalists who record hundreds of spiking neurons. © 2011 Ito et al.

@inproceedings{
 title = {Active pebbles: Parallel programming for data-driven applications},
 type = {inproceedings},
 year = {2011},
 keywords = {Active message,Active routing,Algorithms,Application area,Computer systems programming,Electric network analysis,Flocculati},
 pages = {235-244},
 websites = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-79959600862&doi=10.1145%2F1995896.1995934&partnerID=40&md5=e6c07eb3ac5e5e7f3ad670bbb69d502b},
 publisher = {ACM},
 city = {Tucson, AZ},
 id = {f914ff38-d66d-3e80-af8d-ca4a00d80edc},
 created = {2018-03-13T18:36:23.628Z},
 file_attached = {false},
 profile_id = {42d295c0-0737-38d6-8b43-508cab6ea85d},
 group_id = {be743863-c45b-320e-a8f8-6b8511f39f77},
 last_modified = {2018-03-13T18:36:23.628Z},
 read = {false},
 starred = {false},
 authored = {false},
 confirmed = {true},
 hidden = {false},
 citation_key = {Willcock2011235},
 source_type = {conference},
 notes = {<b>From Duplicate 1 (<i>Active pebbles: Parallel programming for data-driven applications</i> - Willcock, J J; Hoefler, T; Edmonds, N G; Lumsdaine, A)<br/></b><br/>cited By 28; Conference of 25th ACM International Conference on Supercomputing, ICS 2011 ; Conference Date: 31 May 2011 Through 4 June 2011; Conference Code:85314},
 private_publication = {false},
 abstract = {The scope of scientific computing continues to grow and now includes diverse application areas such as network analysis, combinatorialcomputing, and knowledge discovery, to name just a few. Large problems in these application areas require HPC resources, but they exhibit computation and communication patterns that are irregular, fine-grained, and non-local, making it difficult to apply traditional HPC approaches to achieve scalable solutions. In this paper we present Active Pebbles, a programming and execution model developed explicitly to enable the development of scalable software for these emerging application areas. Our approach relies on five main techniques - scalable addressing, active routing, message coalescing, message reduction, and termination detection - to separate algorithm expression from communication optimization. Using this approach, algorithms can be expressed in their natural forms, with their natural levels of granularity, while optimizations necessary for scalability can be applied automatically to match the characteristics of particular machines. We implement several example kernels using both Active Pebbles and existing programming models, evaluating both programmability and performance. Our experimental results demonstrate that the Active Pebbles model can succinctly and directly express irregular application kernels, while still achieving performance comparable to MPI-based implementations that are significantly more complex. © 2011 ACM.},
 bibtype = {inproceedings},
 author = {Willcock, Jeremiah James and Hoefler, Torsten and Edmonds, Nicholas Gerard and Lumsdaine, Andrew},
 doi = {10.1145/1995896.1995934},
 booktitle = {Proceedings of the International Conference on Supercomputing}
}

The scope of scientific computing continues to grow and now includes diverse application areas such as network analysis, combinatorialcomputing, and knowledge discovery, to name just a few. Large problems in these application areas require HPC resources, but they exhibit computation and communication patterns that are irregular, fine-grained, and non-local, making it difficult to apply traditional HPC approaches to achieve scalable solutions. In this paper we present Active Pebbles, a programming and execution model developed explicitly to enable the development of scalable software for these emerging application areas. Our approach relies on five main techniques - scalable addressing, active routing, message coalescing, message reduction, and termination detection - to separate algorithm expression from communication optimization. Using this approach, algorithms can be expressed in their natural forms, with their natural levels of granularity, while optimizations necessary for scalability can be applied automatically to match the characteristics of particular machines. We implement several example kernels using both Active Pebbles and existing programming models, evaluating both programmability and performance. Our experimental results demonstrate that the Active Pebbles model can succinctly and directly express irregular application kernels, while still achieving performance comparable to MPI-based implementations that are significantly more complex. © 2011 ACM.

@inproceedings{
 title = {An access control architecture for distributing trust in pervasive computing environments},
 type = {inproceedings},
 year = {2010},
 keywords = {Access control,Access control architecture; Access control scheme,Cryptography; Distributed computer systems; Human},
 pages = {695-702},
 websites = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-79951784001&doi=10.1109%2FEUC.2010.110&partnerID=40&md5=053eead1bf7fc45a84191cfbca79f1b9},
 city = {Hong Kong},
 id = {bda39ed5-20c6-3e1b-9e5c-7d2b89f667ac},
 created = {2018-03-13T18:36:22.093Z},
 file_attached = {false},
 profile_id = {42d295c0-0737-38d6-8b43-508cab6ea85d},
 group_id = {be743863-c45b-320e-a8f8-6b8511f39f77},
 last_modified = {2018-03-13T18:36:22.093Z},
 read = {false},
 starred = {false},
 authored = {false},
 confirmed = {true},
 hidden = {false},
 citation_key = {Hill2010695},
 source_type = {conference},
 notes = {cited By 0; Conference of IEEE/IFIP 8th International Conference on Embedded and Ubiquitous Computing, EUC 2010 ; Conference Date: 11 December 2010 Through 13 December 2010; Conference Code:83896},
 private_publication = {false},
 abstract = {Pervasive computing infrastructure is highly distributed and it is essential to develop security mechanisms that enhance the security of the system by distributing trust among the various infrastructure components. We present a novel access control architecture explicitly designed to distribute trust that combines threshold cryptography, multi-layer encryption, and mediated access to contextual data to support dynamically changing access control permissions. We present several models of our access control infrastructure and evaluate how well each design distributes trust and limits the behavior of misbehaving components. We also simulate the behavior of our threshold-based access control scheme and evaluate the overhead of each infrastructure model. © 2010 IEEE.},
 bibtype = {inproceedings},
 author = {Hill, R and Al-Muhtadi, J and Byrd, W E},
 doi = {10.1109/EUC.2010.110},
 booktitle = {Proceedings - IEEE/IFIP International Conference on Embedded and Ubiquitous Computing, EUC 2010}
}

Pervasive computing infrastructure is highly distributed and it is essential to develop security mechanisms that enhance the security of the system by distributing trust among the various infrastructure components. We present a novel access control architecture explicitly designed to distribute trust that combines threshold cryptography, multi-layer encryption, and mediated access to contextual data to support dynamically changing access control permissions. We present several models of our access control infrastructure and evaluate how well each design distributes trust and limits the behavior of misbehaving components. We also simulate the behavior of our threshold-based access control scheme and evaluate the overhead of each infrastructure model. © 2010 IEEE.

@article{
 title = {α lean TA P: A declarative theorem prover for first-order classical logic},
 type = {article},
 year = {2008},
 keywords = {Classical logic; First order; Nominal logic; Prov,Computer programming; Logic programming; Programmi,Program translators; Theorem proving},
 pages = {238-252},
 volume = {5366 LNCS},
 websites = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-58549102767&doi=10.1007%2F978-3-540-89982-2_26&partnerID=40&md5=f016be2ae9aa5d5b9df874840bae73ad},
 city = {Udine},
 id = {49f0022f-259a-3b10-9588-694868fc6d9f},
 created = {2018-03-13T18:36:23.956Z},
 file_attached = {false},
 profile_id = {42d295c0-0737-38d6-8b43-508cab6ea85d},
 group_id = {be743863-c45b-320e-a8f8-6b8511f39f77},
 last_modified = {2018-03-13T18:36:23.956Z},
 read = {false},
 starred = {false},
 authored = {false},
 confirmed = {true},
 hidden = {false},
 citation_key = {Near2008238},
 source_type = {article},
 notes = {cited By 1; Conference of 24th International Conference on Logic Programming, ICLP 2008 ; Conference Date: 9 December 2008 Through 13 December 2008; Conference Code:75119},
 private_publication = {false},
 abstract = {We present α lean TA P, a declarative tableau-based theorem prover written as a pure relation. Like lean TA P, on which it is based, α lean TA P can prove ground theorems in first-order classical logic. Since it is declarative, α lean TA P generates theorems and accepts non-ground theorems and proofs. The lack of mode restrictions also allows the user to provide guidance in proving complex theorems and to ask the prover to instantiate non-ground parts of theorems. We present a complete implementation of α lean TA P, beginning with a translation of lean TA P into αKanren, an embedding of nominal logic programming in Scheme. We then show how to use a combination of tagging and nominal unification to eliminate the impure operators inherited from lean TA P, resulting in a purely declarative theorem prover. © 2008 Springer Berlin Heidelberg.},
 bibtype = {article},
 author = {Near, J P and Byrd, W E and Friedman, D P},
 doi = {10.1007/978-3-540-89982-2_26},
 journal = {Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)}
}

We present α lean TA P, a declarative tableau-based theorem prover written as a pure relation. Like lean TA P, on which it is based, α lean TA P can prove ground theorems in first-order classical logic. Since it is declarative, α lean TA P generates theorems and accepts non-ground theorems and proofs. The lack of mode restrictions also allows the user to provide guidance in proving complex theorems and to ask the prover to instantiate non-ground parts of theorems. We present a complete implementation of α lean TA P, beginning with a translation of lean TA P into αKanren, an embedding of nominal logic programming in Scheme. We then show how to use a combination of tagging and nominal unification to eliminate the impure operators inherited from lean TA P, resulting in a purely declarative theorem prover. © 2008 Springer Berlin Heidelberg.