A High-Speed FPGA Implementation of an RSD-Based ECC Processor. Marzouqi, H., Al-Qutayri, M., Salah, K., Schinianakis, D., & Stouraitis, T. IEEE Trans. VLSI Syst., 24(1):151-164, 2016.
A High-Speed FPGA Implementation of an RSD-Based ECC Processor. [link]Link  A High-Speed FPGA Implementation of an RSD-Based ECC Processor. [link]Paper  bibtex   
@article{journals/tvlsi/MarzouqiASSS16,
  added-at = {2016-01-07T00:00:00.000+0100},
  author = {Marzouqi, Hamad and Al-Qutayri, Mahmoud and Salah, Khaled and Schinianakis, Dimitrios and Stouraitis, Thanos},
  biburl = {http://www.bibsonomy.org/bibtex/22dd40c39f42341a638bd2821df7b6872/dblp},
  ee = {http://dx.doi.org/10.1109/TVLSI.2015.2391274},
  interhash = {4fffb6283e5a5e7427b647da8293624c},
  intrahash = {2dd40c39f42341a638bd2821df7b6872},
  journal = {IEEE Trans. VLSI Syst.},
  keywords = {dblp},
  number = 1,
  pages = {151-164},
  timestamp = {2016-01-13T11:37:16.000+0100},
  title = {A High-Speed FPGA Implementation of an RSD-Based ECC Processor.},
  url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi24.html#MarzouqiASSS16},
  volume = 24,
  year = 2016
}
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