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\n\n \n \n 2024\n \n \n (3)\n \n \n
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\n \n \n\n \n \n Bieber, L., Wang, L., & Jatskevich, J.\n\n\n \n \n \n \n Dual-Arm Modular Multilevel Converter With a Compact Footprint for VSC-HVDC Applications.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Delivery, 39(1): 504-517. Feb 2024.\n \n\n\n\n
\n\n\n\n \n\n \n \n doi\n \n \n\n \n link\n \n \n\n bibtex\n \n\n \n \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n \n \n \n \n \n\n\n\n
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\n\n\n@ARTICLE{10125067,\n author={Bieber, Levi and Wang, Liwei and Jatskevich, Juri},\n journal={IEEE Transactions on Power Delivery}, \n title={Dual-Arm Modular Multilevel Converter With a Compact Footprint for VSC-HVDC Applications}, \n year={2024},\n volume={39},\n number={1},\n pages={504-517},\n abstract={In this paper, a novel dual-arm modular multilevel converter (DAC) with inherent DC-fault-blocking capability is proposed that needs only two stacks of submodules (SMs), as well as director switches (DSs), for multilevel AC/DC conversion. Compared to the state-of-the-art modular multilevel converter (MMC) technologies with six SM-based arms, the DAC's dual multiplexed converter arm structure, combined with needing approximately 75% less capacitive energy storage than the MMC, facilitate a smaller converter station footprint. This paper presents the operating principle of the DAC and benchmarks it against other voltage source converter technologies based on converter functionalities, component count, capacitive energy storage requirements, and semiconductor losses for high voltage direct current transmission (HVDC) application. For a wider output voltage range, overlap operation is proposed to enable circulating currents to balance the SM capacitors’ energy cycle-to-cycle. A 600 kV HVDC system simulation study is presented that demonstrates the DAC's ability to (1) transmit power bidirectionally under nominal conditions, and (2) extinguish fault currents during DC-side short-circuit fault. A ${200}\\; {{{V}}}_{\\text{DC}}$ scaled-down converter hardware implementation further verifies the DAC's operating principle.},\n keywords={Voltage;Switches;Topology;Multilevel converters;Hybrid power systems;Energy storage;Insulated gate bipolar transistors;AC/DC power conversion;dual-arm converter (DAC);hybrid multilevel converter;modular multilevel converter (MMC);voltage-source converter (VSC)},\n doi={10.1109/TPWRD.2023.3275445},\n ISSN={1937-4208},\n month={Feb},}\n\n In this paper, a novel dual-arm modular multilevel converter (DAC) with inherent DC-fault-blocking capability is proposed that needs only two stacks of submodules (SMs), as well as director switches (DSs), for multilevel AC/DC conversion. Compared to the state-of-the-art modular multilevel converter (MMC) technologies with six SM-based arms, the DAC's dual multiplexed converter arm structure, combined with needing approximately 75% less capacitive energy storage than the MMC, facilitate a smaller converter station footprint. This paper presents the operating principle of the DAC and benchmarks it against other voltage source converter technologies based on converter functionalities, component count, capacitive energy storage requirements, and semiconductor losses for high voltage direct current transmission (HVDC) application. For a wider output voltage range, overlap operation is proposed to enable circulating currents to balance the SM capacitors’ energy cycle-to-cycle. A 600 kV HVDC system simulation study is presented that demonstrates the DAC's ability to (1) transmit power bidirectionally under nominal conditions, and (2) extinguish fault currents during DC-side short-circuit fault. A ${200} {{{V}}}_{\\text{DC}}$ scaled-down converter hardware implementation further verifies the DAC's operating principle.\n
\n\n\n\n \n\n \n \n Bieber, L., Wang, L., & Jatskevich, J.\n\n\n \n \n \n \n Multiplexed-Stack Converter With DC-Fault Ride-Through Capability and High Compactness.\n \n \n \n\n\n \n\n\n\n IEEE Journal of Emerging and Selected Topics in Power Electronics, 12(1): 718-730. Feb 2024.\n \n\n\n\n
\n\n\n\n \n\n \n \n doi\n \n \n\n \n link\n \n \n\n bibtex\n \n\n \n \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n \n \n \n \n \n\n\n\n
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\n\n\n@ARTICLE{10286035,\n author={Bieber, Levi and Wang, Liwei and Jatskevich, Juri},\n journal={IEEE Journal of Emerging and Selected Topics in Power Electronics}, \n title={Multiplexed-Stack Converter With DC-Fault Ride-Through Capability and High Compactness}, \n year={2024},\n volume={12},\n number={1},\n pages={718-730},\n abstract={This article presents a new multiplexed-stack converter (MSC) for high-voltage direct-current (HVDC) power conversion. The MSC reduces the number of stacks of submodules (SMs) needed for three-phase alternating-current (AC) systems from six, as in conventional modular multilevel converters (MMCs), to four, which can substantially decrease the size of converter stations. The MSC comprises two full-bridge SM (FBSM)-based Outer stacks, two half-bridge SM (HBSM)-based Inner SM stacks, and director-switch (DS) valves to generate sinusoidal three-phase AC voltages. The MSC offers several benefits over existing converters: it can handle and block DC faults due to its FBSM-based Outer stacks, it can attain high efficiency due to its HBSM-based Inner stacks, and it can ease valve design due to fundamental-frequency and zero-voltage-switching (ZVS) operation of its DSs. A sweet-spot operating voltage is derived where the Outer and Inner stack energies are naturally balanced without the need of DC pole capacitors (PCs). For deviations from the sweet-spot voltage, DC-side PCs enable energy balancing for the stacks. This article presents HVDC-scale simulations and reduced-scale hardware experiments that confirm the MSC’s performance in real and reactive power conversion. This article also contrasts the MSC with other state-of-the-art converters, indicating its competitive efficiency and compactness.},\n keywords={Topology;Power conversion;Switching loss;Zero voltage switching;Multilevel converters;Capacitors;Multiplexing;Alternating-current (AC/DC) power conversion;hybrid multilevel converter (HMC);modular multilevel converter (MMC);voltage-source converter high-voltage direct current (VSC-HVDC)},\n doi={10.1109/JESTPE.2023.3324873},\n ISSN={2168-6785},\n month={Feb},}\n\n This article presents a new multiplexed-stack converter (MSC) for high-voltage direct-current (HVDC) power conversion. The MSC reduces the number of stacks of submodules (SMs) needed for three-phase alternating-current (AC) systems from six, as in conventional modular multilevel converters (MMCs), to four, which can substantially decrease the size of converter stations. The MSC comprises two full-bridge SM (FBSM)-based Outer stacks, two half-bridge SM (HBSM)-based Inner SM stacks, and director-switch (DS) valves to generate sinusoidal three-phase AC voltages. The MSC offers several benefits over existing converters: it can handle and block DC faults due to its FBSM-based Outer stacks, it can attain high efficiency due to its HBSM-based Inner stacks, and it can ease valve design due to fundamental-frequency and zero-voltage-switching (ZVS) operation of its DSs. A sweet-spot operating voltage is derived where the Outer and Inner stack energies are naturally balanced without the need of DC pole capacitors (PCs). For deviations from the sweet-spot voltage, DC-side PCs enable energy balancing for the stacks. This article presents HVDC-scale simulations and reduced-scale hardware experiments that confirm the MSC’s performance in real and reactive power conversion. This article also contrasts the MSC with other state-of-the-art converters, indicating its competitive efficiency and compactness.\n
\n\n\n\n \n\n \n \n Zhang, Y., Qian, W., Shao, J., Zhang, F., Wang, L., Hu, Q., & Li, W.\n\n\n \n \n \n \n Adaptive Voltage Reference Based Controls of Converter Power Sharing and Pilot Voltage in HVDC System for Large-Scale Offshore Wind Integration.\n \n \n \n\n\n \n\n\n\n IEEE Open Access Journal of Power and Energy, 11: 55-67. 2024.\n \n\n\n\n
\n\n\n\n \n\n \n \n doi\n \n \n\n \n link\n \n \n\n bibtex\n \n\n \n \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n \n \n \n \n \n\n\n\n
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\n\n\n@ARTICLE{10400575,\n author={Zhang, Yuanshi and Qian, Wenyan and Shao, Jun and Zhang, Fei and Wang, Liwei and Hu, Qinran and Li, Wei},\n journal={IEEE Open Access Journal of Power and Energy}, \n title={Adaptive Voltage Reference Based Controls of Converter Power Sharing and Pilot Voltage in HVDC System for Large-Scale Offshore Wind Integration}, \n year={2024},\n volume={11},\n number={},\n pages={55-67},\n abstract={Active power sharing and voltage regulation are two of the major control challenges in the operation of the voltage source converter based multi-terminal high-voltage DC (VSC-MTDC) system when integrating large-scale offshore wind farms (OWFs). This paper proposes two novel adaptive voltage reference based droop control methods to regulate pilot DC voltage and share the power burden autonomously. The proposed Method I utilizes DC grid lossy model with the local voltage droop control strategy, while the proposed Method II adopts a modified pilot voltage droop control (MPVDC) to avoid the large errors caused by the DC grid lossless model. Dynamic simulations of a five-terminal MTDC grid are carried out using MATLAB/Simulink SimPowerSystems /Specialized Technology to verify the proposed autonomous control methods under various types of disturbance and contingency. In addition, comparative study is implemented to demonstrate the advantages of the proposed methods.},\n keywords={Voltage control;Load flow;Contingency management;Mathematical models;Wind farms;Steady-state;High-voltage techniques;Adaptive voltage reference based droop;autonomous control;offshore wind farms (OWFs);power sharing;power-voltage droop control;voltage regulation;voltage source converter based multi-terminal high-voltage DC (VSC-MTDC)},\n doi={10.1109/OAJPE.2024.3354079},\n ISSN={2687-7910},\n month={},}\n\n Active power sharing and voltage regulation are two of the major control challenges in the operation of the voltage source converter based multi-terminal high-voltage DC (VSC-MTDC) system when integrating large-scale offshore wind farms (OWFs). This paper proposes two novel adaptive voltage reference based droop control methods to regulate pilot DC voltage and share the power burden autonomously. The proposed Method I utilizes DC grid lossy model with the local voltage droop control strategy, while the proposed Method II adopts a modified pilot voltage droop control (MPVDC) to avoid the large errors caused by the DC grid lossless model. Dynamic simulations of a five-terminal MTDC grid are carried out using MATLAB/Simulink SimPowerSystems /Specialized Technology to verify the proposed autonomous control methods under various types of disturbance and contingency. In addition, comparative study is implemented to demonstrate the advantages of the proposed methods.\n
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\n \n \n\n \n \n Bieber, L. M., Pfannschmidt, J. A., Wang, L., Jatskevich, J., & Li, W.\n\n\n \n \n \n \n A Hybrid Five-Level Modular Multilevel Converter With High Efficiency and Small Energy Storage Requirements for HVDC Transmission.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Industrial Electronics, 70(2): 1597-1608. Feb 2023.\n \n\n\n\n
\n\n\n\n \n\n \n \n doi\n \n \n\n \n link\n \n \n\n bibtex\n \n\n \n \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n \n \n \n \n \n\n\n\n
\n\n\n \n\n\n\n \n\n \n \n doi\n \n \n\n \n link\n \n \n\n bibtex\n \n\n \n \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n \n \n \n \n \n\n\n\n
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\n\n\n@ARTICLE{9735155,\n author={Bieber, Levi M. and Pfannschmidt, Joel A. and Wang, Liwei and Jatskevich, Juri and Li, Wei},\n journal={IEEE Transactions on Industrial Electronics}, \n title={A Hybrid Five-Level Modular Multilevel Converter With High Efficiency and Small Energy Storage Requirements for HVDC Transmission}, \n year={2023},\n volume={70},\n number={2},\n pages={1597-1608},\n abstract={This article presents a hybrid five-level converter (H5LC) with cascaded full-bridge submodules (FBSMs) for high voltage direct current (HVdc) transmission. A five-level converter operates at a fundamental switching frequency to generate symmetric five-level square wave output voltages which are shaped into smooth sinusoidal voltages by the ac-side FBSMs. Using a proposed third-order harmonic voltage injection scheme, the FBSMs’ total blocking voltage is limited to one-eighth of the dc-side voltage, reducing the H5LC's losses, footprint, and capital costs. dc pole-to-pole fault blocking is enabled using a bypass branch consisting of bidirectional thyristor valves and fast mechanical switches to suppress the ac-side fault contribution within half a fundamental cycle. Full-scale HVdc simulation studies show the H5LC's ability to control real and reactive powers and additionally, its dc fault resilience. A lab-scale hardware implementation of an H5LC with 30 FBSMs is presented to verify its operating principle. In contrast to the half-bridge submodule based modular multilevel converter, the H5LC has improved efficiency, fewer semiconductor devices, and significantly reduced energy storage requirements.},\n keywords={Circuit faults;Topology;Insulated gate bipolar transistors;Power conversion;HVDC transmission;Converters;Capacitors;AC/dc power conversion;hybrid multilevel converter;modular multilevel converter (MMC);voltage-source converter high voltage direct current (VSC-HVdc)},\n doi={10.1109/TIE.2022.3158006},\n ISSN={1557-9948},\n month={Feb},}\n\n This article presents a hybrid five-level converter (H5LC) with cascaded full-bridge submodules (FBSMs) for high voltage direct current (HVdc) transmission. A five-level converter operates at a fundamental switching frequency to generate symmetric five-level square wave output voltages which are shaped into smooth sinusoidal voltages by the ac-side FBSMs. Using a proposed third-order harmonic voltage injection scheme, the FBSMs’ total blocking voltage is limited to one-eighth of the dc-side voltage, reducing the H5LC's losses, footprint, and capital costs. dc pole-to-pole fault blocking is enabled using a bypass branch consisting of bidirectional thyristor valves and fast mechanical switches to suppress the ac-side fault contribution within half a fundamental cycle. Full-scale HVdc simulation studies show the H5LC's ability to control real and reactive powers and additionally, its dc fault resilience. A lab-scale hardware implementation of an H5LC with 30 FBSMs is presented to verify its operating principle. In contrast to the half-bridge submodule based modular multilevel converter, the H5LC has improved efficiency, fewer semiconductor devices, and significantly reduced energy storage requirements.\n
\n\n\n\n \n\n \n \n Bieber, L., Wang, L., Jatskevich, J., & Li, W.\n\n\n \n \n \n \n Universal Equivalent Model for Real-Time CPU/FPGA Co-Simulation of Hybrid Cascaded Multilevel Converters.\n \n \n \n\n\n \n\n\n\n IEEE Access, 11: 4228-4241. 2023.\n \n\n\n\n
\n\n\n\n \n\n \n \n doi\n \n \n\n \n link\n \n \n\n bibtex\n \n\n \n \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n \n \n \n \n \n\n\n\n
\n\n\n \n\n\n\n \n\n \n \n doi\n \n \n\n \n link\n \n \n\n bibtex\n \n\n \n \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n \n \n \n \n \n\n\n\n
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\n\n\n@ARTICLE{10011408,\n author={Bieber, Levi and Wang, Liwei and Jatskevich, Juri and Li, Wei},\n journal={IEEE Access}, \n title={Universal Equivalent Model for Real-Time CPU/FPGA Co-Simulation of Hybrid Cascaded Multilevel Converters}, \n year={2023},\n volume={11},\n number={},\n pages={4228-4241},\n abstract={Real-time simulation is important for ensuring the reliable operation of VSC-HVDC converters in power grids, particularly through the use of rapid control prototyping (RCP) and hardware-in-the-loop (HIL) based converter controllers. While real-time simulation is a common practice for modular multilevel converters (MMCs), it has been less frequently applied to the new class of hybrid cascaded multilevel converters (HCMCs). In this study, a universal equivalent model (UEM) is proposed for a range of HCMC topologies that combines accuracy and computational efficiency through the use of both CPUs and field-programmable gate arrays (FPGAs). The proposed UEM is derived using the hybrid five-level converter (H5LC), a compact, efficient, and fault-tolerant VSC within the HCMC family. The UEM relies on CPUs to simulate the main circuits and controls of the main converter, and utilizes FPGAs to calculate the instantaneous voltages of a large number of full-bridge submodules (FBSMs), flying capacitors, and DC-side pole capacitors. In addition, the FBSMs’ voltage-balancing and switching algorithms are implemented on the FPGAs. The proposed real-time CPU/FPGA-based H5LC-UEM is compared to an offline CPU-based detailed equivalent model to verify its accuracy.},\n keywords={HVDC transmission;Topology;Multilevel converters;Real-time systems;Computational modeling;Voltage control;Field programmable gate arrays;High-voltage techniques;FPGA;hybrid multilevel converter;modular multilevel converter (MMC);rapid control prototyping (RCP);real-time simulation;voltage-source converter high voltage direct current (VSC-HVDC)},\n doi={10.1109/ACCESS.2023.3235272},\n ISSN={2169-3536},\n month={},}\n\n Real-time simulation is important for ensuring the reliable operation of VSC-HVDC converters in power grids, particularly through the use of rapid control prototyping (RCP) and hardware-in-the-loop (HIL) based converter controllers. While real-time simulation is a common practice for modular multilevel converters (MMCs), it has been less frequently applied to the new class of hybrid cascaded multilevel converters (HCMCs). In this study, a universal equivalent model (UEM) is proposed for a range of HCMC topologies that combines accuracy and computational efficiency through the use of both CPUs and field-programmable gate arrays (FPGAs). The proposed UEM is derived using the hybrid five-level converter (H5LC), a compact, efficient, and fault-tolerant VSC within the HCMC family. The UEM relies on CPUs to simulate the main circuits and controls of the main converter, and utilizes FPGAs to calculate the instantaneous voltages of a large number of full-bridge submodules (FBSMs), flying capacitors, and DC-side pole capacitors. In addition, the FBSMs’ voltage-balancing and switching algorithms are implemented on the FPGAs. The proposed real-time CPU/FPGA-based H5LC-UEM is compared to an offline CPU-based detailed equivalent model to verify its accuracy.\n
\n\n\n\n \n\n \n \n Zhang, F., Bieber, L., Zhang, Y., Li, W., & Wang, L.\n\n\n \n \n \n \n A Multi-Port DC Power Flow Controller Integrated With MMC Stations for Offshore Meshed Multi-Terminal HVDC Grids.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Sustainable Energy, 14(3): 1676-1691. July 2023.\n \n\n\n\n
\n\n\n\n \n\n \n \n doi\n \n \n\n \n link\n \n \n\n bibtex\n \n\n \n \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n \n \n \n \n \n\n\n\n
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\n\n\n@ARTICLE{10039685,\n author={Zhang, Fei and Bieber, Levi and Zhang, Yuanshi and Li, Wei and Wang, Liwei},\n journal={IEEE Transactions on Sustainable Energy}, \n title={A Multi-Port DC Power Flow Controller Integrated With MMC Stations for Offshore Meshed Multi-Terminal HVDC Grids}, \n year={2023},\n volume={14},\n number={3},\n pages={1676-1691},\n abstract={Multi-terminal dc (MTDC) systems have the potential to facilitate the integration of offshore wind farms. A dc power flow controller (DPFC) is necessary for meshed multi-terminal high voltage dc (HVDC) grids to regulate the power flow in dc lines. However, DPFCs based on modular multilevel converters (MMCs) require two dc-ac conversion stages and an extra ac transformer, which increases the cost and loss for offshore platforms. This paper proposes a multi-port DPFC that is integrated internally into the offshore MMC station, eliminating the need for an extra transformer and reducing dc voltage ripple. Additionally, the full bridge submodules (FBSMs) in the DPFC can further reduce the number of FBSMs required in the MMC station for dc fault blocking. The proposed DPFC is composed only of cascaded FBSMs connected to the arms of the offshore MMC station, which can exchange power directly with the MMC valve to achieve power balance. By using the MMC station, the proposed DPFC requires a small kVA rating, approximately 1%-5% of the total system power rating. The performance of the proposed DPFC is validated through simulation of a hybrid system of the IEEE 39 bus and the Cigre HVDC benchmark, and also through down-scale experimental testing.},\n keywords={Voltage control;Load flow;HVDC transmission;Transformers;Wind farms;Resistance;Topology;Offshore wind farms;multi-terminal HVDC;dc power flow controller;modular multilevel converter},\n doi={10.1109/TSTE.2023.3243163},\n ISSN={1949-3037},\n month={July},}\n\n Multi-terminal dc (MTDC) systems have the potential to facilitate the integration of offshore wind farms. A dc power flow controller (DPFC) is necessary for meshed multi-terminal high voltage dc (HVDC) grids to regulate the power flow in dc lines. However, DPFCs based on modular multilevel converters (MMCs) require two dc-ac conversion stages and an extra ac transformer, which increases the cost and loss for offshore platforms. This paper proposes a multi-port DPFC that is integrated internally into the offshore MMC station, eliminating the need for an extra transformer and reducing dc voltage ripple. Additionally, the full bridge submodules (FBSMs) in the DPFC can further reduce the number of FBSMs required in the MMC station for dc fault blocking. The proposed DPFC is composed only of cascaded FBSMs connected to the arms of the offshore MMC station, which can exchange power directly with the MMC valve to achieve power balance. By using the MMC station, the proposed DPFC requires a small kVA rating, approximately 1%-5% of the total system power rating. The performance of the proposed DPFC is validated through simulation of a hybrid system of the IEEE 39 bus and the Cigre HVDC benchmark, and also through down-scale experimental testing.\n
\n\n\n\n \n\n \n \n Dey, A., Shafiei, N., Khandekhar, R., Eberle, W., & Li, R.\n\n\n \n \n \n \n Low Computational Cost Thermal Modelling of High-Frequency Power Transformers using an Admittance Matrix Apporach.\n \n \n \n\n\n \n\n\n\n In 2023 22nd IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm), pages 1-8, May 2023. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{10177609,\n author={Dey, Anshuman and Shafiei, Navid and Khandekhar, Rahul and Eberle, Wilson and Li, Ri},\n booktitle={2023 22nd IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)}, \n title={Low Computational Cost Thermal Modelling of High-Frequency Power Transformers using an Admittance Matrix Apporach}, \n year={2023},\n volume={},\n number={},\n pages={1-8},\n abstract={Thermal modelling of magnetic components in high-frequency power electronic systems is not trivial. This can be attributed to the complex non-uniform losses, heterogenous construction of magnetic components, and the temperature dependence of electrical and magnetic properties. Accurate thermal modelling of such magnetic components relies on the use of bi-directionally coupled electromagnetic-thermal numerical analysis. Although such bi-directionally coupled numerical models provide accurate results, the computational cost of such models can be restrictive. Hence, there is a need for low computational cost thermal models of magnetic components. In this paper, we develop a low computational cost thermal model of a power transformer using the admittance matrix approach. First, a bi-directionally coupled multiphysics model of a power transformer is developed and validated using experimental test results. Using the numerical model, low-cost thermal models are evaluated for surface heat transfer coefficients varying between 1 to $\\mathbf{200}\\ \\boldsymbol{W}/\\boldsymbol{m}^{\\mathbf{2}}\\cdot \\boldsymbol{K}$, covering the typical thermal operating range of magnetic components housed in conventional power electronic systems. The final low-cost thermal model's surface temperature and heat flux predictions were within $\\pm \\mathbf{8}.\\mathbf{2}\\%$ of the numerical results, while the junction temperature error was $\\pm \\mathbf{6}.\\mathbf{18}\\ \\%$. The simplified thermal model developed shows close to Boundary Condition Independence (BCI) behaviour and is a low computational cost alternative to the numerical model.},\n keywords={Magnetic flux;Computational modeling;Thermomechanical processes;Bidirectional control;Power electronics;Numerical models;Computational efficiency;Compact Thermal Modelling;formatting;style;styling;insert},\n doi={10.1109/ITherm55368.2023.10177609},\n ISSN={2694-2135},\n month={May},}\n\n Thermal modelling of magnetic components in high-frequency power electronic systems is not trivial. This can be attributed to the complex non-uniform losses, heterogenous construction of magnetic components, and the temperature dependence of electrical and magnetic properties. Accurate thermal modelling of such magnetic components relies on the use of bi-directionally coupled electromagnetic-thermal numerical analysis. Although such bi-directionally coupled numerical models provide accurate results, the computational cost of such models can be restrictive. Hence, there is a need for low computational cost thermal models of magnetic components. In this paper, we develop a low computational cost thermal model of a power transformer using the admittance matrix approach. First, a bi-directionally coupled multiphysics model of a power transformer is developed and validated using experimental test results. Using the numerical model, low-cost thermal models are evaluated for surface heat transfer coefficients varying between 1 to $\\mathbf{200}\\ \\boldsymbol{W}/\\boldsymbol{m}^{\\mathbf{2}}· \\boldsymbol{K}$, covering the typical thermal operating range of magnetic components housed in conventional power electronic systems. The final low-cost thermal model's surface temperature and heat flux predictions were within $± \\mathbf{8}.\\mathbf{2}%$ of the numerical results, while the junction temperature error was $± \\mathbf{6}.\\mathbf{18}\\ %$. The simplified thermal model developed shows close to Boundary Condition Independence (BCI) behaviour and is a low computational cost alternative to the numerical model.\n
\n\n\n\n \n\n \n \n Toulabi, M. S., Filizadeh, S., Wang, L., Farahzadi, M., Nasiri-Zarandi, R., & Abbaszadeh, K.\n\n\n \n \n \n \n Voltage Overshoots Mitigation in a Long Cable PWM-Fed Induction Machine Using dv/dt Filters.\n \n \n \n\n\n \n\n\n\n In 2023 3rd International Conference on Electrical Machines and Drives (ICEMD), pages 1-7, Dec 2023. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{10429352,\n author={Toulabi, Mohammad Sedigh and Filizadeh, Shaahin and Wang, Liwei and Farahzadi, Mohammad and Nasiri-Zarandi, Reza and Abbaszadeh, Karim},\n booktitle={2023 3rd International Conference on Electrical Machines and Drives (ICEMD)}, \n title={Voltage Overshoots Mitigation in a Long Cable PWM-Fed Induction Machine Using dv/dt Filters}, \n year={2023},\n volume={},\n number={},\n pages={1-7},\n abstract={Significant voltage overshoots are observed in the input terminals of long cable pulse-width modulation (PWM)-fed induction machines, which can detrimentally impact the machine’s lifespan and performance. To mitigate this concerning phenomenon, dv/dt filters consisting of R, L, and C elements are used in the circuit. In this paper, the high-frequency model of a long cable PWM-fed induction machine is established, incorporating the high-frequency models of the machine and long cable, as well as the pulses generated by the PWM converter and filters. Differential mode and common mode impedance measurements are employed to develop the high-frequency model of the induction machine, while short circuit and open circuit impedance tests are conducted to establish the high-frequency models of the long cable. The transmission line modeling approach is then utilized to incorporate the high-frequency modeled machine and long cable, enabling the prediction of voltage overshoots at the machine’s terminal. Three distinct dv/dt filters are placed at the beginning, middle, and end of the long cable to mitigate the voltage overshoots in the terminal of the PWM-fed induction machine. Test results are presented for a 100 m cable, 2 hp machine fed by a PWM converter in the presence of the dv/dt filters, aiming to identify the appropriate filter location for minimizing voltage overshoots in the terminals of the machine.},\n keywords={Pulse width modulation converters;Power cables;Voltage;Predictive models;Transmission line measurements;Induction machines;Integrated circuit modeling;dv/dt filter;high-frequency modeling;induction machine;long cable;voltage overshoot.},\n doi={10.1109/ICEMD60816.2023.10429352},\n ISSN={},\n month={Dec},}\n\n Significant voltage overshoots are observed in the input terminals of long cable pulse-width modulation (PWM)-fed induction machines, which can detrimentally impact the machine’s lifespan and performance. To mitigate this concerning phenomenon, dv/dt filters consisting of R, L, and C elements are used in the circuit. In this paper, the high-frequency model of a long cable PWM-fed induction machine is established, incorporating the high-frequency models of the machine and long cable, as well as the pulses generated by the PWM converter and filters. Differential mode and common mode impedance measurements are employed to develop the high-frequency model of the induction machine, while short circuit and open circuit impedance tests are conducted to establish the high-frequency models of the long cable. The transmission line modeling approach is then utilized to incorporate the high-frequency modeled machine and long cable, enabling the prediction of voltage overshoots at the machine’s terminal. Three distinct dv/dt filters are placed at the beginning, middle, and end of the long cable to mitigate the voltage overshoots in the terminal of the PWM-fed induction machine. Test results are presented for a 100 m cable, 2 hp machine fed by a PWM converter in the presence of the dv/dt filters, aiming to identify the appropriate filter location for minimizing voltage overshoots in the terminals of the machine.\n
\n\n\n\n \n\n \n \n Dey, A., Shafiei, N., Li, R., Eberle, W., & Khandekar, R.\n\n\n \n \n \n \n Boundary condition independent thermal network modeling of high-frequency power transformers.\n \n \n \n\n\n \n\n\n\n Heat Transfer Engineering, 44(3): 259–276. 2023.\n \n\n\n\n
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\n\n\n\n@article{dey2023boundary,\n title={Boundary condition independent thermal network modeling of high-frequency power transformers},\n author={Dey, Anshuman and Shafiei, Navid and Li, Ri and Eberle, Wilson and Khandekar, Rahul},\n journal={Heat Transfer Engineering},\n volume={44},\n number={3},\n pages={259--276},\n year={2023},\n publisher={Taylor \\& Francis}\n}\n\n\n\n \n\n \n \n Hafezinasab, H., Botting, C. J., & Eberle, W. A. T.\n\n\n \n \n \n \n Apparatus and method for single-phase and three-phase power factor correction.\n \n \n \n\n\n \n\n\n\n January 3 2023.\n US Patent 11,545,892\n\n\n\n
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\n\n\n\n@misc{hafezinasab2023apparatus,\n title={Apparatus and method for single-phase and three-phase power factor correction},\n author={Hafezinasab, Hamidreza and Botting, Christopher Jon and Eberle, Wilson Allan Thomas},\n year={2023},\n month=jan # "~3",\n publisher={Google Patents},\n note={US Patent 11,545,892}\n}\n\n\n\n \n\n \n \n Dey, A., Shafiei, N., Li, R., Eberle, W., & Khandekar, R.\n\n\n \n \n \n \n Compact Thermal Modeling of Magnetic Components Using an Admittance Matrix Approach.\n \n \n \n\n\n \n\n\n\n Heat Transfer Engineering,1–20. 2023.\n \n\n\n\n
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\n \n \n\n \n \n Hsu, J., Ordonez, M., Eberle, W., Craciun, M., & Botting, C.\n\n\n \n \n \n \n Enhanced Small-Signal Modeling for Charge-Controlled Resonant Converters.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Electronics, 37(2): 1736-1747. Feb 2022.\n \n\n\n\n
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\n\n\n@ARTICLE{9519536,\n author={Hsu, Jhih-Da and Ordonez, Martin and Eberle, Wilson and Craciun, Marian and Botting, Chris},\n journal={IEEE Transactions on Power Electronics}, \n title={Enhanced Small-Signal Modeling for Charge-Controlled Resonant Converters}, \n year={2022},\n volume={37},\n number={2},\n pages={1736-1747},\n abstract={Charge control for resonant converters introduces an inner feedback loop that improves the system dynamic characteristics. However, small-signal modeling is not as straightforward with charge-controlled resonant converters as it is with current mode hard-switching topologies, due to the nature of resonant behavior. Conventional small-signal models for charge-controlled resonant converters are developed based on the converter input and output energy balance. This simplified approach overlooks the dynamics of the magnetizing inductor current and generates errors in small-signal frequency response. To improve the analytical model and enable high-bandwidth design, this article proposes a new methodology for modeling charge-controlled resonant converters. The energy stored in the resonant tank is analyzed using the theory of extended describing function, which accounts for the effect of the magnetizing current. This methodology applies to a wide range of charge control variants, such as bang-bang charge control and hybrid-hysteretic control. To demonstrate the modeling procedure, this article considers a high-order, five resonant-component half-bridge CLLC resonant converter as a case study. The proposed analytical model is applied to a 1 kW, 400-V/3.3-A power supply prototype for simulation and experimental validation. The proposed model successfully predicts the frequency response of the resonant converter across frequency and load conditions, providing rapid frequency-domain evaluation in the design process.},\n keywords={Predictive models;Mathematical model;Resonant converters;Voltage control;Frequency response;Analytical models;Magnetic resonance;Charge control;extended describing function (EDF);resonant converters;small-signal modeling},\n doi={10.1109/TPEL.2021.3106024},\n ISSN={1941-0107},\n month={Feb},}\n\n Charge control for resonant converters introduces an inner feedback loop that improves the system dynamic characteristics. However, small-signal modeling is not as straightforward with charge-controlled resonant converters as it is with current mode hard-switching topologies, due to the nature of resonant behavior. Conventional small-signal models for charge-controlled resonant converters are developed based on the converter input and output energy balance. This simplified approach overlooks the dynamics of the magnetizing inductor current and generates errors in small-signal frequency response. To improve the analytical model and enable high-bandwidth design, this article proposes a new methodology for modeling charge-controlled resonant converters. The energy stored in the resonant tank is analyzed using the theory of extended describing function, which accounts for the effect of the magnetizing current. This methodology applies to a wide range of charge control variants, such as bang-bang charge control and hybrid-hysteretic control. To demonstrate the modeling procedure, this article considers a high-order, five resonant-component half-bridge CLLC resonant converter as a case study. The proposed analytical model is applied to a 1 kW, 400-V/3.3-A power supply prototype for simulation and experimental validation. The proposed model successfully predicts the frequency response of the resonant converter across frequency and load conditions, providing rapid frequency-domain evaluation in the design process.\n
\n\n\n\n \n\n \n \n Arshadi, S. A., Ordonez, M., & Eberle, W.\n\n\n \n \n \n \n Current-Sharing Worst-Case Analysis of Three-Phase CLLC Resonant Converters.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Electronics, 37(3): 3099-3110. March 2022.\n \n\n\n\n
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\n\n\n@ARTICLE{9546636,\n author={Arshadi, Sayed Abbas and Ordonez, Martin and Eberle, Wilson},\n journal={IEEE Transactions on Power Electronics}, \n title={Current-Sharing Worst-Case Analysis of Three-Phase CLLC Resonant Converters}, \n year={2022},\n volume={37},\n number={3},\n pages={3099-3110},\n abstract={Three-phase CLLC resonant converters provide higher power conversion capability as compared to half-bridge and full-bridge structures. In addition to the unique features of CLLC converters for bidirectional applications, the three-phase structure provides significantly reduced output current ripple (smaller output capacitor), parallel power processing (reduced components size and current peak stress), and better thermal distribution (smaller heatsinks). However, with practical, i.e., nonzero, resonant component tolerances, these benefits are normally less, and sometimes significantly less than expected in the ideal case. In this article, the unbalanced behavior of the converter with 15 unknown resonant components is identified and analyzed. A new analysis methodology is proposed to investigate the worst-cases of current-sharing among above 32 000 possible scenarios in three-phase CLLC resonant converters. In addition, this article shows that phase-shifting techniques can be effective to mitigate the unbalanced behavior of the converter. The proposed analysis in this article helps to determine the highest admissible tolerance in the components to keep the converter working within a certain range of unbalanced behavior without requiring any balancing techniques. The proposed analytical framework is verified with experimental and simulation results of a 3-kW bidirectional three-phase CLLC experimental prototype.},\n keywords={Resonant converters;Equivalent circuits;Sensitivity analysis;Integrated circuit modeling;Harmonic analysis;Bidirectional control;Topology;Battery charger;current sharing;three-phase CLLC;unbalanced},\n doi={10.1109/TPEL.2021.3114402},\n ISSN={1941-0107},\n month={March},}\n\n Three-phase CLLC resonant converters provide higher power conversion capability as compared to half-bridge and full-bridge structures. In addition to the unique features of CLLC converters for bidirectional applications, the three-phase structure provides significantly reduced output current ripple (smaller output capacitor), parallel power processing (reduced components size and current peak stress), and better thermal distribution (smaller heatsinks). However, with practical, i.e., nonzero, resonant component tolerances, these benefits are normally less, and sometimes significantly less than expected in the ideal case. In this article, the unbalanced behavior of the converter with 15 unknown resonant components is identified and analyzed. A new analysis methodology is proposed to investigate the worst-cases of current-sharing among above 32 000 possible scenarios in three-phase CLLC resonant converters. In addition, this article shows that phase-shifting techniques can be effective to mitigate the unbalanced behavior of the converter. The proposed analysis in this article helps to determine the highest admissible tolerance in the components to keep the converter working within a certain range of unbalanced behavior without requiring any balancing techniques. The proposed analytical framework is verified with experimental and simulation results of a 3-kW bidirectional three-phase CLLC experimental prototype.\n
\n\n\n\n \n\n \n \n Zhang, Y., Shotorbani, A. M., Wang, L., & Li, W.\n\n\n \n \n \n \n A Combined Hierarchical and Autonomous DC Grid Control for Proportional Power Sharing With Minimized Voltage Variation and Transmission Loss.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Delivery, 37(4): 3213-3224. Aug 2022.\n \n\n\n\n
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\n\n\n@ARTICLE{9601259,\n author={Zhang, Yuanshi and Shotorbani, Amin Mohammadpour and Wang, Liwei and Li, Wei},\n journal={IEEE Transactions on Power Delivery}, \n title={A Combined Hierarchical and Autonomous DC Grid Control for Proportional Power Sharing With Minimized Voltage Variation and Transmission Loss}, \n year={2022},\n volume={37},\n number={4},\n pages={3213-3224},\n abstract={This paper presents a combined control scheme that consists of two complementary control strategies, namely hierarchical control and autonomous control to handle contingencies in a multi-terminal high voltage direct current (MTDC) system. The proposed hierarchical control considers three optimal targets, i.e., equal or proportional power sharing, minimizations of transmission loss and total DC voltage variation. The primary control layer implements the droop control for voltage source converters (VSCs). While in the secondary control layer, voltage reference setpoints of the VSCs in droop control scheme are calculated by the proposed optimal power flow method with the equal or proportional power sharing as equality constraints. As the hierarchical control relies on communication system, the autonomous control for power sharing can be activated during communication system malfunctioning or rapid power variation caused by renewable energy sources. The combined control strategy can greatly increase the reliability of the MTDC system. The simulation results of a five-terminal MTDC network conducted in the MATLAB/Simulink software verify the performance of the proposed combined control strategy.},\n keywords={Voltage control;Control systems;Power conversion;Load flow;Steady-state;Renewable energy sources;Switches;Adaptive droop control;autonomous control;combined control scheme;hierarchical control;MTDC;VSC},\n doi={10.1109/TPWRD.2021.3125254},\n ISSN={1937-4208},\n month={Aug},}\n\n This paper presents a combined control scheme that consists of two complementary control strategies, namely hierarchical control and autonomous control to handle contingencies in a multi-terminal high voltage direct current (MTDC) system. The proposed hierarchical control considers three optimal targets, i.e., equal or proportional power sharing, minimizations of transmission loss and total DC voltage variation. The primary control layer implements the droop control for voltage source converters (VSCs). While in the secondary control layer, voltage reference setpoints of the VSCs in droop control scheme are calculated by the proposed optimal power flow method with the equal or proportional power sharing as equality constraints. As the hierarchical control relies on communication system, the autonomous control for power sharing can be activated during communication system malfunctioning or rapid power variation caused by renewable energy sources. The combined control strategy can greatly increase the reliability of the MTDC system. The simulation results of a five-terminal MTDC network conducted in the MATLAB/Simulink software verify the performance of the proposed combined control strategy.\n
\n\n\n\n \n\n \n \n Han, J., Bieber, L. M., Paull, J., Wang, L., Li, W., & Paquin, J.\n\n\n \n \n \n \n Real-Time Simulation of Hybrid Three-Level and Modular Multilevel Converter Based on Complete Equivalent Model for High Voltage Direct Current Transmission System.\n \n \n \n\n\n \n\n\n\n IEEE Open Access Journal of Power and Energy, 9: 42-54. 2022.\n \n\n\n\n
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\n\n\n@ARTICLE{9662391,\n author={Han, Jintao and Bieber, Levi M. and Paull, Jared and Wang, Liwei and Li, Wei and Paquin, Jean-Nicolas},\n journal={IEEE Open Access Journal of Power and Energy}, \n title={Real-Time Simulation of Hybrid Three-Level and Modular Multilevel Converter Based on Complete Equivalent Model for High Voltage Direct Current Transmission System}, \n year={2022},\n volume={9},\n number={},\n pages={42-54},\n abstract={Real-time simulation is a crucial but complicated task for fast control prototyping of high-power converters. Detailed semiconductor device-based model simulates a large number of switching events at a small time step, which requires large computational effort and is thus challenging for real-time simulation. This paper proposes a complete equivalent model (CEM) approach for the real-time simulation of a hybrid 3-level and modular multilevel converter (H3LC). The presented CEM simplifies the detailed equivalent model (DEM) of the H3LC and facilitates the implementation of real-time simulation. A central processing unit (CPU) and field-programmable gate array (FPGA) based simulation is presented whereby the massive parallel computing power of the FPGA enables the simulation of the H3LC’s three-level T-type converter and the hundreds of series-connected full-bridge submodules. The rest of the converter system, including the converter controls, the AC grid, and the measurement of the AC currents are implemented within the CPU model. The FPGA-based converter model is interfaced with the CPU model using controlled voltage sources to represent the AC- and DC-side equivalent voltages of the H3LC. The OP5700 real-time digital simulator from OPAL-RT Technologies is used to realize the CPU-FPGA real-time simulation, which is verified by the offline MATLAB/Simulink Simscape model.},\n keywords={Real-time systems;Computational modeling;Field programmable gate arrays;Integrated circuit modeling;Multilevel converters;Switches;Semiconductor device modeling;Complete equivalent model;hybrid 3-level and modular multilevel converter;real-time simulation;field-programmable gate array simulation;high voltage direct current transmission;voltage source converter},\n doi={10.1109/OAJPE.2021.3138345},\n ISSN={2687-7910},\n month={},}\n\n Real-time simulation is a crucial but complicated task for fast control prototyping of high-power converters. Detailed semiconductor device-based model simulates a large number of switching events at a small time step, which requires large computational effort and is thus challenging for real-time simulation. This paper proposes a complete equivalent model (CEM) approach for the real-time simulation of a hybrid 3-level and modular multilevel converter (H3LC). The presented CEM simplifies the detailed equivalent model (DEM) of the H3LC and facilitates the implementation of real-time simulation. A central processing unit (CPU) and field-programmable gate array (FPGA) based simulation is presented whereby the massive parallel computing power of the FPGA enables the simulation of the H3LC’s three-level T-type converter and the hundreds of series-connected full-bridge submodules. The rest of the converter system, including the converter controls, the AC grid, and the measurement of the AC currents are implemented within the CPU model. The FPGA-based converter model is interfaced with the CPU model using controlled voltage sources to represent the AC- and DC-side equivalent voltages of the H3LC. The OP5700 real-time digital simulator from OPAL-RT Technologies is used to realize the CPU-FPGA real-time simulation, which is verified by the offline MATLAB/Simulink Simscape model.\n
\n\n\n\n \n\n \n \n Nowak, S., Chen, Y. C., & Wang, L.\n\n\n \n \n \n \n Distributed Measurement-Based Optimal DER Dispatch With Estimated Sensitivity Models.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Smart Grid, 13(3): 2197-2208. May 2022.\n \n\n\n\n
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\n\n\n@ARTICLE{9665752,\n author={Nowak, Severin and Chen, Yu Christine and Wang, Liwei},\n journal={IEEE Transactions on Smart Grid}, \n title={Distributed Measurement-Based Optimal DER Dispatch With Estimated Sensitivity Models}, \n year={2022},\n volume={13},\n number={3},\n pages={2197-2208},\n abstract={This paper presents a distributed measurement-based method to determine distributed energy resource (DER) active- and reactive-power setpoints that minimize bus voltage deviations from prescribed references, bus active- and reactive-power deviations from desired values, as well as cost of DER outputs. The proposed method partitions the system into multiple areas and performs per-area computations in parallel, thus mitigating scalability concerns of centralized implementations. A linear sensitivity model for each area is first estimated from measurements via the recursive weighted partial least-squares algorithm. The estimated sensitivity models are then embedded in an optimization problem, the structure of which is amenable to decomposition into per-area subproblems. The subproblems are solved in parallel using consensus-based alternating direction method of multipliers to obtain optimal DER setpoints. Both the estimation and optimization tasks require only the exchange of information at boundary buses among adjacent areas. Numerical simulations involving the IEEE 33-bus distribution test system illustrate the ability of the proposed method to determine optimal DER setpoints that adapt to operating-point changes in a distributed fashion. Additional numerical simulations involving the IEEE 123-bus system demonstrate computational scalability and the application to multi-phase systems in a practical scenario.},\n keywords={Sensitivity;Estimation;Optimization;Computational modeling;Numerical models;Voltage measurement;Scalability;Distributed energy resources;distributed model estimation;distributed optimization;optimal DER dispatch;partial least-squares estimation;phasor measurement units},\n doi={10.1109/TSG.2021.3139450},\n ISSN={1949-3061},\n month={May},}\n\n This paper presents a distributed measurement-based method to determine distributed energy resource (DER) active- and reactive-power setpoints that minimize bus voltage deviations from prescribed references, bus active- and reactive-power deviations from desired values, as well as cost of DER outputs. The proposed method partitions the system into multiple areas and performs per-area computations in parallel, thus mitigating scalability concerns of centralized implementations. A linear sensitivity model for each area is first estimated from measurements via the recursive weighted partial least-squares algorithm. The estimated sensitivity models are then embedded in an optimization problem, the structure of which is amenable to decomposition into per-area subproblems. The subproblems are solved in parallel using consensus-based alternating direction method of multipliers to obtain optimal DER setpoints. Both the estimation and optimization tasks require only the exchange of information at boundary buses among adjacent areas. Numerical simulations involving the IEEE 33-bus distribution test system illustrate the ability of the proposed method to determine optimal DER setpoints that adapt to operating-point changes in a distributed fashion. Additional numerical simulations involving the IEEE 123-bus system demonstrate computational scalability and the application to multi-phase systems in a practical scenario.\n
\n\n\n\n \n\n \n \n Hsu, J., Ordonez, M., Eberle, W., Craciun, M., & Botting, C.\n\n\n \n \n \n \n Noise-Tolerant LLC Synchronous Rectification Using Volt-Second Product.\n \n \n \n\n\n \n\n\n\n IEEE Journal of Emerging and Selected Topics in Power Electronics, 10(5): 5944-5955. Oct 2022.\n \n\n\n\n
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\n\n\n@ARTICLE{9718266,\n author={Hsu, Jhih-Da and Ordonez, Martin and Eberle, Wilson and Craciun, Marian and Botting, Chris},\n journal={IEEE Journal of Emerging and Selected Topics in Power Electronics}, \n title={Noise-Tolerant LLC Synchronous Rectification Using Volt-Second Product}, \n year={2022},\n volume={10},\n number={5},\n pages={5944-5955},\n abstract={Synchronous rectification (SR) technologies for $LLC$ resonant converters are essential to high-power, low-voltage battery chargers considering the excessive current stress on the rectifiers. Mainstream SR controllers employ an adaptive approach that measures the drain–source voltage during the SR turn-on phase ( $v_{\\text {ds.on}}$ ). However, $v_{\\text {ds.on}}$ is low-magnitude and sensitive to the voltage across parasitic inductors and capacitors. The distortion of $v_{\\text {ds.on}}$ causes SR mistriggering, undermining the efficiency. This article proposes a noise-tolerant SR strategy based on the volt-second product (VSP) of SR drain–source voltage in the turn-off phase and rectifier current conduction time. The proposed method determines SR ON-time using high-magnitude voltage signals, which are tolerant of parasitic effects. In steady-state operation, the VSP method reduces the SR ON-time error caused by circuit parasitic components, whereas in transient operation, the algorithm dynamically adjusts SR ON-time to maintain a safe operation margin, preventing rectifier reverse current flow. Details of the implementation and timing sequence are provided to demonstrate the simplicity and effectiveness of the VSP SR algorithm. Experimental results show that compared with conventional adaptive SR, the proposed VSP SR decreases the ON-time error by 64% in the above-resonance operation and removes the reverse current in the below-resonance operation, which reduces the total loss by 3%.},\n keywords={Switches;Sensors;Batteries;Threshold voltage;Inductance;Resonant converters;Low voltage;Battery chargers;dc–dc power converters;rectifiers},\n doi={10.1109/JESTPE.2022.3153356},\n ISSN={2168-6785},\n month={Oct},}\n\n Synchronous rectification (SR) technologies for $LLC$ resonant converters are essential to high-power, low-voltage battery chargers considering the excessive current stress on the rectifiers. Mainstream SR controllers employ an adaptive approach that measures the drain–source voltage during the SR turn-on phase ( $v_{\\text {ds.on}}$ ). However, $v_{\\text {ds.on}}$ is low-magnitude and sensitive to the voltage across parasitic inductors and capacitors. The distortion of $v_{\\text {ds.on}}$ causes SR mistriggering, undermining the efficiency. This article proposes a noise-tolerant SR strategy based on the volt-second product (VSP) of SR drain–source voltage in the turn-off phase and rectifier current conduction time. The proposed method determines SR ON-time using high-magnitude voltage signals, which are tolerant of parasitic effects. In steady-state operation, the VSP method reduces the SR ON-time error caused by circuit parasitic components, whereas in transient operation, the algorithm dynamically adjusts SR ON-time to maintain a safe operation margin, preventing rectifier reverse current flow. Details of the implementation and timing sequence are provided to demonstrate the simplicity and effectiveness of the VSP SR algorithm. Experimental results show that compared with conventional adaptive SR, the proposed VSP SR decreases the ON-time error by 64% in the above-resonance operation and removes the reverse current in the below-resonance operation, which reduces the total loss by 3%.\n
\n\n\n\n \n\n \n \n Khan, A. A., Jamil, M., Khan, U. A., Khan, I., Eberle, W., & Ahmed, S.\n\n\n \n \n \n \n Novel Three and Four Switch Inverters With Wide Input and Output Voltage Range for Renewable Energy Systems.\n \n \n \n\n\n \n\n\n\n IEEE Journal of Emerging and Selected Topics in Power Electronics, 10(6): 7385-7396. Dec 2022.\n \n\n\n\n
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\n\n\n@ARTICLE{9791269,\n author={Khan, Ashraf Ali and Jamil, Mohsin and Khan, Usman Ali and Khan, Irfan and Eberle, Wilson and Ahmed, Shehab},\n journal={IEEE Journal of Emerging and Selected Topics in Power Electronics}, \n title={Novel Three and Four Switch Inverters With Wide Input and Output Voltage Range for Renewable Energy Systems}, \n year={2022},\n volume={10},\n number={6},\n pages={7385-7396},\n abstract={The proposed inverters receive input dc voltage in a wide range and generate output ac voltage in a wide range due to their buck–boost ability. They require only three or four active switches and two inductors. Therefore, the circuit topologies and their operation are simple, and control is easy. The output current of the proposed inverters is continuous, which lowers the output harmonics and filtering capacitor. In the proposed inverters, the output and input voltage sources or capacitors share the same ground, which results in a constant common-mode voltage and negligible leakage current. Of the proposed inverters, an inverter with four active switches and double input voltage sources is analyzed and tested in detail. The circuit operation is discussed, a control strategy is developed, a common-mode voltage analysis is presented, and design guidelines for circuit components selection are given. To verify the theoretical analysis, a 500-W, 40-kHz prototype of the proposed four-switch inverter is designed, fabricated, and tested. An output ac voltage of 110 $\\text{V}_{\\mathrm {rms}}$ is generated from an input dc voltage of 100–200 V. A peak efficiency of 97.5% is obtained. The proposed inverter obtains high efficiency due to simple circuit operation, few circuit components in the conduction path, and switching of only one switch at high frequency.},\n keywords={Inverters;Switches;Inductors;Leakage currents;Voltage;Capacitors;Switching circuits;Buck–boost inverter;three and four switches},\n doi={10.1109/JESTPE.2022.3181071},\n ISSN={2168-6785},\n month={Dec},}\n\n The proposed inverters receive input dc voltage in a wide range and generate output ac voltage in a wide range due to their buck–boost ability. They require only three or four active switches and two inductors. Therefore, the circuit topologies and their operation are simple, and control is easy. The output current of the proposed inverters is continuous, which lowers the output harmonics and filtering capacitor. In the proposed inverters, the output and input voltage sources or capacitors share the same ground, which results in a constant common-mode voltage and negligible leakage current. Of the proposed inverters, an inverter with four active switches and double input voltage sources is analyzed and tested in detail. The circuit operation is discussed, a control strategy is developed, a common-mode voltage analysis is presented, and design guidelines for circuit components selection are given. To verify the theoretical analysis, a 500-W, 40-kHz prototype of the proposed four-switch inverter is designed, fabricated, and tested. An output ac voltage of 110 $\\text{V}_{\\mathrm {rms}}$ is generated from an input dc voltage of 100–200 V. A peak efficiency of 97.5% is obtained. The proposed inverter obtains high efficiency due to simple circuit operation, few circuit components in the conduction path, and switching of only one switch at high frequency.\n
\n\n\n\n \n\n \n \n Dey, A., Shafiei, N., Khandekhar, R., Eberle, W., & Li, R.\n\n\n \n \n \n \n Compact Thermal Modelling of Magnetic Components via Real Coded Genetic Algorithm.\n \n \n \n\n\n \n\n\n\n In 2022 21st IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (iTherm), pages 1-7, May 2022. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{9899579,\n author={Dey, Anshuman and Shafiei, Navid and Khandekhar, Rahul and Eberle, Wilson and Li, Ri},\n booktitle={2022 21st IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (iTherm)}, \n title={Compact Thermal Modelling of Magnetic Components via Real Coded Genetic Algorithm}, \n year={2022},\n volume={},\n number={},\n pages={1-7},\n abstract={The trend of increasing power densities in modern day power electronic systems is pushing components to their thermal limits, warranting the need for accurate thermal modelling. Unlike the thermal modelling approach for semiconductor devices, thermal modelling of magnetic components has not been standardised. Due to this lack of standardisation in the academic community, most magnetic component thermal models have not been evaluated for Boundary Condition Independence (BCI) and hence cannot be classified as compact thermal models (CTMs). In this paper we develop a CTM of an inductor using real coded genetic algorithm (GA) based on the DELPHI approach. First, a Detailed Thermal Model (DTM) of the inductor under DC excitation is developed and validated using experimental test results. Following which resistance network values were deduced from the DTM results for varied boundary conditions via optimisation by the real coded GA. A fully connected resistance network was observed to be the best representation of the inductor DTM. The resulting CTM is able to predict junction (winding) temperature within 5 % of the DTM results for a varied set of boundary conditions. The inductor CTM developed is a low computational cost alternative to the DTM and can be used in system level simulations to evaluate thermal performance for varied applications.},\n keywords={Thermal management of electronics;Resistance;Computational modeling;Windings;Thermomechanical processes;Boundary conditions;Inductors;Compact Thermal Modelling;Thermal Management;Power Inductor;Genetic Algorithm},\n doi={10.1109/iTherm54085.2022.9899579},\n ISSN={2694-2135},\n month={May},}\n\n The trend of increasing power densities in modern day power electronic systems is pushing components to their thermal limits, warranting the need for accurate thermal modelling. Unlike the thermal modelling approach for semiconductor devices, thermal modelling of magnetic components has not been standardised. Due to this lack of standardisation in the academic community, most magnetic component thermal models have not been evaluated for Boundary Condition Independence (BCI) and hence cannot be classified as compact thermal models (CTMs). In this paper we develop a CTM of an inductor using real coded genetic algorithm (GA) based on the DELPHI approach. First, a Detailed Thermal Model (DTM) of the inductor under DC excitation is developed and validated using experimental test results. Following which resistance network values were deduced from the DTM results for varied boundary conditions via optimisation by the real coded GA. A fully connected resistance network was observed to be the best representation of the inductor DTM. The resulting CTM is able to predict junction (winding) temperature within 5 % of the DTM results for a varied set of boundary conditions. The inductor CTM developed is a low computational cost alternative to the DTM and can be used in system level simulations to evaluate thermal performance for varied applications.\n
\n\n\n\n \n\n \n \n Huang, Y., Wang, G., Lu, J., Zhang, Y., & Wang, L.\n\n\n \n \n \n \n Practical Considerations for Controller Upgrade of Dynamic Braking Resistors at BC Hydro's GMS Generating Station.\n \n \n \n\n\n \n\n\n\n In 2022 IEEE Power & Energy Society General Meeting (PESGM), pages 1-5, July 2022. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{9916818,\n author={Huang, Yingwei and Wang, Guihua and Lu, Jun and Zhang, Yuanshi and Wang, Liwei},\n booktitle={2022 IEEE Power & Energy Society General Meeting (PESGM)}, \n title={Practical Considerations for Controller Upgrade of Dynamic Braking Resistors at BC Hydro's GMS Generating Station}, \n year={2022},\n volume={},\n number={},\n pages={1-5},\n abstract={This paper discusses the practical considerations for controller upgrade of the dynamic braking resistors (BRs) installed at BC Hydro's Gordon M. Shrum (GMS) Generating Station. Originally installed in 1960s and one replaced in 1987, the three banks of 138 kV 200 MW dynamic BRs have served as a safety net in addition to BC Hydro's EMS-based Remedial Action Schemes (RAS). However, due to technology obsolesce, the GMS BRs have been observed with limited functionality in some recent contingency events. This paper first investigates the operational performance of the existing control panel of GMS BRs, and then recommends functional requirements with improved controller features. Computer studies demonstrate that BC Hydro's GMS BR scheme, based on the upgraded controller, is adequate, reliable, and effective in: 1) improving the Peace regional system transient stability, and 2) providing temporary over-frequency protection.},\n keywords={Resistors;Contingency management;Control systems;Safety;Reliability;Transient analysis;Computer security;Dynamic braking resistor;transient stability;accelerating power level detector;over-frequency protection;remedial action schemes},\n doi={10.1109/PESGM48719.2022.9916818},\n ISSN={1944-9933},\n month={July},}\n\n This paper discusses the practical considerations for controller upgrade of the dynamic braking resistors (BRs) installed at BC Hydro's Gordon M. Shrum (GMS) Generating Station. Originally installed in 1960s and one replaced in 1987, the three banks of 138 kV 200 MW dynamic BRs have served as a safety net in addition to BC Hydro's EMS-based Remedial Action Schemes (RAS). However, due to technology obsolesce, the GMS BRs have been observed with limited functionality in some recent contingency events. This paper first investigates the operational performance of the existing control panel of GMS BRs, and then recommends functional requirements with improved controller features. Computer studies demonstrate that BC Hydro's GMS BR scheme, based on the upgraded controller, is adequate, reliable, and effective in: 1) improving the Peace regional system transient stability, and 2) providing temporary over-frequency protection.\n
\n\n\n\n \n\n \n \n Hatahet, W., & Wang, L.\n\n\n \n \n \n \n Hybrid CPU-GPU-Based Electromagnetic Transient Simulation of Modular Multilevel Converter for HVDC Application.\n \n \n \n\n\n \n\n\n\n In 2022 IEEE Electrical Power and Energy Conference (EPEC), pages 44-49, Dec 2022. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{10000096,\n author={Hatahet, Walid and Wang, Liwei},\n booktitle={2022 IEEE Electrical Power and Energy Conference (EPEC)}, \n title={Hybrid CPU-GPU-Based Electromagnetic Transient Simulation of Modular Multilevel Converter for HVDC Application}, \n year={2022},\n volume={},\n number={},\n pages={44-49},\n abstract={Modular multilevel converter (MMC) is one of the key components for modern high voltage DC (HVDC) transmission systems. Fast and accurate electromagnetic transient (EMT) simulation of the MMC is crucial to capture the finest dynamics and transients required for proper planning, design, and control prototyping of multiterminal DC (MTDC) grids. This paper proposes a hybrid high-performance computing platform for the simulation of the HVDC transmission system based on graphics processing unit (GPU). An EMT program is developed to implement the discrete time model for the two-terminal modular multilevel converters. The high computational power of the hybrid CPU-GPU platform is utilized to simulate all components in the HVDC system by capturing the detailed dynamics and transients. Moreover, a parallel GPU-based simulation algorithm is presented in the paper. The proposed algorithm provides an advanced solution for balanced distribution of simulation tasks on both the CPU and GPU to exploit the available resources on GPU at low communication latency without any compromise of the simulation accuracy. The results obtained from the proposed hybrid platform show high accuracy compared to the results obtained from Matlab/Simulink/Simscape/Specialized Power System model using the same network configuration and parameters. The proposed CPU-GPU MMC model is shown to achieve a speed up of 27.5 folds, compared to the sequential algorithm of MMC model implemented in CPU.},\n keywords={Multilevel converters;Computational modeling;HVDC transmission;Heuristic algorithms;Power system dynamics;Graphics processing units;Mathematical models;graphics processing units (GPU);modular multilevel converter (MMC);high voltage DC (HVDC);high performance computing;electromagnetic transients;power systems simulation;parallel processing},\n doi={10.1109/EPEC56903.2022.10000096},\n ISSN={2381-2842},\n month={Dec},}\n\n Modular multilevel converter (MMC) is one of the key components for modern high voltage DC (HVDC) transmission systems. Fast and accurate electromagnetic transient (EMT) simulation of the MMC is crucial to capture the finest dynamics and transients required for proper planning, design, and control prototyping of multiterminal DC (MTDC) grids. This paper proposes a hybrid high-performance computing platform for the simulation of the HVDC transmission system based on graphics processing unit (GPU). An EMT program is developed to implement the discrete time model for the two-terminal modular multilevel converters. The high computational power of the hybrid CPU-GPU platform is utilized to simulate all components in the HVDC system by capturing the detailed dynamics and transients. Moreover, a parallel GPU-based simulation algorithm is presented in the paper. The proposed algorithm provides an advanced solution for balanced distribution of simulation tasks on both the CPU and GPU to exploit the available resources on GPU at low communication latency without any compromise of the simulation accuracy. The results obtained from the proposed hybrid platform show high accuracy compared to the results obtained from Matlab/Simulink/Simscape/Specialized Power System model using the same network configuration and parameters. The proposed CPU-GPU MMC model is shown to achieve a speed up of 27.5 folds, compared to the sequential algorithm of MMC model implemented in CPU.\n
\n\n\n\n \n\n \n \n Bieber, L., Yoo, P., Wang, L., & Jatskevich, J.\n\n\n \n \n \n \n Negative-Sequence Current Control with a Hybrid Three-Level Modular Multilevel Converter.\n \n \n \n\n\n \n\n\n\n In 2022 IEEE Electrical Power and Energy Conference (EPEC), pages 38-43, Dec 2022. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{10000117,\n author={Bieber, Levi and Yoo, Paul and Wang, Liwei and Jatskevich, Juri},\n booktitle={2022 IEEE Electrical Power and Energy Conference (EPEC)}, \n title={Negative-Sequence Current Control with a Hybrid Three-Level Modular Multilevel Converter}, \n year={2022},\n volume={},\n number={},\n pages={38-43},\n abstract={The new class of hybrid cascaded multilevel converters (HCMCs) brings numerous benefits to the field of voltage-source-converter high-voltage direct-current (VSC-HVDC) technology. HCMCs enable highly efficient and compact AC/DC power converter stations with a simpler physical implementation compared to the state-of-the-art modular multilevel converter (MMC) technology due to their tighter physical spacings of their semiconductor and capacitor components. A growing concern is whether HCMCs can provide negative-sequence current suppression control to AC grids during unbalanced operations, e.g., single-phase-to-ground fault scenarios. This paper demonstrates both normal and fault operation scenarios for an emerging HCMC converter, the hybrid three-level converter (H3LC), to verify its utility even when highly unbalanced grid conditions are incident. Throughout this paper, the H3LC is shown to reliably ride through highly unbalanced grid conditions while suppressing negative-sequence current.},\n keywords={Insulated gate bipolar transistors;Current control;Multilevel converters;HVDC transmission;High-voltage techniques;Reliability theory;Power system stability;Hybrid converters;MMC;HVDC;negative sequence;reactive power},\n doi={10.1109/EPEC56903.2022.10000117},\n ISSN={2381-2842},\n month={Dec},}\n\n The new class of hybrid cascaded multilevel converters (HCMCs) brings numerous benefits to the field of voltage-source-converter high-voltage direct-current (VSC-HVDC) technology. HCMCs enable highly efficient and compact AC/DC power converter stations with a simpler physical implementation compared to the state-of-the-art modular multilevel converter (MMC) technology due to their tighter physical spacings of their semiconductor and capacitor components. A growing concern is whether HCMCs can provide negative-sequence current suppression control to AC grids during unbalanced operations, e.g., single-phase-to-ground fault scenarios. This paper demonstrates both normal and fault operation scenarios for an emerging HCMC converter, the hybrid three-level converter (H3LC), to verify its utility even when highly unbalanced grid conditions are incident. Throughout this paper, the H3LC is shown to reliably ride through highly unbalanced grid conditions while suppressing negative-sequence current.\n
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\n \n \n\n \n \n Rodrigues, Y. R., Abdelaziz, M. M. A., & Wang, L.\n\n\n \n \n \n \n D-PMU Based Distributed Voltage and Frequency Control for DERs in Islanded Microgrids.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Sustainable Energy, 12(1): 451-468. Jan 2021.\n \n\n\n\n
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\n\n\n@ARTICLE{9130142,\n author={Rodrigues, Yuri R. and Abdelaziz, Morad Mohamed Abdelmageed and Wang, Liwei},\n journal={IEEE Transactions on Sustainable Energy}, \n title={D-PMU Based Distributed Voltage and Frequency Control for DERs in Islanded Microgrids}, \n year={2021},\n volume={12},\n number={1},\n pages={451-468},\n abstract={Seeking the improvement of frequency and voltage regulation of distributed energy resources (DERs) in islanded microgrids, this paper presents a novel distributed control paradigm based on distribution-level phasor measurement units (D-PMUs) monitoring. First, a novel strategy denoted synchrophasor aggregation is proposed. This strategy takes advantage of the high resolution, low latency and time-stamped synchronized measurements provided by D-PMUs to obtain a local foreknowledge of DERs steady-state operating condition during the system dynamics. Based on this information, novel measurement-based control parcels are developed to provide stabilizing and corrective adjustments of generators contribution. These controllers are able to effectively improve DERs dynamic performance, i.e. damping oscillations, overshoot and frequency nadir, while significantly speeding-up the realization of steady-state goals. Stability proof and steady-state analysis are developed. Comparative case-studies with state-of-art controllers, as well as with traditional SCADA systems, are conducted to evaluate the performance and robustness of the proposed controller under different scenarios, including: loading variation, communication failure, loss of generation, and plug-and-play capacity. Results showcase the proposed controller ability to significantly improve islanded microgrid regulation.},\n keywords={Microgrids;Voltage control;Regulation;Monitoring;Frequency control;Steady-state;Indexes;DER;D-PMU;frequency control;microgrids;voltage control},\n doi={10.1109/TSTE.2020.3006039},\n ISSN={1949-3037},\n month={Jan},}\n\n Seeking the improvement of frequency and voltage regulation of distributed energy resources (DERs) in islanded microgrids, this paper presents a novel distributed control paradigm based on distribution-level phasor measurement units (D-PMUs) monitoring. First, a novel strategy denoted synchrophasor aggregation is proposed. This strategy takes advantage of the high resolution, low latency and time-stamped synchronized measurements provided by D-PMUs to obtain a local foreknowledge of DERs steady-state operating condition during the system dynamics. Based on this information, novel measurement-based control parcels are developed to provide stabilizing and corrective adjustments of generators contribution. These controllers are able to effectively improve DERs dynamic performance, i.e. damping oscillations, overshoot and frequency nadir, while significantly speeding-up the realization of steady-state goals. Stability proof and steady-state analysis are developed. Comparative case-studies with state-of-art controllers, as well as with traditional SCADA systems, are conducted to evaluate the performance and robustness of the proposed controller under different scenarios, including: loading variation, communication failure, loss of generation, and plug-and-play capacity. Results showcase the proposed controller ability to significantly improve islanded microgrid regulation.\n
\n\n\n\n \n\n \n \n Arshadi, S. A., Ordonez, M., Eberle, W., Craciun, M., & Botting, C.\n\n\n \n \n \n \n Three-Phase LLC Battery Charger: Wide Regulation and Improved Light-Load Operation.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Electronics, 36(2): 1519-1531. Feb 2021.\n \n\n\n\n
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\n\n\n@ARTICLE{9130882,\n author={Arshadi, Sayed Abbas and Ordonez, Martin and Eberle, Wilson and Craciun, Marian and Botting, Chris},\n journal={IEEE Transactions on Power Electronics}, \n title={Three-Phase LLC Battery Charger: Wide Regulation and Improved Light-Load Operation}, \n year={2021},\n volume={36},\n number={2},\n pages={1519-1531},\n abstract={Three-phase LLC resonant converters can handle much higher power compared to half-bridge and full-bridge LLC converters, which makes them suitable for levels 2 and 3 battery charger applications. In addition to the unique features of LLC resonant converters, the three-phase structure provides higher power capacity and higher power density at higher power levels in comparison with single-phase structures. Although single-phase LLC resonant converters were thoroughly investigated in the literature for many different applications, limited work has been done on three-phase LLC converters. Unexplored problems with three-phase LLC resonant converters include issues with their limited gain range and also their poor light-load efficiency. In this article, a modified three-phase LLC resonant converter with a new phase-shedding strategy is proposed. With the proposed modified topology and phase-shedding strategy, the wide gain range needed for covering the recovery zone of charging Li-ion batteries is realized. Moreover, with the proposed phase-shedding strategy, a significant efficiency improvement with light-load absorption charging is achieved. A 3-kW prototype was developed to validate the performance of the proposed converter.},\n keywords={Resonant converters;Batteries;RLC circuits;Absorption;Battery chargers;Low voltage;Equivalent circuits;Battery charger;dead battery;extended gain range;light-load;phase-shedding;recovery charging;three-phase LLC},\n doi={10.1109/TPEL.2020.3006422},\n ISSN={1941-0107},\n month={Feb},}\n\n Three-phase LLC resonant converters can handle much higher power compared to half-bridge and full-bridge LLC converters, which makes them suitable for levels 2 and 3 battery charger applications. In addition to the unique features of LLC resonant converters, the three-phase structure provides higher power capacity and higher power density at higher power levels in comparison with single-phase structures. Although single-phase LLC resonant converters were thoroughly investigated in the literature for many different applications, limited work has been done on three-phase LLC converters. Unexplored problems with three-phase LLC resonant converters include issues with their limited gain range and also their poor light-load efficiency. In this article, a modified three-phase LLC resonant converter with a new phase-shedding strategy is proposed. With the proposed modified topology and phase-shedding strategy, the wide gain range needed for covering the recovery zone of charging Li-ion batteries is realized. Moreover, with the proposed phase-shedding strategy, a significant efficiency improvement with light-load absorption charging is achieved. A 3-kW prototype was developed to validate the performance of the proposed converter.\n
\n\n\n\n \n\n \n \n Khan, A. A., Eberle, W., Wang, L., Khan, U. A., Ahmed, S., & Agamy, M.\n\n\n \n \n \n \n Novel Multilevel Inverters Based on AC–AC Converter for Photovoltaic Applications.\n \n \n \n\n\n \n\n\n\n IEEE Journal of Emerging and Selected Topics in Power Electronics, 9(3): 3384-3393. June 2021.\n \n\n\n\n
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\n\n\n@ARTICLE{9138389,\n author={Khan, Ashraf Ali and Eberle, Wilson and Wang, Liwei and Khan, Usman Ali and Ahmed, Shehab and Agamy, Mohammed},\n journal={IEEE Journal of Emerging and Selected Topics in Power Electronics}, \n title={Novel Multilevel Inverters Based on AC–AC Converter for Photovoltaic Applications}, \n year={2021},\n volume={9},\n number={3},\n pages={3384-3393},\n abstract={A novel family of multilevel inverters consisting of three-level (3L) half-bridge, 3L full-bridge, and cascaded modular multilevel inverters for photovoltaic applications is presented in this article. The proposed inverters are based on a buck type ac-ac converter and feature no high-frequency common-mode voltage. They can be isolated from the grid or output load without requiring an external circuitry. The voltage stress of all the high-frequency switches in the proposed half-bridge 3L inverter is half of the input voltage. The proposed cascaded multilevel inverter is highly modular and can reach a high output voltage level using low-voltage-rating devices. In addition, it offers a unique feature in which a faulty or unnecessary unit can be bypassed without disturbing the circuit operation of the remaining healthy units. The derivation of the proposed inverters, modulation strategies, working principles, and common-mode voltage analysis is discussed. A 550-W experimental prototype of the proposed 3L half-bridge inverter and 1.5-kW experimental prototype of the proposed 5L cascaded modular multilevel inverter are constructed and tested. Test results verify the excellent performance of the proposed inverters.},\n keywords={Pulse width modulation;Leakage currents;Stress;Low voltage;Switches;Multilevel inverter;photovoltaic (PV) applications},\n doi={10.1109/JESTPE.2020.3007632},\n ISSN={2168-6785},\n month={June},}\n\n A novel family of multilevel inverters consisting of three-level (3L) half-bridge, 3L full-bridge, and cascaded modular multilevel inverters for photovoltaic applications is presented in this article. The proposed inverters are based on a buck type ac-ac converter and feature no high-frequency common-mode voltage. They can be isolated from the grid or output load without requiring an external circuitry. The voltage stress of all the high-frequency switches in the proposed half-bridge 3L inverter is half of the input voltage. The proposed cascaded multilevel inverter is highly modular and can reach a high output voltage level using low-voltage-rating devices. In addition, it offers a unique feature in which a faulty or unnecessary unit can be bypassed without disturbing the circuit operation of the remaining healthy units. The derivation of the proposed inverters, modulation strategies, working principles, and common-mode voltage analysis is discussed. A 550-W experimental prototype of the proposed 3L half-bridge inverter and 1.5-kW experimental prototype of the proposed 5L cascaded modular multilevel inverter are constructed and tested. Test results verify the excellent performance of the proposed inverters.\n
\n\n\n\n \n\n \n \n Li, H., Zhang, C., Wang, L., Li, Z., An, Y., Liu, X., & Liang, X.\n\n\n \n \n \n \n A Repetitive High-Current Pulse Generator Circuit Based on Multistage Pulse Transformers.\n \n \n \n\n\n \n\n\n\n IEEE Journal of Emerging and Selected Topics in Power Electronics, 9(3): 3189-3200. June 2021.\n \n\n\n\n
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\n\n\n@ARTICLE{9143187,\n author={Li, Haitao and Zhang, Cunshan and Wang, Liwei and Li, Zhenmei and An, Yunzhu and Liu, Xiaohui and Liang, Xiaoyu},\n journal={IEEE Journal of Emerging and Selected Topics in Power Electronics}, \n title={A Repetitive High-Current Pulse Generator Circuit Based on Multistage Pulse Transformers}, \n year={2021},\n volume={9},\n number={3},\n pages={3189-3200},\n abstract={The application of inductive energy storage in the generation of high-current pulses has attracted considerable attention during recent years. In this article, a new inductive high-current pulse generator circuit is proposed based on XRAM (MARX spelled backword) current multiplier converter concept and multistage pulse transformers by using power electronic switches. This circuit is capable to recover the residual energy and generate repetitive high-current pulses with a flexible output pattern. To verify the circuit operation, simulation and experimental results of a two-stage laboratory prototype are presented. The results confirm the theoretical analysis and show the validity of the converter scheme.},\n keywords={Inductors;Pulse transformers;Pulse generation;Capacitors;Discharges (electric);Inductance;Circuit topology;Electromagnetic launching power supplies;power semiconductor switches;pulse circuits;pulse transformers;pulsed power supplies},\n doi={10.1109/JESTPE.2020.3010132},\n ISSN={2168-6785},\n month={June},}\n\n The application of inductive energy storage in the generation of high-current pulses has attracted considerable attention during recent years. In this article, a new inductive high-current pulse generator circuit is proposed based on XRAM (MARX spelled backword) current multiplier converter concept and multistage pulse transformers by using power electronic switches. This circuit is capable to recover the residual energy and generate repetitive high-current pulses with a flexible output pattern. To verify the circuit operation, simulation and experimental results of a two-stage laboratory prototype are presented. The results confirm the theoretical analysis and show the validity of the converter scheme.\n
\n\n\n\n \n\n \n \n Zhang, Y., Meng, X., Shotorbani, A. M., & Wang, L.\n\n\n \n \n \n \n Minimization of AC-DC Grid Transmission Loss and DC Voltage Deviation Using Adaptive Droop Control and Improved AC-DC Power Flow Algorithm.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Systems, 36(1): 744-756. Jan 2021.\n \n\n\n\n
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\n\n\n@ARTICLE{9178970,\n author={Zhang, Yuanshi and Meng, Xuekun and Shotorbani, Amin Mohammadpour and Wang, Liwei},\n journal={IEEE Transactions on Power Systems}, \n title={Minimization of AC-DC Grid Transmission Loss and DC Voltage Deviation Using Adaptive Droop Control and Improved AC-DC Power Flow Algorithm}, \n year={2021},\n volume={36},\n number={1},\n pages={744-756},\n abstract={Minimization of the total transmission loss of an interconnected AC-DC grid plays an important role for the economic operation of the AC-DC grid. Different from the conventional AC grid where the transmission loss is usually minimized by reactive power regulation, the transmission loss of a meshed AC-DC grid can be optimized by adjusting the active power exchange between the AC and DC grids. Additionally, smaller DC voltage deviation after grid disturbances is very desirable since it can bring less impact to the operations of AC-DC grid. This paper firstly presents two improved sequential power flow algorithms for modular multilevel converters (MMCs) based AC-DC grid under DC power-voltage droop control. An optimization algorithm is then proposed to minimize the total loss of the AC-DC grid and the overall DC voltage deviation after the change of operating conditions. Adaptive droop control is used in the proposed optimization algorithm in which the power references are control variables solved from the optimal AC-DC power flow. The proposed algorithm is verified in an AC-DC grid consisting of a six-terminal DC grid connected to the IEEE 39-bus AC grid and a classical five-terminal AC-MTDC system.},\n keywords={Load flow;Propagation losses;Voltage control;Optimization;Reactive power;Software algorithms;Modular multilevel converters;AC-DC grid;adaptive droop control;DC voltage deviation;HVDC;modular multilevel converters (MMCs);sequential power flow;transmission loss},\n doi={10.1109/TPWRS.2020.3020039},\n ISSN={1558-0679},\n month={Jan},}\n\n Minimization of the total transmission loss of an interconnected AC-DC grid plays an important role for the economic operation of the AC-DC grid. Different from the conventional AC grid where the transmission loss is usually minimized by reactive power regulation, the transmission loss of a meshed AC-DC grid can be optimized by adjusting the active power exchange between the AC and DC grids. Additionally, smaller DC voltage deviation after grid disturbances is very desirable since it can bring less impact to the operations of AC-DC grid. This paper firstly presents two improved sequential power flow algorithms for modular multilevel converters (MMCs) based AC-DC grid under DC power-voltage droop control. An optimization algorithm is then proposed to minimize the total loss of the AC-DC grid and the overall DC voltage deviation after the change of operating conditions. Adaptive droop control is used in the proposed optimization algorithm in which the power references are control variables solved from the optimal AC-DC power flow. The proposed algorithm is verified in an AC-DC grid consisting of a six-terminal DC grid connected to the IEEE 39-bus AC grid and a classical five-terminal AC-MTDC system.\n
\n\n\n\n \n\n \n \n Amiri, P., Botting, C., Craciun, M., Eberle, W., & Wang, L.\n\n\n \n \n \n \n Analytic–Adaptive LLC Resonant Converter Synchronous Rectifier Control.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Electronics, 36(5): 5941-5953. May 2021.\n \n\n\n\n
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\n\n\n@ARTICLE{9205608,\n author={Amiri, Peyman and Botting, Chris and Craciun, Marian and Eberle, Wilson and Wang, Liwei},\n journal={IEEE Transactions on Power Electronics}, \n title={Analytic–Adaptive LLC Resonant Converter Synchronous Rectifier Control}, \n year={2021},\n volume={36},\n number={5},\n pages={5941-5953},\n abstract={Synchronous rectification (SR) is the key to achieve high efficiency for high output current LLC resonant converters. Recently proposed methods for SR control do not offer a complete solution for industrial applications. The drain-to-source voltage sensing based methods cannot utilize the full benefits of SR due to the field-effect transistor (FET) package stray inductance. The adaptive SR control methods suffer from the variable on time and cannot reach the minimum power loss. This research aims for a high-performance SR control strategy that not only has good steady-state performance but also works reliably during transients. This article introduces an analytic-adaptive method for SR control that delivers accurate adjustment for both turn on and turn off moments of SR FETs below and above resonance. The proposed method takes into account the stray inductance of SR FETs; hence, it enables full efficiency gain of SR. The feasibility of implementation for the proposed method integrated with closed-loop control is experimentally validated on a 300 W 390/12 V half-bridge LLC resonant converter with 93.66% peak efficiency.},\n keywords={Field effect transistors;Inductance;Resonant converters;Current transformers;Sensors;Rectifiers;Magnetic resonance;Adaptive control;digital control; $LLC$ resonant converter;synchronous rectification (SR)},\n doi={10.1109/TPEL.2020.3026374},\n ISSN={1941-0107},\n month={May},}\n\n Synchronous rectification (SR) is the key to achieve high efficiency for high output current LLC resonant converters. Recently proposed methods for SR control do not offer a complete solution for industrial applications. The drain-to-source voltage sensing based methods cannot utilize the full benefits of SR due to the field-effect transistor (FET) package stray inductance. The adaptive SR control methods suffer from the variable on time and cannot reach the minimum power loss. This research aims for a high-performance SR control strategy that not only has good steady-state performance but also works reliably during transients. This article introduces an analytic-adaptive method for SR control that delivers accurate adjustment for both turn on and turn off moments of SR FETs below and above resonance. The proposed method takes into account the stray inductance of SR FETs; hence, it enables full efficiency gain of SR. The feasibility of implementation for the proposed method integrated with closed-loop control is experimentally validated on a 300 W 390/12 V half-bridge LLC resonant converter with 93.66% peak efficiency.\n
\n\n\n\n \n\n \n \n Zhang, Y., Wang, L., & Li, W.\n\n\n \n \n \n \n Autonomous DC Line Power Flow Regulation Using Adaptive Droop Control in HVDC Grid.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Delivery, 36(6): 3550-3560. Dec 2021.\n \n\n\n\n
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\n\n\n@ARTICLE{9294050,\n author={Zhang, Yuanshi and Wang, Liwei and Li, Wei},\n journal={IEEE Transactions on Power Delivery}, \n title={Autonomous DC Line Power Flow Regulation Using Adaptive Droop Control in HVDC Grid}, \n year={2021},\n volume={36},\n number={6},\n pages={3550-3560},\n abstract={The regulation of active power flowing through one or multiple DC lines plays an important role to guarantee secure and economic operations of high voltage direct current (HVDC) grids. This paper proposes a new method to regulate DC line power flow based on the adaptive DC voltage droop control strategy in which the voltage references of the voltage droop controllers vary autonomously at post-contingencies. The main advantage of the proposed method is that it can avoid installation of extra equipment and thus the associated losses and costs in the power-converter-based power flow control methods. The proposed control approach does not require to solve online global AC-DC power flow equations, leading to autonomous control. Furthermore, the adaptive droop control does not influence the stability of the HVDC grid since only the droop voltage references vary, but not the droop coefficients. Static analysis and dynamic simulations of a five-terminal HVDC grid are implemented using MATLAB/Simulink Simscape Blockset and OPAL-RT RT-LAB libraries to validate the effectiveness of the proposed autonomous control method.},\n keywords={Voltage control;HVDC transmission;Load flow;Regulation;Topology;Analytical models;Load flow control;Adaptive droop control;autonomous control;DC line power regulation;high voltage direct current;voltage source converter},\n doi={10.1109/TPWRD.2020.3044978},\n ISSN={1937-4208},\n month={Dec},}\n\n The regulation of active power flowing through one or multiple DC lines plays an important role to guarantee secure and economic operations of high voltage direct current (HVDC) grids. This paper proposes a new method to regulate DC line power flow based on the adaptive DC voltage droop control strategy in which the voltage references of the voltage droop controllers vary autonomously at post-contingencies. The main advantage of the proposed method is that it can avoid installation of extra equipment and thus the associated losses and costs in the power-converter-based power flow control methods. The proposed control approach does not require to solve online global AC-DC power flow equations, leading to autonomous control. Furthermore, the adaptive droop control does not influence the stability of the HVDC grid since only the droop voltage references vary, but not the droop coefficients. Static analysis and dynamic simulations of a five-terminal HVDC grid are implemented using MATLAB/Simulink Simscape Blockset and OPAL-RT RT-LAB libraries to validate the effectiveness of the proposed autonomous control method.\n
\n\n\n\n \n\n \n \n Rodrigues, Y. R., Abdelaziz, M. M. A., & Wang, L.\n\n\n \n \n \n \n Resilience-Oriented D-PMU Based Frequency Controller for Islanded Microgrids With Flexible Resources Support.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Delivery, 36(4): 2320-2331. Aug 2021.\n \n\n\n\n
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\n\n\n@ARTICLE{9309314,\n author={Rodrigues, Yuri R. and Abdelaziz, Morad Mohamed Abdelmageed and Wang, Liwei},\n journal={IEEE Transactions on Power Delivery}, \n title={Resilience-Oriented D-PMU Based Frequency Controller for Islanded Microgrids With Flexible Resources Support}, \n year={2021},\n volume={36},\n number={4},\n pages={2320-2331},\n abstract={This paper proposes a novel frequency regulation outlook focused on the improvement of islanded microgrids resilience. The proposed method takes advantage of power systems enhanced situation awareness enabled by distribution-level phasor measurement units (D-PMUs) monitoring to overcome current design boundaries that limit an effective harnessing of flexible resources potential to support microgrids resilience. For this, capitalizing on D-PMUs high resolution, low latency and time synchronized measurements, a beforehand assessment of the power mismatch leading the microgrid to frequency nadir condition is achievable during the early stages of the system dynamics. Based on this information, new measurement-based control modules are designed to address individual stages of the frequency regulation process in a dedicated manner, respectively arrest, rebound and recovery stages. These controllers provide a significant improvement of microgrid's frequency arrest and rebound ability, while ensuring a smooth recovery process toward the system steady-state realization. The proposed approach stability is mathematically demonstrated and comparative case-studies developed considering monitoring and communication systems non-idealities. Obtained results indicate the proposed controller superior ability to address single and cascade large-scale disturbances, while simultaneously providing an improved frequency regulation performance and greater economic benefit for flexible resource support.},\n keywords={Frequency control;Microgrids;Resilience;Power system stability;Monitoring;Regulation;Power system dynamics;D-PMU;flexible resources;frequency control;microgrids;resilience},\n doi={10.1109/TPWRD.2020.3047653},\n ISSN={1937-4208},\n month={Aug},}\n\n This paper proposes a novel frequency regulation outlook focused on the improvement of islanded microgrids resilience. The proposed method takes advantage of power systems enhanced situation awareness enabled by distribution-level phasor measurement units (D-PMUs) monitoring to overcome current design boundaries that limit an effective harnessing of flexible resources potential to support microgrids resilience. For this, capitalizing on D-PMUs high resolution, low latency and time synchronized measurements, a beforehand assessment of the power mismatch leading the microgrid to frequency nadir condition is achievable during the early stages of the system dynamics. Based on this information, new measurement-based control modules are designed to address individual stages of the frequency regulation process in a dedicated manner, respectively arrest, rebound and recovery stages. These controllers provide a significant improvement of microgrid's frequency arrest and rebound ability, while ensuring a smooth recovery process toward the system steady-state realization. The proposed approach stability is mathematically demonstrated and comparative case-studies developed considering monitoring and communication systems non-idealities. Obtained results indicate the proposed controller superior ability to address single and cascade large-scale disturbances, while simultaneously providing an improved frequency regulation performance and greater economic benefit for flexible resource support.\n
\n\n\n\n \n\n \n \n Zhang, Y., Shotorbani, A. M., Wang, L., & Mohammadi-Ivatloo, B.\n\n\n \n \n \n \n Distributed Secondary Control of a Microgrid With A Generalized PI Finite-Time Controller.\n \n \n \n\n\n \n\n\n\n IEEE Open Access Journal of Power and Energy, 8: 57-67. 2021.\n \n\n\n\n
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\n\n\n@ARTICLE{9344831,\n author={Zhang, Yuanshi and Shotorbani, Amin Mohammadpour and Wang, Liwei and Mohammadi-Ivatloo, Behnam},\n journal={IEEE Open Access Journal of Power and Energy}, \n title={Distributed Secondary Control of a Microgrid With A Generalized PI Finite-Time Controller}, \n year={2021},\n volume={8},\n number={},\n pages={57-67},\n abstract={This paper proposes a novel distributed secondary controller for droop-controlled microgrids to regulate the frequency and voltage, and autonomously share the power mismatch. The proposed scheme is entitled generalized proportional-intergal finite-time controller (GPI-FTC). The proposed GPI-FTC is synthesized based on the control Lyapunov function method and modifying the conventional PI controller by adding a consensus term to the integrand dynamic. The proposed distributed GPI-FTC provides plug-n-play capability, scalability, and fast finite-time convergence of the system states. Moreover, a reactive power sharing (Q-sharing) method is designed to improve the sharing pattern of reactive power under exact voltage regulation. Also, a distributed voltage observer is developed for average voltage regulation. Performance of the proposed GPI-FTC is validated through numerical simulations of the detailed model of the microgrid, including small signal analysis, load change, DG outage, Q-sharing, and performance comparison.},\n keywords={Voltage control;Microgrids;Frequency control;Convergence;Reactive power;PI control;Lyapunov methods;Distributed secondary control;finite-time control;microgrids;generalized PI controller},\n doi={10.1109/OAJPE.2021.3056507},\n ISSN={2687-7910},\n month={},}\n\n This paper proposes a novel distributed secondary controller for droop-controlled microgrids to regulate the frequency and voltage, and autonomously share the power mismatch. The proposed scheme is entitled generalized proportional-intergal finite-time controller (GPI-FTC). The proposed GPI-FTC is synthesized based on the control Lyapunov function method and modifying the conventional PI controller by adding a consensus term to the integrand dynamic. The proposed distributed GPI-FTC provides plug-n-play capability, scalability, and fast finite-time convergence of the system states. Moreover, a reactive power sharing (Q-sharing) method is designed to improve the sharing pattern of reactive power under exact voltage regulation. Also, a distributed voltage observer is developed for average voltage regulation. Performance of the proposed GPI-FTC is validated through numerical simulations of the detailed model of the microgrid, including small signal analysis, load change, DG outage, Q-sharing, and performance comparison.\n
\n\n\n\n \n\n \n \n Rodrigues, Y. R., Abdelaziz, M., Wang, L., & Kamwa, I.\n\n\n \n \n \n \n PMU Based Frequency Regulation Paradigm for Multi-Area Power Systems Reliability Improvement.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Systems, 36(5): 4387-4399. Sep. 2021.\n \n\n\n\n
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\n\n\n@ARTICLE{9380733,\n author={Rodrigues, Yuri R. and Abdelaziz, Morad and Wang, Liwei and Kamwa, Innocent},\n journal={IEEE Transactions on Power Systems}, \n title={PMU Based Frequency Regulation Paradigm for Multi-Area Power Systems Reliability Improvement}, \n year={2021},\n volume={36},\n number={5},\n pages={4387-4399},\n abstract={This work proposes a novel frequency regulation paradigm for multi-area interconnected power systems. The developed approach capitalizes on phasor measurement units (PMUs) advanced monitoring to overcome design limitations imposed by legacy supervisory control and data acquisition (SCADA) systems. For this, a novel measurement-based controller integrating primary and secondary regulation is proposed. First, taking advantage of PMUs synchronized measurements, novel centralized corrective actions are developed using dynamic data aggregation. These actions provide a foreknowledge of generators expected steady-state during the system dynamics, significantly improving the system frequency rebound and steady-state realization while ensuring null area control errors (ACE). Next, a new local power system stabilizing perspective is developed. This controller provides local counterweighting actions allowing for faster corrective actions without compromising the system dynamic response, i.e., mitigating oscillations and overshoots. The proposed approach design considers monitoring and communication system non-idealities, such as: latency, processing and waiting time, measurements synchronization and sampling resolution. In addition, stability and steady-state objectives are mathematically demonstrated, and comparative simulation case-studies developed. Obtained results indicate a meaningful improvement of power systems frequency regulation and reliability, including faster steady-state realization and rebound, mitigation of oscillations and overshoot, improved service capacity and higher reliability to cascade events.},\n keywords={Power system stability;Frequency control;Phasor measurement units;Steady-state;Automatic generation control;Automatic generation control;frequency regulation;multi-area interconnected power system;phasor measurement units},\n doi={10.1109/TPWRS.2021.3066382},\n ISSN={1558-0679},\n month={Sep.},}\n\n This work proposes a novel frequency regulation paradigm for multi-area interconnected power systems. The developed approach capitalizes on phasor measurement units (PMUs) advanced monitoring to overcome design limitations imposed by legacy supervisory control and data acquisition (SCADA) systems. For this, a novel measurement-based controller integrating primary and secondary regulation is proposed. First, taking advantage of PMUs synchronized measurements, novel centralized corrective actions are developed using dynamic data aggregation. These actions provide a foreknowledge of generators expected steady-state during the system dynamics, significantly improving the system frequency rebound and steady-state realization while ensuring null area control errors (ACE). Next, a new local power system stabilizing perspective is developed. This controller provides local counterweighting actions allowing for faster corrective actions without compromising the system dynamic response, i.e., mitigating oscillations and overshoots. The proposed approach design considers monitoring and communication system non-idealities, such as: latency, processing and waiting time, measurements synchronization and sampling resolution. In addition, stability and steady-state objectives are mathematically demonstrated, and comparative simulation case-studies developed. Obtained results indicate a meaningful improvement of power systems frequency regulation and reliability, including faster steady-state realization and rebound, mitigation of oscillations and overshoot, improved service capacity and higher reliability to cascade events.\n
\n\n\n\n \n\n \n \n Amiri, P., Eberle, W., Gautam, D., & Botting, C.\n\n\n \n \n \n \n An Adaptive Method for DC Current Reduction in Totem Pole Power Factor Correction Converters.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Electronics, 36(10): 11900-11909. Oct 2021.\n \n\n\n\n
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\n\n\n@ARTICLE{9384299,\n author={Amiri, Peyman and Eberle, Wilson and Gautam, Deepak and Botting, Chris},\n journal={IEEE Transactions on Power Electronics}, \n title={An Adaptive Method for DC Current Reduction in Totem Pole Power Factor Correction Converters}, \n year={2021},\n volume={36},\n number={10},\n pages={11900-11909},\n abstract={Enabled by improved wideband gap semiconductor devices, the bridgeless totem pole power factor correction (PFC) converter is becoming an increasingly popular topology for front end ac input of high power battery chargers and telecom power supplies, achieving high efficiency as well as low electromagnetic interference. Unlike the conventional boost PFC, in a totem pole structure, different circuits are used for shaping the current in positive and negative half cycles. As a result, sensing inconsistencies may result in a significant dc component in the input current. In field applications, accumulation of dc currents from multiple PFC rectifier based loads can potentially lead to saturation of distribution transformers. This article proposes a low-cost method for adaptive detection and reduction of the dc input current based on time domain analysis of the dc link voltage. The effectiveness of the method in compensating manufacturing tolerances is experimentally validated on a 390 V, 1450 W interleaved totem pole PFC converter, and dc current reduction of up to 99.6% is achieved.},\n keywords={Gallium nitride;Sensors;Power harmonic filters;Switches;Battery chargers;Standards;Inductors;Adaptive control;dc input current detection and reduction;digital control;power factor correction (PFC);totem pole},\n doi={10.1109/TPEL.2021.3068066},\n ISSN={1941-0107},\n month={Oct},}\n\n Enabled by improved wideband gap semiconductor devices, the bridgeless totem pole power factor correction (PFC) converter is becoming an increasingly popular topology for front end ac input of high power battery chargers and telecom power supplies, achieving high efficiency as well as low electromagnetic interference. Unlike the conventional boost PFC, in a totem pole structure, different circuits are used for shaping the current in positive and negative half cycles. As a result, sensing inconsistencies may result in a significant dc component in the input current. In field applications, accumulation of dc currents from multiple PFC rectifier based loads can potentially lead to saturation of distribution transformers. This article proposes a low-cost method for adaptive detection and reduction of the dc input current based on time domain analysis of the dc link voltage. The effectiveness of the method in compensating manufacturing tolerances is experimentally validated on a 390 V, 1450 W interleaved totem pole PFC converter, and dc current reduction of up to 99.6% is achieved.\n
\n\n\n\n \n\n \n \n Dey, A., Shafiei, N., Khandekhar, R., Eberle, W., & Li, R.\n\n\n \n \n \n \n Lumped Parameter Thermal Network Modelling of Power Transformers.\n \n \n \n\n\n \n\n\n\n In 2021 20th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (iTherm), pages 172-178, June 2021. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{9503171,\n author={Dey, Anshuman and Shafiei, Navid and Khandekhar, Rahul and Eberle, Wilson and Li, Ri},\n booktitle={2021 20th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (iTherm)}, \n title={Lumped Parameter Thermal Network Modelling of Power Transformers}, \n year={2021},\n volume={},\n number={},\n pages={172-178},\n abstract={The trend of increasing power densities of modern day power converters is pushing components like power transformers to their thermal limits, furthering the need for accurate thermal modelling. Numerical methods like Computational Fluid Dynamics (CFD) and Finite Element Analysis (FEA) are commonly used for the thermal characterization of electronic components like power transformers. Although, such numerical methods provide accurate thermal results they possess the drawback of having a large computational head. The present paper aims to address this issue by investigating a low cost Lumped Parameter Thermal Network (LPTN) model that can provide reasonably accurate results with greatly reduced computational effort. Further, the thermal network modelling methodology employed can be easily automated with a simple and intuitive method for thermal resistance calculation. In order to compare the accuracy of the proposed thermal network model to conventional numerical models, a coupled electromagnetic and CFD (multiphysics) analysis is conducted. Finally, the proposed thermal network model and the multiphysics model are experimentally validated on a PQ 40/30 transformer operating in a 3.3 kW Switch Mode Power Supply (SMPS). The proposed thermal network model is able to predict transformer operating temperatures within 10 % of the experimental results, with only a fraction of the computational time of the detailed multiphysics numerical model, providing a means of quick estimation of transformer thermal management requirements in the initial design phase.},\n keywords={Thermal management of electronics;Computational modeling;Computational fluid dynamics;Thermal resistance;Thermomechanical processes;Switches;Thermal management;Thermal Network Modelling;Thermal Management;Power Transformer;Multiphysics Modelling},\n doi={10.1109/ITherm51669.2021.9503171},\n ISSN={2694-2135},\n month={June},}\n\n The trend of increasing power densities of modern day power converters is pushing components like power transformers to their thermal limits, furthering the need for accurate thermal modelling. Numerical methods like Computational Fluid Dynamics (CFD) and Finite Element Analysis (FEA) are commonly used for the thermal characterization of electronic components like power transformers. Although, such numerical methods provide accurate thermal results they possess the drawback of having a large computational head. The present paper aims to address this issue by investigating a low cost Lumped Parameter Thermal Network (LPTN) model that can provide reasonably accurate results with greatly reduced computational effort. Further, the thermal network modelling methodology employed can be easily automated with a simple and intuitive method for thermal resistance calculation. In order to compare the accuracy of the proposed thermal network model to conventional numerical models, a coupled electromagnetic and CFD (multiphysics) analysis is conducted. Finally, the proposed thermal network model and the multiphysics model are experimentally validated on a PQ 40/30 transformer operating in a 3.3 kW Switch Mode Power Supply (SMPS). The proposed thermal network model is able to predict transformer operating temperatures within 10 % of the experimental results, with only a fraction of the computational time of the detailed multiphysics numerical model, providing a means of quick estimation of transformer thermal management requirements in the initial design phase.\n
\n\n\n\n \n\n \n \n Han, J., Bieber, L., Wang, L., & Li, W.\n\n\n \n \n \n \n Complete Equivalent Model of Hybrid Three-Level and Modular Multilevel Converter for Accelerated Electromagnetic Transient Simulation.\n \n \n \n\n\n \n\n\n\n In 2021 IEEE Canadian Conference on Electrical and Computer Engineering (CCECE), pages 1-5, Sep. 2021. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{9569141,\n author={Han, Jintao and Bieber, Levi and Wang, Liwei and Li, Wei},\n booktitle={2021 IEEE Canadian Conference on Electrical and Computer Engineering (CCECE)}, \n title={Complete Equivalent Model of Hybrid Three-Level and Modular Multilevel Converter for Accelerated Electromagnetic Transient Simulation}, \n year={2021},\n volume={},\n number={},\n pages={1-5},\n abstract={The hybrid three-level and modular multilevel converter (H3LC) is an innovative power converter architecture for transmission of high voltage direct current (HVDC) electricity, which features high converter efficiency, small converter footprint, and DC fault ride-through capability. However, its large number of semiconductor switches require significant computational effort for electromagnetic transient (EMT) type modeling. Fast EMT models are expected to shorten the design time of the converter while maintaining its accuracy. This paper introduces a complete equivalent model (CEM) of the H3LC, which reduces the circuit complexity and improves simulation efficiency without compromising simulation accuracy.},\n keywords={Multilevel converters;Computational modeling;Voltage;Power system stability;Hybrid power systems;Topology;Semiconductor diodes;Complete equivalent model;electromagnetic transient simulations;voltage source converter;high voltage direct current transmission},\n doi={10.1109/CCECE53047.2021.9569141},\n ISSN={2576-7046},\n month={Sep.},}\n\n The hybrid three-level and modular multilevel converter (H3LC) is an innovative power converter architecture for transmission of high voltage direct current (HVDC) electricity, which features high converter efficiency, small converter footprint, and DC fault ride-through capability. However, its large number of semiconductor switches require significant computational effort for electromagnetic transient (EMT) type modeling. Fast EMT models are expected to shorten the design time of the converter while maintaining its accuracy. This paper introduces a complete equivalent model (CEM) of the H3LC, which reduces the circuit complexity and improves simulation efficiency without compromising simulation accuracy.\n
\n\n\n\n \n\n \n \n Amiri, P., Eberle, W., Gautam, D., & Botting, C.\n\n\n \n \n \n \n A Truly Universal Bridgeless Single-Stage Soft-Switching AC/DC converter for EV On-Board Charging Application.\n \n \n \n\n\n \n\n\n\n In 2021 IEEE Energy Conversion Congress and Exposition (ECCE), pages 1868-1875, Oct 2021. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{9595379,\n author={Amiri, Peyman and Eberle, Wilson and Gautam, Deepak and Botting, Chris},\n booktitle={2021 IEEE Energy Conversion Congress and Exposition (ECCE)}, \n title={A Truly Universal Bridgeless Single-Stage Soft-Switching AC/DC converter for EV On-Board Charging Application}, \n year={2021},\n volume={},\n number={},\n pages={1868-1875},\n abstract={With accelerated adoption of long range electric vehicles (EVs) lightweight and highly efficient on-board chargers (OBCs) are desirable. At the same time, development of OBCs capable of operation with single and three phase (truly universal) input offers the most versatile charging solution to EV owners regardless of their access to the electricity distribution network. In this work, use of two bridgeless current-fed push pull converters with active clamp is proposed as a truly universal bridgeless single-stage AC/DC converter for on-board charging application. The building blocks of the proposed topology achieve soft-switching and operate in continuous conduction mode with constant switching frequency. The diode bridge is eliminated at the AC input, which results in a simpler thermal management and significant savings in conduction losses. Principle of operation for the proposed converter and details of the proposed control scheme are illustrated in this paper. Proper operation of the converter and effectiveness of the control are verified through PSIM simulation for a truly universal 360V 5.4 kW single stage OBC.},\n keywords={Bridges;AC-DC power converters;Switching frequency;Switches;Zero voltage switching;Thermal management;Thermal conductivity;Battery charger;Bridgeless;Universal input;Power factor correction;Single stage;Soft switching;Control},\n doi={10.1109/ECCE47101.2021.9595379},\n ISSN={2329-3748},\n month={Oct},}\n\n With accelerated adoption of long range electric vehicles (EVs) lightweight and highly efficient on-board chargers (OBCs) are desirable. At the same time, development of OBCs capable of operation with single and three phase (truly universal) input offers the most versatile charging solution to EV owners regardless of their access to the electricity distribution network. In this work, use of two bridgeless current-fed push pull converters with active clamp is proposed as a truly universal bridgeless single-stage AC/DC converter for on-board charging application. The building blocks of the proposed topology achieve soft-switching and operate in continuous conduction mode with constant switching frequency. The diode bridge is eliminated at the AC input, which results in a simpler thermal management and significant savings in conduction losses. Principle of operation for the proposed converter and details of the proposed control scheme are illustrated in this paper. Proper operation of the converter and effectiveness of the control are verified through PSIM simulation for a truly universal 360V 5.4 kW single stage OBC.\n
\n\n\n\n \n\n \n \n Amiri, P., Eberle, W., Gautam, D., & Botting, C.\n\n\n \n \n \n \n A CCM Bridgeless Single-Stage Soft-Switching AC-DC Converter for EV Charging Application.\n \n \n \n\n\n \n\n\n\n In 2021 IEEE Energy Conversion Congress and Exposition (ECCE), pages 1846-1852, Oct 2021. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{9595579,\n author={Amiri, Peyman and Eberle, Wilson and Gautam, Deepak and Botting, Chris},\n booktitle={2021 IEEE Energy Conversion Congress and Exposition (ECCE)}, \n title={A CCM Bridgeless Single-Stage Soft-Switching AC-DC Converter for EV Charging Application}, \n year={2021},\n volume={},\n number={},\n pages={1846-1852},\n abstract={In order to extend the range of electric vehicles (EVs), modern EVs employ large batteries which require lightweight and highly efficient on-board chargers (OBCs). Traditional two-stage chargers suffer from hard switching at the AC-DC stage and in turn low efficiency. In this paper, a bridgeless single-stage AC-DC converter with universal input and wide output voltage range is proposed for EV charging application. The proposed topology operates in continuous conduction mode (CCM) and achieves soft switching at the same time. With no diode bridge at the input, an efficiency gain up to 1.46% can be achieved. The control strategy suitable for bridgeless operation of the converter is illustrated in this paper. Proper operation of the converter and the effectiveness of the control are verified through PSIM simulation for a universal input 360V1.8kW OBC.},\n keywords={Soft switching;Bridge circuits;Switches;Electric vehicle charging;Batteries;Topology;On-board charger;Single-stage charger;Bridgeless;Power factor correction;Soft Switching},\n doi={10.1109/ECCE47101.2021.9595579},\n ISSN={2329-3748},\n month={Oct},}\n\n In order to extend the range of electric vehicles (EVs), modern EVs employ large batteries which require lightweight and highly efficient on-board chargers (OBCs). Traditional two-stage chargers suffer from hard switching at the AC-DC stage and in turn low efficiency. In this paper, a bridgeless single-stage AC-DC converter with universal input and wide output voltage range is proposed for EV charging application. The proposed topology operates in continuous conduction mode (CCM) and achieves soft switching at the same time. With no diode bridge at the input, an efficiency gain up to 1.46% can be achieved. The control strategy suitable for bridgeless operation of the converter is illustrated in this paper. Proper operation of the converter and the effectiveness of the control are verified through PSIM simulation for a universal input 360V1.8kW OBC.\n
\n\n\n\n \n\n \n \n Bieber, L., Wang, L., Jatskevich, J., & Li, W.\n\n\n \n \n \n \n Analytical Conduction Loss Calculation Method for Hybrid Three-Level Converters.\n \n \n \n\n\n \n\n\n\n In 2021 IEEE Electrical Power and Energy Conference (EPEC), pages 44-49, Oct 2021. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{9621345,\n author={Bieber, Levi and Wang, Liwei and Jatskevich, Juri and Li, Wei},\n booktitle={2021 IEEE Electrical Power and Energy Conference (EPEC)}, \n title={Analytical Conduction Loss Calculation Method for Hybrid Three-Level Converters}, \n year={2021},\n volume={},\n number={},\n pages={44-49},\n abstract={A new class of hybrid three-level converters (H3LC) has been recently proposed for voltage-source-converter high-voltage direct current (VSC-HVDC) transmission technology. It features both a small footprint and high efficiency. In the literature, however, the H3LC’s semiconductor losses have only been verified quantitatively through detailed simulation, and only at two operating voltages. This paper presents an analytical method to determine the H3LC’s efficiency over its entire operating range by taking into consideration the conduction power losses of its semiconductor devices, which are assumed to be dominating. Lacking in the literature, this paper presents a method to simplify the determination of the theoretical semiconductor conduction power losses for hybrid three-level converters to improve the converters’ design-to-implementation time. To verify the accuracy and effectiveness of the proposed analytical methodology for power loss calculation, the results are compared against the values obtained from the simulations using the detailed equivalent model (DEM). The proposed analytical method is demonstrated to give accurate predictions of the dominant power losses over a wide range of operating conditions, which may be used for determining the optimal design and operation the H3LCs in practice.},\n keywords={Semiconductor device modeling;Reactive power;Analytical models;Multilevel converters;Conferences;Estimation;Switches;Hybrid Converters;MMC;HVDC;Power Conversion;Power Loss},\n doi={10.1109/EPEC52095.2021.9621345},\n ISSN={2381-2842},\n month={Oct},}\n\n A new class of hybrid three-level converters (H3LC) has been recently proposed for voltage-source-converter high-voltage direct current (VSC-HVDC) transmission technology. It features both a small footprint and high efficiency. In the literature, however, the H3LC’s semiconductor losses have only been verified quantitatively through detailed simulation, and only at two operating voltages. This paper presents an analytical method to determine the H3LC’s efficiency over its entire operating range by taking into consideration the conduction power losses of its semiconductor devices, which are assumed to be dominating. Lacking in the literature, this paper presents a method to simplify the determination of the theoretical semiconductor conduction power losses for hybrid three-level converters to improve the converters’ design-to-implementation time. To verify the accuracy and effectiveness of the proposed analytical methodology for power loss calculation, the results are compared against the values obtained from the simulations using the detailed equivalent model (DEM). The proposed analytical method is demonstrated to give accurate predictions of the dominant power losses over a wide range of operating conditions, which may be used for determining the optimal design and operation the H3LCs in practice.\n
\n\n\n\n \n\n \n \n Zhang, Y., Mohammadpour Shotorbani, A., Wang, L., & Mohammadi-Ivatloo, B.\n\n\n \n \n \n \n Enhanced PI control and adaptive gain tuning schemes for distributed secondary control of an islanded microgrid.\n \n \n \n\n\n \n\n\n\n IET Renewable Power Generation, 15(4): 854–864. 2021.\n \n\n\n\n
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\n\n\n\n@article{zhang2021enhanced,\n title={Enhanced PI control and adaptive gain tuning schemes for distributed secondary control of an islanded microgrid},\n author={Zhang, Yuanshi and Mohammadpour Shotorbani, Amin and Wang, Liwei and Mohammadi-Ivatloo, Behnam},\n journal={IET Renewable Power Generation},\n volume={15},\n number={4},\n pages={854--864},\n year={2021},\n publisher={Wiley Online Library}\n}\n\n\n\n
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\n \n \n\n \n \n Khan, A. A., Lu, Y. W., Eberle, W., Wang, L., Khan, U. A., & Cha, H.\n\n\n \n \n \n \n Single-Phase Split-Inductor Differential Boost Inverters.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Electronics, 35(1): 107-120. Jan 2020.\n \n\n\n\n
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\n\n\n@ARTICLE{8701534,\n author={Khan, Ashraf Ali and Lu, Yun Wi and Eberle, Wilson and Wang, Liwei and Khan, Usman Ali and Cha, Honnyong},\n journal={IEEE Transactions on Power Electronics}, \n title={Single-Phase Split-Inductor Differential Boost Inverters}, \n year={2020},\n volume={35},\n number={1},\n pages={107-120},\n abstract={In this paper, two single-phase single-stage split-inductor buck-boost inverters are proposed: type-I and II. The proposed type-I is unity power factor inverter, while the proposed type-II inverter is suitable for any power factor. Both topologies remove the shoot-through problem. Furthermore, the reverse recovery issues for all switches are eliminated; therefore, mosfets are used to obtain higher efficiencies. The proposed inverters operated at higher switching frequencies confer the additional benefit of smaller passive components. The current stresses of the two switches in the proposed type-I and II inverters are lower of the conventional boost inverter. The dead time can be eliminated at both the high and line switching frequencies. In addition, the inductor conduction loss is minimized to improve efficiency. Moreover, the voltage stresses of the two switches in the type-I inverter can be much lower of its counterpart boost inverter. Most importantly, unlike the conventional high-reliability inverters, the magnetic volume of the proposed high-reliability type-I and II inverters is same of its counterpart boost inverter. The experimental results obtained for 500 W, 110 Vrms, 60 Hz hardware prototypes verify the analysis.},\n keywords={Inverters;Inductors;Stress;Switches;Magnetomechanical effects;MOSFET;Reliability;Buck–boost inverter;efficiency;low current stress;low-voltage stress;magnetic volume;reliability;single stage;split inductor},\n doi={10.1109/TPEL.2019.2913750},\n ISSN={1941-0107},\n month={Jan},}\n\n In this paper, two single-phase single-stage split-inductor buck-boost inverters are proposed: type-I and II. The proposed type-I is unity power factor inverter, while the proposed type-II inverter is suitable for any power factor. Both topologies remove the shoot-through problem. Furthermore, the reverse recovery issues for all switches are eliminated; therefore, mosfets are used to obtain higher efficiencies. The proposed inverters operated at higher switching frequencies confer the additional benefit of smaller passive components. The current stresses of the two switches in the proposed type-I and II inverters are lower of the conventional boost inverter. The dead time can be eliminated at both the high and line switching frequencies. In addition, the inductor conduction loss is minimized to improve efficiency. Moreover, the voltage stresses of the two switches in the type-I inverter can be much lower of its counterpart boost inverter. Most importantly, unlike the conventional high-reliability inverters, the magnetic volume of the proposed high-reliability type-I and II inverters is same of its counterpart boost inverter. The experimental results obtained for 500 W, 110 Vrms, 60 Hz hardware prototypes verify the analysis.\n
\n\n\n\n \n\n \n \n Yu, Y., Saasaa, R., Khan, A. A., & Eberle, W.\n\n\n \n \n \n \n A Series Resonant Energy Storage Cell Voltage Balancing Circuit.\n \n \n \n\n\n \n\n\n\n IEEE Journal of Emerging and Selected Topics in Power Electronics, 8(3): 3151-3161. Sep. 2020.\n \n\n\n\n
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\n\n\n@ARTICLE{8706971,\n author={Yu, Yanqi and Saasaa, Raed and Khan, Ashraf Ali and Eberle, Wilson},\n journal={IEEE Journal of Emerging and Selected Topics in Power Electronics}, \n title={A Series Resonant Energy Storage Cell Voltage Balancing Circuit}, \n year={2020},\n volume={8},\n number={3},\n pages={3151-3161},\n abstract={A novel cell voltage equalizer using a series LC resonant converter is proposed for series-connected energy storage devices, namely, battery or super (or ultra)-capacitor cells. The proposed circuit is an active voltage equalization circuit for energy storage devices that is low cost, small in size, and equalizes the voltages quickly. Compared to the state-of-the-art solutions, the proposed series LC resonant circuit eliminates the complexity of multiwinding transformers, and it can balance series-connected energy storage devices in a short time by transporting energy successively between the cells having highest voltage difference. The detailed circuit operation and theoretical analysis are provided. Simulation and experimental results are presented to demonstrate the voltage equalization process from an initial voltage difference of 527 mV to a final difference of 10 mV in 900 s for three series-connected supercapacitor cells.},\n keywords={Energy storage;Topology;Logic gates;Switches;RLC circuits;Capacitors;Relays;Resonant converter;supercapacitor;voltage deviation;voltage equalization},\n doi={10.1109/JESTPE.2019.2914706},\n ISSN={2168-6785},\n month={Sep.},}\n\n A novel cell voltage equalizer using a series LC resonant converter is proposed for series-connected energy storage devices, namely, battery or super (or ultra)-capacitor cells. The proposed circuit is an active voltage equalization circuit for energy storage devices that is low cost, small in size, and equalizes the voltages quickly. Compared to the state-of-the-art solutions, the proposed series LC resonant circuit eliminates the complexity of multiwinding transformers, and it can balance series-connected energy storage devices in a short time by transporting energy successively between the cells having highest voltage difference. The detailed circuit operation and theoretical analysis are provided. Simulation and experimental results are presented to demonstrate the voltage equalization process from an initial voltage difference of 527 mV to a final difference of 10 mV in 900 s for three series-connected supercapacitor cells.\n
\n\n\n\n \n\n \n \n Khan, A. A., Lu, Y. W., Eberle, W., Wang, L., Khan, U. A., Agamy, M., & Cha, H.\n\n\n \n \n \n \n Single-Stage Bidirectional Buck–Boost Inverters Using a Single Inductor and Eliminating the Common-Mode Leakage Current.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Electronics, 35(2): 1269-1281. Feb 2020.\n \n\n\n\n
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\n\n\n@ARTICLE{8720022,\n author={Khan, Ashraf Ali and Lu, Yun W. and Eberle, Wilson and Wang, Liwei and Khan, Usman Ali and Agamy, Mohammed and Cha, Honnyong},\n journal={IEEE Transactions on Power Electronics}, \n title={Single-Stage Bidirectional Buck–Boost Inverters Using a Single Inductor and Eliminating the Common-Mode Leakage Current}, \n year={2020},\n volume={35},\n number={2},\n pages={1269-1281},\n abstract={This paper presents novel single-phase single-stage buck–boost inverters. The proposed inverters provide buck–boost operation for a wide variation of the input dc voltage. In addition, the proposed inverters are bidirectional and provide reactive power. Further, they require only one inductor. The proposed inverters also eliminate the common-mode leakage current by connecting the output neutral to the midpoint of input capacitors or directly to input voltage sources. Therefore, they are well suitable for photovoltaic applications. Although six switches are required, two switches are working at line frequency, resulting in negligible switching loss. Of the four remaining switches, only two are switching at high frequency at a time. The circuit operations are demonstrated through the analysis of the proposed inverters. A 120 Vrms/60 Hz/400 W hardware prototype was constructed and tested. The experimental results verified the theoretical analysis.},\n keywords={Inverters;Capacitors;Inductors;Leakage currents;High frequency;DC-DC power converters;Modulation;Bidirectional;buck–boost inverter;common-mode leakage current (CMLC);single inductor;single stage},\n doi={10.1109/TPEL.2019.2918349},\n ISSN={1941-0107},\n month={Feb},}\n\n This paper presents novel single-phase single-stage buck–boost inverters. The proposed inverters provide buck–boost operation for a wide variation of the input dc voltage. In addition, the proposed inverters are bidirectional and provide reactive power. Further, they require only one inductor. The proposed inverters also eliminate the common-mode leakage current by connecting the output neutral to the midpoint of input capacitors or directly to input voltage sources. Therefore, they are well suitable for photovoltaic applications. Although six switches are required, two switches are working at line frequency, resulting in negligible switching loss. Of the four remaining switches, only two are switching at high frequency at a time. The circuit operations are demonstrated through the analysis of the proposed inverters. A 120 Vrms/60 Hz/400 W hardware prototype was constructed and tested. The experimental results verified the theoretical analysis.\n
\n\n\n\n \n\n \n \n Rodrigues, Y. R., Abdelaziz, M., & Wang, L.\n\n\n \n \n \n \n D-PMU Based Secondary Frequency Control for Islanded Microgrids.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Smart Grid, 11(1): 857-872. Jan 2020.\n \n\n\n\n
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\n\n\n@ARTICLE{8723146,\n author={Rodrigues, Yuri R. and Abdelaziz, Morad and Wang, Liwei},\n journal={IEEE Transactions on Smart Grid}, \n title={D-PMU Based Secondary Frequency Control for Islanded Microgrids}, \n year={2020},\n volume={11},\n number={1},\n pages={857-872},\n abstract={This paper proposes a secondary frequency control approach for distributed energy resources (DERs) in networks operating in stand-alone mode; i.e., islanded microgrids. The proposed approach takes advantage of the high resolution, low latency, and time-stamped synchronized measurements of the distribution-level phasor measurement units (D-PMUs) to iteratively adjust the generators contribution, considering the D-PMUs derived active power information, in a way that improves the dynamics of the islanded microgrid frequency regulation. These adjustments are performed using a novel adaptive time-variable droop characteristic capable of significantly speeding-up the secondary frequency regulation, mitigating oscillations, and reducing the frequency nadir. The proposed secondary frequency control can be held after the stabilization of the primary control, as well as simultaneously with the primary frequency regulation. Results show the effectiveness of the proposed approach in significantly improving the frequency regulation of islanded microgrids.},\n keywords={Frequency control;Microgrids;Time-frequency analysis;Steady-state;Power system dynamics;Synchronization;D-PMU;secondary frequency control;microgrids},\n doi={10.1109/TSG.2019.2919123},\n ISSN={1949-3061},\n month={Jan},}\n\n This paper proposes a secondary frequency control approach for distributed energy resources (DERs) in networks operating in stand-alone mode; i.e., islanded microgrids. The proposed approach takes advantage of the high resolution, low latency, and time-stamped synchronized measurements of the distribution-level phasor measurement units (D-PMUs) to iteratively adjust the generators contribution, considering the D-PMUs derived active power information, in a way that improves the dynamics of the islanded microgrid frequency regulation. These adjustments are performed using a novel adaptive time-variable droop characteristic capable of significantly speeding-up the secondary frequency regulation, mitigating oscillations, and reducing the frequency nadir. The proposed secondary frequency control can be held after the stabilization of the primary control, as well as simultaneously with the primary frequency regulation. Results show the effectiveness of the proposed approach in significantly improving the frequency regulation of islanded microgrids.\n
\n\n\n\n \n\n \n \n Khan, U. A., Cha, H., Park, J., Khan, A. A., & Eberle, W.\n\n\n \n \n \n \n A Family of Improved Dual-Buck DC–AC Inverters and Dual-Boost AC–DC Converters.\n \n \n \n\n\n \n\n\n\n IEEE Journal of Emerging and Selected Topics in Power Electronics, 8(3): 2930-2942. Sep. 2020.\n \n\n\n\n
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\n\n\n@ARTICLE{8744365,\n author={Khan, Usman Ali and Cha, Honnyong and Park, Jung-Wook and Khan, Ashraf Ali and Eberle, Wilson},\n journal={IEEE Journal of Emerging and Selected Topics in Power Electronics}, \n title={A Family of Improved Dual-Buck DC–AC Inverters and Dual-Boost AC–DC Converters}, \n year={2020},\n volume={8},\n number={3},\n pages={2930-2942},\n abstract={Conventional cascaded dual-buck dc-ac inverters and dual-boost ac-dc converters can achieve high efficiency by using power MOSFETs without causing reverse recovery issues. In addition, these topologies can provide high reliability by eliminating shoot-through issues. As a result, dead-time in the switching signals can be eliminated and higher switching frequencies can be used. However, these topologies have a major and serious drawback of having more inductors in them and a high magnetic volume. This paper presents a family of improved dual-buck dc-ac inverters and dual-boost ac-dc converters with fewer inductors that can effectively mitigate the high magnetic volume and large number of inductors problems without adding any complexity to the control or hardware. The proposed dualbuck inverters (DBI) and dual-boost converters have all the aforementioned benefits of conventional DBIs and dual-boost converters, respectively. In addition, they reduce the magnetic volume, cost, and complexity of the circuit layout through the use of fewer inductors. To validate the feasibility of the proposed topologies, experimental results of the proposed 2-kW cascaded dual-buck dc-ac inverter with 310 Vdc input voltage and 420 Vrms output voltage are provided.},\n keywords={Inverters;Inductors;MOSFET;Switches;Magnetic circuits;Reliability;Dual-boost ac–dc converter;dual-buck dc–ac inverter;magnetic volume;metal-oxide semiconductor field-effect transistor (MOSFET);power density;reliability},\n doi={10.1109/JESTPE.2019.2924489},\n ISSN={2168-6785},\n month={Sep.},}\n\n Conventional cascaded dual-buck dc-ac inverters and dual-boost ac-dc converters can achieve high efficiency by using power MOSFETs without causing reverse recovery issues. In addition, these topologies can provide high reliability by eliminating shoot-through issues. As a result, dead-time in the switching signals can be eliminated and higher switching frequencies can be used. However, these topologies have a major and serious drawback of having more inductors in them and a high magnetic volume. This paper presents a family of improved dual-buck dc-ac inverters and dual-boost ac-dc converters with fewer inductors that can effectively mitigate the high magnetic volume and large number of inductors problems without adding any complexity to the control or hardware. The proposed dualbuck inverters (DBI) and dual-boost converters have all the aforementioned benefits of conventional DBIs and dual-boost converters, respectively. In addition, they reduce the magnetic volume, cost, and complexity of the circuit layout through the use of fewer inductors. To validate the feasibility of the proposed topologies, experimental results of the proposed 2-kW cascaded dual-buck dc-ac inverter with 310 Vdc input voltage and 420 Vrms output voltage are provided.\n
\n\n\n\n \n\n \n \n Meng, X., Han, J., Pfannschmidt, J., Wang, L., Li, W., Zhang, F., & Belanger, J.\n\n\n \n \n \n \n Combining Detailed Equivalent Model With Switching-Function-Based Average Value Model for Fast and Accurate Simulation of MMCs.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Energy Conversion, 35(1): 484-496. March 2020.\n \n\n\n\n
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\n\n\n@ARTICLE{8854976,\n author={Meng, Xuekun and Han, Jintao and Pfannschmidt, Joel and Wang, Liwei and Li, Wei and Zhang, Fei and Belanger, Jean},\n journal={IEEE Transactions on Energy Conversion}, \n title={Combining Detailed Equivalent Model With Switching-Function-Based Average Value Model for Fast and Accurate Simulation of MMCs}, \n year={2020},\n volume={35},\n number={1},\n pages={484-496},\n abstract={Modeling and simulation play a vital role in the design and testing of modular multilevel converter (MMC) high voltage direct current (HVDC) systems. Detailed equivalent model (DEM) and switching-function-based average value model (SFB-AVM) are two major types of accurate and efficient models to represent the dynamic response of the MMCs. However, the DEM and the SFB-AVM possess unique benefits depending on the purpose of the simulation studies. The DEM provides a detailed representation of submodule (SM) switching events and individual capacitor ripples. The SFB-AVM provides faster simulation speed by using arm equivalent capacitance. Combining both models in a universal arm equivalent circuit gives the users the choice of selecting the most appropriate modeling method during dynamic simulation. This paper proposes a universal modeling framework combining the DEM with the SFB-AVM which allows the DEM and the SFB-AVM smoothly switch from one to the other during dynamic simulation. The proposed SFB-AVM can accurately represent the MMCs with different SM types. The proposed models are validated in offline and real-time simulation studies which demonstrate the improved simulation speeds of the proposed SFB-AVM over the DEM especially for large numbers of SMs.},\n keywords={Capacitors;Switches;Integrated circuit modeling;Voltage control;Insulated gate bipolar transistors;Capacitance;Indexes;Average value model;electromagnetic transient (EMT) simulation;HVDC;modular multilevel converter;real-time simulation;switching function},\n doi={10.1109/TEC.2019.2944352},\n ISSN={1558-0059},\n month={March},}\n\n Modeling and simulation play a vital role in the design and testing of modular multilevel converter (MMC) high voltage direct current (HVDC) systems. Detailed equivalent model (DEM) and switching-function-based average value model (SFB-AVM) are two major types of accurate and efficient models to represent the dynamic response of the MMCs. However, the DEM and the SFB-AVM possess unique benefits depending on the purpose of the simulation studies. The DEM provides a detailed representation of submodule (SM) switching events and individual capacitor ripples. The SFB-AVM provides faster simulation speed by using arm equivalent capacitance. Combining both models in a universal arm equivalent circuit gives the users the choice of selecting the most appropriate modeling method during dynamic simulation. This paper proposes a universal modeling framework combining the DEM with the SFB-AVM which allows the DEM and the SFB-AVM smoothly switch from one to the other during dynamic simulation. The proposed SFB-AVM can accurately represent the MMCs with different SM types. The proposed models are validated in offline and real-time simulation studies which demonstrate the improved simulation speeds of the proposed SFB-AVM over the DEM especially for large numbers of SMs.\n
\n\n\n\n \n\n \n \n Meng, X., Han, J., Bieber, L. M., Wang, L., Li, W., & Belanger, J.\n\n\n \n \n \n \n A Universal Blocking-Module-Based Average Value Model of Modular Multilevel Converters With Different Types of Submodules.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Energy Conversion, 35(1): 53-66. March 2020.\n \n\n\n\n
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\n\n\n@ARTICLE{8854981,\n author={Meng, Xuekun and Han, Jintao and Bieber, Levi M. and Wang, Liwei and Li, Wei and Belanger, Jean},\n journal={IEEE Transactions on Energy Conversion}, \n title={A Universal Blocking-Module-Based Average Value Model of Modular Multilevel Converters With Different Types of Submodules}, \n year={2020},\n volume={35},\n number={1},\n pages={53-66},\n abstract={The large amount of power electronic submodules and semiconductor switching events in the Modular Multilevel Converter (MMC) introduces several challenges for efficient and accurate Electro-Magnetic Transient (EMT) simulation. Research efforts have focused on developing Average Value Models (AVMs) of MMC that enable fast and accurate dynamic simulation of the converter. This paper proposes a universal blocking-module-based AVM, which can simulate the MMC of different submodule types and provide accurate results for the MMC operating in both blocking and de-blocking modes. An analytical approach is included in the model to calculate the semiconductor losses of different submodule types in the MMC. The proposed model is validated against a detailed switching-based model and the state-of-the-art AVMs in a 41-level two-terminal MMC-HVDC system.},\n keywords={Capacitors;Voltage control;Semiconductor device modeling;Circuit faults;Switches;Insulated gate bipolar transistors;Integrated circuit modeling;Average value model;detailed equivalent model;electromagnetic simulation;HVDC converter;multilevel converter;power system simulation;switching function},\n doi={10.1109/TEC.2019.2944332},\n ISSN={1558-0059},\n month={March},}\n\n The large amount of power electronic submodules and semiconductor switching events in the Modular Multilevel Converter (MMC) introduces several challenges for efficient and accurate Electro-Magnetic Transient (EMT) simulation. Research efforts have focused on developing Average Value Models (AVMs) of MMC that enable fast and accurate dynamic simulation of the converter. This paper proposes a universal blocking-module-based AVM, which can simulate the MMC of different submodule types and provide accurate results for the MMC operating in both blocking and de-blocking modes. An analytical approach is included in the model to calculate the semiconductor losses of different submodule types in the MMC. The proposed model is validated against a detailed switching-based model and the state-of-the-art AVMs in a 41-level two-terminal MMC-HVDC system.\n
\n\n\n\n \n\n \n \n Bieber, L., Pfannschmidt, J., Wang, L., Nami, A., & Li, W.\n\n\n \n \n \n \n A Hybrid Three-Level and Modular Multilevel Converter With DC Fault Blocking Capability and Reduced Semiconductor Losses.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Delivery, 35(4): 1895-1908. Aug 2020.\n \n\n\n\n
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\n\n\n@ARTICLE{8926522,\n author={Bieber, Levi and Pfannschmidt, Joel and Wang, Liwei and Nami, Alireza and Li, Wei},\n journal={IEEE Transactions on Power Delivery}, \n title={A Hybrid Three-Level and Modular Multilevel Converter With DC Fault Blocking Capability and Reduced Semiconductor Losses}, \n year={2020},\n volume={35},\n number={4},\n pages={1895-1908},\n abstract={This article proposes a hybrid three-level converter (H3LC) with AC-side cascaded full-bridge submodules (FBSM) for high voltage direct current (HVDC) transmission. The three-level converter operates at fundamental frequency switching to modulate square-wave output voltages. The AC outputs of the three-level converter are connected to cascaded FBSMs, which shape the square-wave voltages into multilevel sinusoidal voltages at the point of common coupling. Using third-order harmonic voltage injection, the AC-side chainlink voltage can be limited to within a quarter of the DC-side voltage which reduces the number of FBSMs and the associated semiconductor losses. The H3LC is capable of blocking DC pole-to-pole fault using the AC-side FBSMs and the proposed protection branches, each of which consists of a low-loss load-current carrying branch and a main breaker. Simulation studies demonstrate the effectiveness of the proposed converter for independent real and reactive power control as well as DC pole-to-pole fault blocking. Compared to other state-of-the-art HVDC converter topologies with DC fault blocking capability, i.e., the mixed half- and full-bridge modular multilevel converter and the hybrid two-level converter with AC-side cascaded FBSMs, the proposed H3LC provides reduced semiconductor losses due to fundamental frequency switching of the three-level converter and the reduced number of submodules.},\n keywords={Harmonic analysis;Voltage control;HVDC transmission;Switches;Topology;Insulated gate bipolar transistors;Circuit faults;AC-side cascaded full bridge submodule (FBSM);DC fault blocking;HVDC transmission;hybrid multilevel converter;modular multilevel converter (MMC);Three-level T-type converter;voltage source converter (VSC)},\n doi={10.1109/TPWRD.2019.2956723},\n ISSN={1937-4208},\n month={Aug},}\n\n This article proposes a hybrid three-level converter (H3LC) with AC-side cascaded full-bridge submodules (FBSM) for high voltage direct current (HVDC) transmission. The three-level converter operates at fundamental frequency switching to modulate square-wave output voltages. The AC outputs of the three-level converter are connected to cascaded FBSMs, which shape the square-wave voltages into multilevel sinusoidal voltages at the point of common coupling. Using third-order harmonic voltage injection, the AC-side chainlink voltage can be limited to within a quarter of the DC-side voltage which reduces the number of FBSMs and the associated semiconductor losses. The H3LC is capable of blocking DC pole-to-pole fault using the AC-side FBSMs and the proposed protection branches, each of which consists of a low-loss load-current carrying branch and a main breaker. Simulation studies demonstrate the effectiveness of the proposed converter for independent real and reactive power control as well as DC pole-to-pole fault blocking. Compared to other state-of-the-art HVDC converter topologies with DC fault blocking capability, i.e., the mixed half- and full-bridge modular multilevel converter and the hybrid two-level converter with AC-side cascaded FBSMs, the proposed H3LC provides reduced semiconductor losses due to fundamental frequency switching of the three-level converter and the reduced number of submodules.\n
\n\n\n\n \n\n \n \n Khan, A. A., Eberle, W., Wang, L., Akbar, F., Khan, U. A., Lu, Y. W., & Agamy, M.\n\n\n \n \n \n \n Coupled-Inductor Buck–Boost Inverter With Reduced Current Ripple.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Electronics, 35(8): 7933-7946. Aug 2020.\n \n\n\n\n
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\n\n\n@ARTICLE{8943997,\n author={Khan, Ashraf Ali and Eberle, Wilson and Wang, Liwei and Akbar, Fazal and Khan, Usman Ali and Lu, Yun W. and Agamy, Mohammad},\n journal={IEEE Transactions on Power Electronics}, \n title={Coupled-Inductor Buck–Boost Inverter With Reduced Current Ripple}, \n year={2020},\n volume={35},\n number={8},\n pages={7933-7946},\n abstract={This article presents novel buck-boost inverter using coupled inductors and half-cycle phase-shifted modulation. The effective switching frequency of the input inductors is twice the actual switching frequency of semiconductor switches. In addition, the number of voltage levels of the input inductors is increased and the voltage magnitude is decreased. As a result, the input inductors are designed much smaller and the current ripples of both the input inductors and the dc voltage source are decreased. To reduce the number of inductors, input inductors are incorporated in the leakage inductance of the coupled inductors. Moreover, part of the circuit can be bypassed to improve the efficiency of the proposed inverter. The clamping switches decrease the power loss of circulating current and improve the peak efficiency to 97.2%. Besides, the proposed inverter has no shoot-through. Furthermore, mosfets can be used without reverse-recovery issues and associated loss. As a proof of concept, the experimental results of the proposed single-phase 500-W prototype inverter with 100-200 V input voltage and 110 Vrms output voltage at 50 kHz are provided.},\n keywords={Inductors;Inverters;Switching frequency;Clamps;Switches;Inductance;MOSFET;Boost inverter;coupled inductor;effective switching frequency;efficiency;input inductor;pulsewidth modulation (PWM) voltage levels;reliability},\n doi={10.1109/TPEL.2019.2962668},\n ISSN={1941-0107},\n month={Aug},}\n\n This article presents novel buck-boost inverter using coupled inductors and half-cycle phase-shifted modulation. The effective switching frequency of the input inductors is twice the actual switching frequency of semiconductor switches. In addition, the number of voltage levels of the input inductors is increased and the voltage magnitude is decreased. As a result, the input inductors are designed much smaller and the current ripples of both the input inductors and the dc voltage source are decreased. To reduce the number of inductors, input inductors are incorporated in the leakage inductance of the coupled inductors. Moreover, part of the circuit can be bypassed to improve the efficiency of the proposed inverter. The clamping switches decrease the power loss of circulating current and improve the peak efficiency to 97.2%. Besides, the proposed inverter has no shoot-through. Furthermore, mosfets can be used without reverse-recovery issues and associated loss. As a proof of concept, the experimental results of the proposed single-phase 500-W prototype inverter with 100-200 V input voltage and 110 Vrms output voltage at 50 kHz are provided.\n
\n\n\n\n \n\n \n \n Khan, A. A., Lu, Y. W., Khan, U. A., Wang, L., Eberle, W., & Agamy, M.\n\n\n \n \n \n \n Novel Transformerless Buck–Boost Inverters Without Leakage Current.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Industrial Electronics, 67(12): 10442-10454. Dec 2020.\n \n\n\n\n
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\n\n\n@ARTICLE{8948311,\n author={Khan, Ashraf Ali and Lu, Yun W. and Khan, Usman Ali and Wang, Liwei and Eberle, Wilson and Agamy, Mohammed},\n journal={IEEE Transactions on Industrial Electronics}, \n title={Novel Transformerless Buck–Boost Inverters Without Leakage Current}, \n year={2020},\n volume={67},\n number={12},\n pages={10442-10454},\n abstract={This article presents novel transformerless single-stage buck-boost inverters with reactive power flow capability. The common-mode voltage of the proposed inverters is constant, which results in negligible leakage current. The output current of the proposed inverters is continuous that lowers the output harmonics and size of the output filtering capacitor. In the proposed inverters, only two switches receive high-frequency switching signals at a time, which reduces the power loss. The proposed topologies can achieve efficient power conversion with a wide input voltage range. A 120-Vrms/60-Hz output voltage, 74-200-V input voltage, and 500-W output power hardware prototype of the proposed inverter is built and tested with resistive, partially inductive, and partially capacitive loads. A peak efficiency of 97.3% is obtained.},\n keywords={Inverters;Leakage currents;Inductors;DC-DC power converters;Switches;Reactive power;Modulation;Buck–boost inverter;common-mode leakage current;continuous output current},\n doi={10.1109/TIE.2019.2962478},\n ISSN={1557-9948},\n month={Dec},}\n\n This article presents novel transformerless single-stage buck-boost inverters with reactive power flow capability. The common-mode voltage of the proposed inverters is constant, which results in negligible leakage current. The output current of the proposed inverters is continuous that lowers the output harmonics and size of the output filtering capacitor. In the proposed inverters, only two switches receive high-frequency switching signals at a time, which reduces the power loss. The proposed topologies can achieve efficient power conversion with a wide input voltage range. A 120-Vrms/60-Hz output voltage, 74-200-V input voltage, and 500-W output power hardware prototype of the proposed inverter is built and tested with resistive, partially inductive, and partially capacitive loads. A peak efficiency of 97.3% is obtained.\n
\n\n\n\n \n\n \n \n Bieber, L. M., Wang, L., & Li, W.\n\n\n \n \n \n \n A Low-Loss Thyristor-Based Hybrid Three-Level and Modular Multilevel Converter With DC Fault Blocking Capability for HVDC Transmission.\n \n \n \n\n\n \n\n\n\n IEEE Open Access Journal of Power and Energy, 7: 111-121. 2020.\n \n\n\n\n
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\n\n\n@ARTICLE{9015997,\n author={Bieber, Levi M. and Wang, Liwei and Li, Wei},\n journal={IEEE Open Access Journal of Power and Energy}, \n title={A Low-Loss Thyristor-Based Hybrid Three-Level and Modular Multilevel Converter With DC Fault Blocking Capability for HVDC Transmission}, \n year={2020},\n volume={7},\n number={},\n pages={111-121},\n abstract={This paper proposes a thyristor-based hybrid three-level converter (TH3LC) equipped with an AC-side full-bridge submodule chain-link (FBCL) for voltage-source converter (VSC) high voltage direct current (HVDC) applications. The TH3LC uses thyristor-based director switches (DSs) to conduct the bulk of transferred power while the AC-FBCL enables a multilevel voltage output. Third-order harmonic voltage injection is used by the AC-FBCL to limit its total blocking voltage to less than or equal to a quarter of the DC-side voltage, reducing the converter footprint, semiconductor count, and losses. The DSs of the TH3LC are force-commutated by an additional neutral-point-connected, low capacitance commutation FBCL (C-FBCL). The C-FBCL enables a stepped-trapezoidal voltage at the output of the three-level converter for straight-forward synchronization with the AC-FBCL and zero-voltage switching for the DSs. Case studies show that the TH3LC provides similar converter efficiency to the half-bridge MMC (HB-MMC) while possessing DC fault blocking capability and a smaller footprint due to a reduced number of submodules.},\n keywords={Thyristors;Circuit faults;Insulated gate bipolar transistors;HVDC transmission;Harmonic analysis;Capacitors;Modulation;AC-side cascaded full bridge submodule;DC fault blocking;HVDC transmission;hybrid multilevel converter;modular multilevel converter;three-level converter;voltage source converter},\n doi={10.1109/OAJPE.2020.2976889},\n ISSN={2687-7910},\n month={},}\n\n This paper proposes a thyristor-based hybrid three-level converter (TH3LC) equipped with an AC-side full-bridge submodule chain-link (FBCL) for voltage-source converter (VSC) high voltage direct current (HVDC) applications. The TH3LC uses thyristor-based director switches (DSs) to conduct the bulk of transferred power while the AC-FBCL enables a multilevel voltage output. Third-order harmonic voltage injection is used by the AC-FBCL to limit its total blocking voltage to less than or equal to a quarter of the DC-side voltage, reducing the converter footprint, semiconductor count, and losses. The DSs of the TH3LC are force-commutated by an additional neutral-point-connected, low capacitance commutation FBCL (C-FBCL). The C-FBCL enables a stepped-trapezoidal voltage at the output of the three-level converter for straight-forward synchronization with the AC-FBCL and zero-voltage switching for the DSs. Case studies show that the TH3LC provides similar converter efficiency to the half-bridge MMC (HB-MMC) while possessing DC fault blocking capability and a smaller footprint due to a reduced number of submodules.\n
\n\n\n\n \n\n \n \n Meng, X., Han, J., Wang, L., & Li, W.\n\n\n \n \n \n \n A Unified Arm Module-Based Average Value Model for Modular Multilevel Converter.\n \n \n \n\n\n \n\n\n\n IEEE Access, 8: 63821-63831. 2020.\n \n\n\n\n
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\n\n\n@ARTICLE{9046782,\n author={Meng, Xuekun and Han, Jintao and Wang, Liwei and Li, Wei},\n journal={IEEE Access}, \n title={A Unified Arm Module-Based Average Value Model for Modular Multilevel Converter}, \n year={2020},\n volume={8},\n number={},\n pages={63821-63831},\n abstract={Modeling modular multilevel converter (MMC) for electromagnetic transients is challenging due to the massive number of switching devices. The fast and simultaneous switching events lead to high computational burden as the number of submodules in the MMC increases. Average value models (AVMs) can increase simulation speed by representing converter dynamics using decoupled AC-DC equivalent circuits. However, it is challenging for the state-of-the-art AVMs to represent the blocking operations of the MMC with the decoupled AC-DC equivalent circuits. Blocking modules with additional ideal switches are introduced to the AVMs to emulate the blocking behaviors of the MMC. However, the use of ideal switches bring additional modeling challenges, such as numerical oscillation due to current discontinuity and complicated circuit structures. This paper proposes a new AVM to deliver accurate simulation results with fast simulation speed. Moreover, based on a unified arm module representation, the proposed model can represent the MMCs with different submodule types with the identical circuit structure. The proposed model is validated using test systems based on a two-terminal HVDC system and 11-terminal CIGRE DC grid. It is shown that the proposed AVM provides faster simulation speed compared to the detailed equivalent model and better simulation accuracy than the state-of-the-art AVMs.},\n keywords={Integrated circuit modeling;Circuit faults;Switches;Capacitors;Insulated gate bipolar transistors;Fault currents;Equivalent circuits;Average value model;blocking module;detailed equivalent model;DC pole-to-pole fault;electromagnetic transients;HVDC converter;modular multilevel converter;power system simulation},\n doi={10.1109/ACCESS.2020.2983356},\n ISSN={2169-3536},\n month={},}\n\n Modeling modular multilevel converter (MMC) for electromagnetic transients is challenging due to the massive number of switching devices. The fast and simultaneous switching events lead to high computational burden as the number of submodules in the MMC increases. Average value models (AVMs) can increase simulation speed by representing converter dynamics using decoupled AC-DC equivalent circuits. However, it is challenging for the state-of-the-art AVMs to represent the blocking operations of the MMC with the decoupled AC-DC equivalent circuits. Blocking modules with additional ideal switches are introduced to the AVMs to emulate the blocking behaviors of the MMC. However, the use of ideal switches bring additional modeling challenges, such as numerical oscillation due to current discontinuity and complicated circuit structures. This paper proposes a new AVM to deliver accurate simulation results with fast simulation speed. Moreover, based on a unified arm module representation, the proposed model can represent the MMCs with different submodule types with the identical circuit structure. The proposed model is validated using test systems based on a two-terminal HVDC system and 11-terminal CIGRE DC grid. It is shown that the proposed AVM provides faster simulation speed compared to the detailed equivalent model and better simulation accuracy than the state-of-the-art AVMs.\n
\n\n\n\n \n\n \n \n Zhang, Y., Shotorbani, A. M., Wang, L., & Li, W.\n\n\n \n \n \n \n Distributed Voltage Regulation and Automatic Power Sharing in Multi-Terminal HVDC Grids.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Systems, 35(5): 3739-3752. Sep. 2020.\n \n\n\n\n
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\n\n\n@ARTICLE{9067044,\n author={Zhang, Yuanshi and Shotorbani, Amin Mohammadpour and Wang, Liwei and Li, Wei},\n journal={IEEE Transactions on Power Systems}, \n title={Distributed Voltage Regulation and Automatic Power Sharing in Multi-Terminal HVDC Grids}, \n year={2020},\n volume={35},\n number={5},\n pages={3739-3752},\n abstract={Conventional droop control methods for power-sharing in a multi-terminal high voltage DC (MTDC) grid lead to voltage deviation from the nominal value. Moreover, the power-sharing is inaccurate in the droop-controlled MTDC system. This paper proposes a secondary controller with a distributed architecture to compensate the voltage deviation and to achieve equal power sharing automatically among the converter stations. A distributed observer is used to estimate the average voltage of the converter stations. The proposed distributed controller and observer use local measurements of output powers and voltages, and only communicate with neighboring stations. Therefore, the requirement of the global information in the centralized secondary control schemes is eliminated, which reduces the communication requirement and improves the reliability of the MTDC grid. The case studies illustrate that the proposed distributed controller regulates the stations' average voltage and shares the power mismatch accurately. Impact of the communication time-delays and the control gain on stability of the MTDC grid are also investigated using the Lyapunov-KrasovskiiLMI condition. It is shown that reducing the control gain can stabilize the MTDC grid in the case of large communication time-delays.},\n keywords={Automatic voltage control;Reliability;Power system stability;Switches;Power demand;Automatic power sharing;average voltage regulation;distributed control scheme;MMC;multi-terminal high-voltage DC system;secondary controller},\n doi={10.1109/TPWRS.2020.2986168},\n ISSN={1558-0679},\n month={Sep.},}\n\n Conventional droop control methods for power-sharing in a multi-terminal high voltage DC (MTDC) grid lead to voltage deviation from the nominal value. Moreover, the power-sharing is inaccurate in the droop-controlled MTDC system. This paper proposes a secondary controller with a distributed architecture to compensate the voltage deviation and to achieve equal power sharing automatically among the converter stations. A distributed observer is used to estimate the average voltage of the converter stations. The proposed distributed controller and observer use local measurements of output powers and voltages, and only communicate with neighboring stations. Therefore, the requirement of the global information in the centralized secondary control schemes is eliminated, which reduces the communication requirement and improves the reliability of the MTDC grid. The case studies illustrate that the proposed distributed controller regulates the stations' average voltage and shares the power mismatch accurately. Impact of the communication time-delays and the control gain on stability of the MTDC grid are also investigated using the Lyapunov-KrasovskiiLMI condition. It is shown that reducing the control gain can stabilize the MTDC grid in the case of large communication time-delays.\n
\n\n\n\n \n\n \n \n Nowak, S., Chen, Y. C., & Wang, L.\n\n\n \n \n \n \n Measurement-Based Optimal DER Dispatch With a Recursively Estimated Sensitivity Model.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Systems, 35(6): 4792-4802. Nov 2020.\n \n\n\n\n
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\n\n\n@ARTICLE{9102358,\n author={Nowak, Severin and Chen, Yu Christine and Wang, Liwei},\n journal={IEEE Transactions on Power Systems}, \n title={Measurement-Based Optimal DER Dispatch With a Recursively Estimated Sensitivity Model}, \n year={2020},\n volume={35},\n number={6},\n pages={4792-4802},\n abstract={This paper presents a measurement-based method to determine distributed energy resource (DER) active- and reactive-power setpoints that minimize bus voltage deviations from prescribed reference values, bus active- and reactive-power deviations from desired setpoints, as well as cost of DER outputs. Central to the proposed method is the estimation of a linear sensitivity model from synchronized voltage and power-injection data collected from distribution-level phasor measurement units installed at only a subset of buses in the distribution system. As new measurements become available, the linear sensitivity model is updated via the recursive weighted partial least-squares estimation method. The estimated sensitivity model is then embedded as an equality constraint in a convex quadratic optimization problem, which can be solved via, e.g., the alternating direction method of multipliers. Numerical simulations involving the IEEE 33-bus distribution test system illustrate key benefits of the proposed method, including (i) eliminating the need for an accurate offline system model, (ii) adapting to online network-topology and operating-point changes, and (iii) being robust against delays potentially attributed to communication, computation, and actuation. Additional numerical simulations involving larger test systems demonstrate computational scalability.},\n keywords={Voltage measurement;Sensitivity;Computational modeling;Numerical models;Least squares approximations;Optimization;Distributed energy resources;measurement-based method;model estimation;optimal DER dispatch;partial least-squares estimation},\n doi={10.1109/TPWRS.2020.2998097},\n ISSN={1558-0679},\n month={Nov},}\n\n This paper presents a measurement-based method to determine distributed energy resource (DER) active- and reactive-power setpoints that minimize bus voltage deviations from prescribed reference values, bus active- and reactive-power deviations from desired setpoints, as well as cost of DER outputs. Central to the proposed method is the estimation of a linear sensitivity model from synchronized voltage and power-injection data collected from distribution-level phasor measurement units installed at only a subset of buses in the distribution system. As new measurements become available, the linear sensitivity model is updated via the recursive weighted partial least-squares estimation method. The estimated sensitivity model is then embedded as an equality constraint in a convex quadratic optimization problem, which can be solved via, e.g., the alternating direction method of multipliers. Numerical simulations involving the IEEE 33-bus distribution test system illustrate key benefits of the proposed method, including (i) eliminating the need for an accurate offline system model, (ii) adapting to online network-topology and operating-point changes, and (iii) being robust against delays potentially attributed to communication, computation, and actuation. Additional numerical simulations involving larger test systems demonstrate computational scalability.\n
\n\n\n\n \n\n \n \n Han, J., Bieber, L., Zhang, Y., Wang, L., Li, W., & Belanger, J.\n\n\n \n \n \n \n Detailed Equivalent and Average Value Models of Hybrid Cascaded Multilevel Converters for Efficient and Accurate EMT-Type Simulation.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Delivery, 35(6): 2951-2962. Dec 2020.\n \n\n\n\n
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\n\n\n@ARTICLE{9117041,\n author={Han, Jintao and Bieber, Levi and Zhang, Yuanshi and Wang, Liwei and Li, Wei and Belanger, Jean},\n journal={IEEE Transactions on Power Delivery}, \n title={Detailed Equivalent and Average Value Models of Hybrid Cascaded Multilevel Converters for Efficient and Accurate EMT-Type Simulation}, \n year={2020},\n volume={35},\n number={6},\n pages={2951-2962},\n abstract={The emerging voltage source converters (VSCs) such as hybrid cascaded multilevel converters (HCMCs) are promising converter technologies which enable higher converter efficiency, compactness, and DC fault resilience for high voltage direct current (HVDC) transmission. However, the large number of switching events due to the converters' submodules introduces a heavy computational burden for electromagnetic transient (EMT) simulations. Efficient and accurate EMT-type converter models play a vital role in the control and design of HVDC converters. Several computationally efficient models for the HCMCs are proposed in this paper, including the detailed equivalent model (DEM) and several average value models (AVMs) of varying accuracy. Additionally, a combined model is proposed which allows the users to switch among the DEM and AVMs during dynamic simulations. The proposed models are validated against the DEM for dynamic transients. The simulation results demonstrate good modeling accuracy of the proposed models. The AVMs are also shown to significantly improve simulation efficiency compared to the DEM, which is very desirable especially for HCMCs with a large number of submodules.},\n keywords={Integrated circuit modeling;Switches;Numerical models;Computational modeling;Harmonic analysis;Capacitors;Voltage control;Average value model;detailed equivalent model;electromagnetic transient simulation;high voltage direct current system;hybrid cascaded multilevel converter},\n doi={10.1109/TPWRD.2020.3002237},\n ISSN={1937-4208},\n month={Dec},}\n\n The emerging voltage source converters (VSCs) such as hybrid cascaded multilevel converters (HCMCs) are promising converter technologies which enable higher converter efficiency, compactness, and DC fault resilience for high voltage direct current (HVDC) transmission. However, the large number of switching events due to the converters' submodules introduces a heavy computational burden for electromagnetic transient (EMT) simulations. Efficient and accurate EMT-type converter models play a vital role in the control and design of HVDC converters. Several computationally efficient models for the HCMCs are proposed in this paper, including the detailed equivalent model (DEM) and several average value models (AVMs) of varying accuracy. Additionally, a combined model is proposed which allows the users to switch among the DEM and AVMs during dynamic simulations. The proposed models are validated against the DEM for dynamic transients. The simulation results demonstrate good modeling accuracy of the proposed models. The AVMs are also shown to significantly improve simulation efficiency compared to the DEM, which is very desirable especially for HCMCs with a large number of submodules.\n
\n\n\n\n \n\n \n \n Dey, A., Shafiei, N., Khandekar, R., Eberle, W., & Li, R.\n\n\n \n \n \n \n Improving Thermal Performance of High Frequency Power Transformers using Bobbinless Transformer Design.\n \n \n \n\n\n \n\n\n\n In 2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm), pages 291-297, July 2020. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{9190320,\n author={Dey, Anshuman and Shafiei, Navid and Khandekar, Rahul and Eberle, Wilson and Li, Ri},\n booktitle={2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)}, \n title={Improving Thermal Performance of High Frequency Power Transformers using Bobbinless Transformer Design}, \n year={2020},\n volume={},\n number={},\n pages={291-297},\n abstract={Power transformer windings in most Switch Mode Power Supplies (SMPS) are conventionally wound around a plastic bobbin. Bobbins are support structures for the windings and provide electrical insulation between the winding and core. They are generally made from plastics like Polytetrafluoroethylene (PTFE), characteristic of low thermal conductivity (k~0.25 W/mK). Hence, using a bobbin creates a large thermal resistance between the windings and the core. The present paper investigates the benefit of removing the bobbin on the thermal performance of a 3.3kW power transformer fabricated on a PQ4040 core. The modelling is carried out through coupled 3D multiphysics Finite Element Analysis (FEA). First, the electromagnetic model accurately evaluates the spatial distribution of core losses for given operating conditions (core material, frequency, primary voltage and current, etc.) and the evaluated core losses are coupled to the thermal model. The winding losses are also evaluated. Next, the thermal model predicts the temperature distribution in the power transformer based on the loss inputs from the electromagnetic simulation as well as the material and geometrical properties of the transformer. The thermal model accounts for all modes of heat transfer. Further, feedback is established between the electromagnetic and thermal model to account for changes in temperature dependent electromagnetic properties. The evaluated thermal performance of the bobbin and bobbinless transformers are then compared. The FEA result shows that bobbinless transformers have lower hot spot temperatures as compared to transformers with bobbins. Further, bobbinless transformers have a smaller temperature difference between windings and core (Twinding - Tcore) as compared to transformers with bobbins, indicating lower thermal resistance between winding and core. Finally, the findings are experimentally validated on a 3.3kW SMPS platform with thermocouple measurements and Infrared (IR) Thermography. Bobbinless transformers are shown to be low cost and thermally superior alternatives to their conventional counterparts.},\n keywords={Power transformer insulation;Windings;Transformer cores;Thermal conductivity;Conductivity;Temperature;Thermal Management;Power Transformer;Multiphysics Modeling;Finite Element Analysis},\n doi={10.1109/ITherm45881.2020.9190320},\n ISSN={2577-0799},\n month={July},}\n\n Power transformer windings in most Switch Mode Power Supplies (SMPS) are conventionally wound around a plastic bobbin. Bobbins are support structures for the windings and provide electrical insulation between the winding and core. They are generally made from plastics like Polytetrafluoroethylene (PTFE), characteristic of low thermal conductivity (k 0.25 W/mK). Hence, using a bobbin creates a large thermal resistance between the windings and the core. The present paper investigates the benefit of removing the bobbin on the thermal performance of a 3.3kW power transformer fabricated on a PQ4040 core. The modelling is carried out through coupled 3D multiphysics Finite Element Analysis (FEA). First, the electromagnetic model accurately evaluates the spatial distribution of core losses for given operating conditions (core material, frequency, primary voltage and current, etc.) and the evaluated core losses are coupled to the thermal model. The winding losses are also evaluated. Next, the thermal model predicts the temperature distribution in the power transformer based on the loss inputs from the electromagnetic simulation as well as the material and geometrical properties of the transformer. The thermal model accounts for all modes of heat transfer. Further, feedback is established between the electromagnetic and thermal model to account for changes in temperature dependent electromagnetic properties. The evaluated thermal performance of the bobbin and bobbinless transformers are then compared. The FEA result shows that bobbinless transformers have lower hot spot temperatures as compared to transformers with bobbins. Further, bobbinless transformers have a smaller temperature difference between windings and core (Twinding - Tcore) as compared to transformers with bobbins, indicating lower thermal resistance between winding and core. Finally, the findings are experimentally validated on a 3.3kW SMPS platform with thermocouple measurements and Infrared (IR) Thermography. Bobbinless transformers are shown to be low cost and thermally superior alternatives to their conventional counterparts.\n
\n\n\n\n \n\n \n \n Zhao, B., Li, H., Wang, L., Liu, J., & Liu, X.\n\n\n \n \n \n \n A New Modular XRAM-Like Inductive High- Current Pulse Generator Circuit Topology.\n \n \n \n\n\n \n\n\n\n IEEE Access, 8: 210158-210166. 2020.\n \n\n\n\n
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\n\n\n@ARTICLE{9261417,\n author={Zhao, Bo and Li, Haitao and Wang, Liwei and Liu, Jian and Liu, Xiaohui},\n journal={IEEE Access}, \n title={A New Modular XRAM-Like Inductive High- Current Pulse Generator Circuit Topology}, \n year={2020},\n volume={8},\n number={},\n pages={210158-210166},\n abstract={XRAM (MARX spelt back words) is currently a very important circuit for high current pulse generators. In our previous studies, an XRAM-like circuit was proposed based on multiple pulse transformer modules and a capacitor connected in parallel. Compared with the traditional XRAM circuit, the same number of inductive energy storage modules can be used to generate higher current pulses. This circuit is also capable to recover the residual energy and generate repetitive high-current pulses. However, this circuit topology requires more power electronic switches (three IGBT switches per pulse transformer module). In order to reduce the number of switches, by adding two IGBT switches in the capacitor module, a new modular XRAM-like circuit with reduced switches (one IGBT switch per pulse transformer module) is proposed in this paper. The change of the circuit topology makes the capacitor discharge the primary inductors of the pulse transformer in series during the residual energy recovery stage, instead of the parallel discharge in the previous circuit. This requires the closing time of the IGBT switch in each pulse transformer module ahead of the discharge start time of the capacitor. Working process of the proposed circuit was described in detail and simulations of a 12-module circuit were carried out to verify the circuit operation. Finally, the preliminary experimental results of a two-module laboratory prototype are presented. The results confirm the theoretical analysis and show the validity of the converter scheme.},\n keywords={Insulated gate bipolar transistors;Pulse generation;Circuit topology;Capacitors;Switches;Discharges (electric);Pulse transformers;Pulsed power supplies;pulse circuits;electromagnetic launching;power semiconductor switches;pulse transformers},\n doi={10.1109/ACCESS.2020.3038451},\n ISSN={2169-3536},\n month={},}\n\n XRAM (MARX spelt back words) is currently a very important circuit for high current pulse generators. In our previous studies, an XRAM-like circuit was proposed based on multiple pulse transformer modules and a capacitor connected in parallel. Compared with the traditional XRAM circuit, the same number of inductive energy storage modules can be used to generate higher current pulses. This circuit is also capable to recover the residual energy and generate repetitive high-current pulses. However, this circuit topology requires more power electronic switches (three IGBT switches per pulse transformer module). In order to reduce the number of switches, by adding two IGBT switches in the capacitor module, a new modular XRAM-like circuit with reduced switches (one IGBT switch per pulse transformer module) is proposed in this paper. The change of the circuit topology makes the capacitor discharge the primary inductors of the pulse transformer in series during the residual energy recovery stage, instead of the parallel discharge in the previous circuit. This requires the closing time of the IGBT switch in each pulse transformer module ahead of the discharge start time of the capacitor. Working process of the proposed circuit was described in detail and simulations of a 12-module circuit were carried out to verify the circuit operation. Finally, the preliminary experimental results of a two-module laboratory prototype are presented. The results confirm the theoretical analysis and show the validity of the converter scheme.\n
\n\n\n\n \n\n \n \n Bieber, L., Wang, L., Jatskevich, J., & Li, W.\n\n\n \n \n \n \n A Quantitative Analysis of Energy Storage Requirements for the Hybrid Cascaded Multilevel Converters.\n \n \n \n\n\n \n\n\n\n In 2020 IEEE 21st Workshop on Control and Modeling for Power Electronics (COMPEL), pages 1-7, Nov 2020. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{9265647,\n author={Bieber, Levi and Wang, Liwei and Jatskevich, Juri and Li, Wei},\n booktitle={2020 IEEE 21st Workshop on Control and Modeling for Power Electronics (COMPEL)}, \n title={A Quantitative Analysis of Energy Storage Requirements for the Hybrid Cascaded Multilevel Converters}, \n year={2020},\n volume={},\n number={},\n pages={1-7},\n abstract={With an ever-increasing need for reducing the converter size in voltage source converter high voltage direct current (VSC-HVDC) systems, special attention is put towards converters with a low energy storage requirement, as energy storage is a predictor of the overall converter size. The modular multilevel converter (MMC) technology has the benefit of efficient AC/DC conversion; however, for many cases, it re-quires a large converter footprint, due to the excessive quantity of energy storage (i.e., capacitors) needed. Recently, hybrid cascaded multilevel converters (HCMCs) have been proposed, which are a combination of the simpler two- and three-level converters and cascaded full-bridge sub-modules (FBSMs), and are expected to have a lower converter footprint, due to fewer sub-modules (SMs) than the MMC. However, the degree to which the HCMCs have an improved footprint has yet to be verified. This paper puts forth a method for determination of the total amount of energy that the hybrid two-level converter (H2LC) and the hybrid three-level converter (H3LC) require. The results show that both the H2LC and the H3LC have an improved footprint compared to the conventional MMC.},\n keywords={Capacitors;Energy storage;Reactive power;Multilevel converters;Topology;Harmonic analysis;Capacitance;Energy storage;Hybrid converters;MMC;HVDC;Power conversion},\n doi={10.1109/COMPEL49091.2020.9265647},\n ISSN={1093-5142},\n month={Nov},}\n\n With an ever-increasing need for reducing the converter size in voltage source converter high voltage direct current (VSC-HVDC) systems, special attention is put towards converters with a low energy storage requirement, as energy storage is a predictor of the overall converter size. The modular multilevel converter (MMC) technology has the benefit of efficient AC/DC conversion; however, for many cases, it re-quires a large converter footprint, due to the excessive quantity of energy storage (i.e., capacitors) needed. Recently, hybrid cascaded multilevel converters (HCMCs) have been proposed, which are a combination of the simpler two- and three-level converters and cascaded full-bridge sub-modules (FBSMs), and are expected to have a lower converter footprint, due to fewer sub-modules (SMs) than the MMC. However, the degree to which the HCMCs have an improved footprint has yet to be verified. This paper puts forth a method for determination of the total amount of energy that the hybrid two-level converter (H2LC) and the hybrid three-level converter (H3LC) require. The results show that both the H2LC and the H3LC have an improved footprint compared to the conventional MMC.\n
\n\n\n\n \n\n \n \n Amiri, P., Gautam, D., Botting, C., Eberle, W., & Wang, L.\n\n\n \n \n \n \n Real-Time Hardware-in-the-Loop Simulation and Control of Totem Pole PFC Converter.\n \n \n \n\n\n \n\n\n\n In 2020 IEEE 21st Workshop on Control and Modeling for Power Electronics (COMPEL), pages 1-7, Nov 2020. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{9265648,\n author={Amiri, Peyman and Gautam, Deepak and Botting, Chris and Eberle, Wilson and Wang, Liwei},\n booktitle={2020 IEEE 21st Workshop on Control and Modeling for Power Electronics (COMPEL)}, \n title={Real-Time Hardware-in-the-Loop Simulation and Control of Totem Pole PFC Converter}, \n year={2020},\n volume={},\n number={},\n pages={1-7},\n abstract={High efficiency totem pole power factor correction (PFC) converters have attracted a significant attention in recent years. State of the art wide band gap (WBG) devices make continuous conduction mode (CCM) totem pole PFC feasible for medium to high power applications. However, higher costs and complex control are the main barriers to widespread industrial adoption of this topology. Control challenges including current spikes during zero crossings, DC component in AC mains current and AC voltage drop handling are investigated in this paper. Appropriate control measures are utilized to address these challenges. Additionally an accurate low cost DC current reduction method is proposed. The effectiveness of the proposed control is verified through real-time hardware-in-the-loop simulation of a 1450 W interleaved totem pole PFC converter.},\n keywords={Voltage control;Gallium nitride;Switches;Inductors;Pulse width modulation;Current control;Voltage measurement;Real-Time;Hardware-in-the-Loop;Simulation;Control;AC-DC Power Conversion;Power Factor Correction;Totem Pole},\n doi={10.1109/COMPEL49091.2020.9265648},\n ISSN={1093-5142},\n month={Nov},}\n\n High efficiency totem pole power factor correction (PFC) converters have attracted a significant attention in recent years. State of the art wide band gap (WBG) devices make continuous conduction mode (CCM) totem pole PFC feasible for medium to high power applications. However, higher costs and complex control are the main barriers to widespread industrial adoption of this topology. Control challenges including current spikes during zero crossings, DC component in AC mains current and AC voltage drop handling are investigated in this paper. Appropriate control measures are utilized to address these challenges. Additionally an accurate low cost DC current reduction method is proposed. The effectiveness of the proposed control is verified through real-time hardware-in-the-loop simulation of a 1450 W interleaved totem pole PFC converter.\n
\n\n\n\n \n\n \n \n Han, J., Bieber, L., Wang, L., & Li, W.\n\n\n \n \n \n \n Capacitor Voltage Balancing Control Strategies for Hybrid Cascaded Multilevel Converters.\n \n \n \n\n\n \n\n\n\n In 2020 IEEE Power & Energy Society General Meeting (PESGM), pages 1-5, Aug 2020. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{9282081,\n author={Han, Jintao and Bieber, Levi and Wang, Liwei and Li, Wei},\n booktitle={2020 IEEE Power & Energy Society General Meeting (PESGM)}, \n title={Capacitor Voltage Balancing Control Strategies for Hybrid Cascaded Multilevel Converters}, \n year={2020},\n volume={},\n number={},\n pages={1-5},\n abstract={The hybrid cascaded multilevel converter (HCMC) high voltage direct current (HVDC) transmission system offers smaller foot-print and DC-side pole-to-pole fault blocking capability compared to the commonly used modular multilevel converter (MMC) based HVDC systems. One of the technical challenges associated with the control system of the HCMC is to control the submodule capacitor voltage ripples without significantly increasing the submodule switching frequency. Various efforts have been dedicated to developing the capacitor voltages sorting methods for the conventional MMC. However, the use of full-bridge submodule in the HCMC requires advanced voltage balancing control (VBC) schemes for proper operations during steady-state and dynamic transients. This paper proposes a new scheme to control submodule capacitor voltage ripples and enable low submodule switching frequency of the HCMC. The performance of the proposed VBC strategy is validated using dynamic simulation of 1GW HCMC-HVDC system. The simulation results demonstrate the improvement of the new approach over the conventional VBC approaches.},\n keywords={Multilevel converters;Switching frequency;HVDC transmission;Capacitors;Control systems;Voltage control;Sorting;Hybrid cascaded multilevel converter;high voltage direct current system;capacitor voltages ripple;voltage balancing control},\n doi={10.1109/PESGM41954.2020.9282081},\n ISSN={1944-9933},\n month={Aug},}\n\n The hybrid cascaded multilevel converter (HCMC) high voltage direct current (HVDC) transmission system offers smaller foot-print and DC-side pole-to-pole fault blocking capability compared to the commonly used modular multilevel converter (MMC) based HVDC systems. One of the technical challenges associated with the control system of the HCMC is to control the submodule capacitor voltage ripples without significantly increasing the submodule switching frequency. Various efforts have been dedicated to developing the capacitor voltages sorting methods for the conventional MMC. However, the use of full-bridge submodule in the HCMC requires advanced voltage balancing control (VBC) schemes for proper operations during steady-state and dynamic transients. This paper proposes a new scheme to control submodule capacitor voltage ripples and enable low submodule switching frequency of the HCMC. The performance of the proposed VBC strategy is validated using dynamic simulation of 1GW HCMC-HVDC system. The simulation results demonstrate the improvement of the new approach over the conventional VBC approaches.\n
\n\n\n\n \n\n \n \n Karaagac, U., Mahseredjian, J., Gagnon, R., Gras, H., Saad, H., Cai, L., Kocar, I., Haddadi, A., Farantatos, E., Bu, S., Chan, K., & Wang, L.\n\n\n \n \n \n \n A Generic EMT-Type Model for Wind Parks With Permanent Magnet Synchronous Generator Full Size Converter Wind Turbines.\n \n \n \n\n\n \n\n\n\n In 2020 IEEE Power & Energy Society General Meeting (PESGM), pages 1-1, Aug 2020. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{9282154,\n author={Karaagac, Ulas and Mahseredjian, Jean and Gagnon, Richard and Gras, Henry and Saad, Hani and Cai, Lijun and Kocar, Ilhan and Haddadi, Aboutaleb and Farantatos, Evangelos and Bu, Siqi and Chan, Kevin and Wang, Liwei},\n booktitle={2020 IEEE Power & Energy Society General Meeting (PESGM)}, \n title={A Generic EMT-Type Model for Wind Parks With Permanent Magnet Synchronous Generator Full Size Converter Wind Turbines}, \n year={2020},\n volume={},\n number={},\n pages={1-1},\n abstract={Utilities are under considerable pressure to increase the share of wind energy resources in their generation fleet. With the increasing share of wind energy resources, the dynamic behavior of power systems will change considerably due to fundamental differences in technologies used for wind and conventional generators. There is very little standardization in the ways to model wind turbines (WTs) and wind parks (WPs) in sharp contrast to conventional power plants. Hence, there is an international interest to deliver generic models (i.e. standardized and publicly available) for WTs and WPs that are able to capture all performance aspects as good as manufacturer-specific models.},\n keywords={Wind energy generation;Wind;Wind energy;Power system dynamics;Wind power generation;Synchronous generators;Wind turbines},\n doi={10.1109/PESGM41954.2020.9282154},\n ISSN={1944-9933},\n month={Aug},}\n\n Utilities are under considerable pressure to increase the share of wind energy resources in their generation fleet. With the increasing share of wind energy resources, the dynamic behavior of power systems will change considerably due to fundamental differences in technologies used for wind and conventional generators. There is very little standardization in the ways to model wind turbines (WTs) and wind parks (WPs) in sharp contrast to conventional power plants. Hence, there is an international interest to deliver generic models (i.e. standardized and publicly available) for WTs and WPs that are able to capture all performance aspects as good as manufacturer-specific models.\n
\n\n\n\n \n\n \n \n Nowak, S., Chen, Y. C., & Wang, L.\n\n\n \n \n \n \n A Measurement-based Gradient-descent Method to Optimally Dispatch DER Reactive Power.\n \n \n \n\n\n \n\n\n\n In 2020 47th IEEE Photovoltaic Specialists Conference (PVSC), pages 0028-0032, June 2020. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{9300358,\n author={Nowak, Severin and Chen, Yu Christine and Wang, Liwei},\n booktitle={2020 47th IEEE Photovoltaic Specialists Conference (PVSC)}, \n title={A Measurement-based Gradient-descent Method to Optimally Dispatch DER Reactive Power}, \n year={2020},\n volume={},\n number={},\n pages={0028-0032},\n abstract={This paper proposes a measurement-based method to dispatch DER reactive-power output with the objective of minimizing distribution network loss and cost of DER reactive power. Central to the proposed method is the estimation of network loss and voltage sensitivities with respect to individual DER reactive-power output from synchronized power-injection data collected from distribution-level phasor measurement units. The estimated sensitivities are embedded within gradient-descent iterations that converge to DER reactive-power setpoints corresponding to the optimal operating point. The proposed method respects typical constraints on DER reactive-power outputs and bus voltage magnitudes. Numerical simulations involving the IEEE 33-bus distribution test system demonstrate that the proposed measurement-based method yields sufficiently accurate reactive-power setpoints compared to those obtained from a model-based benchmark solution to minimize network loss while regulating bus voltages.},\n keywords={Loss measurement;Voltage measurement;Sensitivity;Power measurement;Voltage control;Linear programming;Computational modeling},\n doi={10.1109/PVSC45281.2020.9300358},\n ISSN={0160-8371},\n month={June},}\n\n This paper proposes a measurement-based method to dispatch DER reactive-power output with the objective of minimizing distribution network loss and cost of DER reactive power. Central to the proposed method is the estimation of network loss and voltage sensitivities with respect to individual DER reactive-power output from synchronized power-injection data collected from distribution-level phasor measurement units. The estimated sensitivities are embedded within gradient-descent iterations that converge to DER reactive-power setpoints corresponding to the optimal operating point. The proposed method respects typical constraints on DER reactive-power outputs and bus voltage magnitudes. Numerical simulations involving the IEEE 33-bus distribution test system demonstrate that the proposed measurement-based method yields sufficiently accurate reactive-power setpoints compared to those obtained from a model-based benchmark solution to minimize network loss while regulating bus voltages.\n
\n\n\n\n \n\n \n \n Monteiro, M. R, Rodrigues, Y. R, Abdelaziz, M., de Souza, A. Z., & Wang, L.\n\n\n \n \n \n \n New technique for area-based voltage stability support using flexible resources.\n \n \n \n\n\n \n\n\n\n Electric Power Systems Research, 186: 106384. 2020.\n \n\n\n\n
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\n\n\n\n@article{monteiro2020new,\n title={New technique for area-based voltage stability support using flexible resources},\n author={Monteiro, Maira R and Rodrigues, Yuri R and Abdelaziz, Morad and de Souza, AC Zambroni and Wang, Liwei},\n journal={Electric Power Systems Research},\n volume={186},\n pages={106384},\n year={2020},\n publisher={Elsevier}\n}\n\n\n\n \n\n \n \n Rodrigues, Y., Monteiro, M., Abdelaziz, M., Wang, L., De Souza, A. Z, & Ribeiro, P.\n\n\n \n \n \n \n Improving the autonomy of islanded microgrids through frequency regulation.\n \n \n \n\n\n \n\n\n\n International Journal of Electrical Power & Energy Systems, 115: 105499. 2020.\n \n\n\n\n
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\n\n\n\n@article{rodrigues2020improving,\n title={Improving the autonomy of islanded microgrids through frequency regulation},\n author={Rodrigues, Yuri and Monteiro, Ma{\\'\\i}ra and Abdelaziz, Morad and Wang, Liwei and De Souza, Antonio Z and Ribeiro, Paulo},\n journal={International Journal of Electrical Power \\& Energy Systems},\n volume={115},\n pages={105499},\n year={2020},\n publisher={Elsevier}\n}\n\n\n\n \n\n \n \n Nowak, S., Wang, L., & Metcalfe, M. S\n\n\n \n \n \n \n Two-level centralized and local voltage control in distribution systems mitigating effects of highly intermittent renewable generation.\n \n \n \n\n\n \n\n\n\n International Journal of Electrical Power & Energy Systems, 119: 105858. 2020.\n \n\n\n\n
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\n\n\n\n@article{nowak2020two,\n title={Two-level centralized and local voltage control in distribution systems mitigating effects of highly intermittent renewable generation},\n author={Nowak, Severin and Wang, Liwei and Metcalfe, Malcolm S},\n journal={International Journal of Electrical Power \\& Energy Systems},\n volume={119},\n pages={105858},\n year={2020},\n publisher={Elsevier}\n}\n\n\n
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\n \n \n\n \n \n Arshadi, S. A., Ordonez, M., Eberle, W., Saket, M. A., Craciun, M., & Botting, C.\n\n\n \n \n \n \n Unbalanced Three-Phase $LLC$ Resonant Converters: Analysis and Trigonometric Current Balancing.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Electronics, 34(3): 2025-2038. March 2019.\n \n\n\n\n
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\n\n\n@ARTICLE{8379448,\n author={Arshadi, Sayed Abbas and Ordonez, Martin and Eberle, Wilson and Saket, Mohammad Ali and Craciun, Marian and Botting, Chris},\n journal={IEEE Transactions on Power Electronics}, \n title={Unbalanced Three-Phase $LLC$ Resonant Converters: Analysis and Trigonometric Current Balancing}, \n year={2019},\n volume={34},\n number={3},\n pages={2025-2038},\n abstract={Three-phase LLC resonant converters can handle very high power levels beyond the capabilities of half-bridge and full-bridge LLC topologies. Among other characteristics, three-phase LLC structures reduce output current ripple (small output filter), enable parallel power processing (low peak current), and provide good thermal distribution. However, all these key advantages can be severely compromised due to passive components tolerances, leading to undesired current balance issues in three-phase LLC resonant converters. Tolerances in resonant tank passive components are inevitable and lead to unequal peak currents between phases, uneven temperature distribution, and large output current ripple. This paper investigates the imbalances in three-phase LLC converters and proposes a novel trigonometric current balancing (TCB) technique using phasor analysis. In this strategy, the required input voltage phase angles are calculated to achieve balanced phase currents, even under severe unbalanced conditions. In some cases, the output filter current ripple is reduced to less than half. The methodology is verified with a 3-kW experimental prototype, which validates the analytical framework and effectiveness of TCB.},\n keywords={Resonant converters;Mathematical model;Equivalent circuits;Resonant frequency;RLC circuits;Frequency conversion;Integrated circuit modeling;Current sharing;interleaved resonant converter;three-phase $LLC$ ;trigonometric current balancing (TCB)},\n doi={10.1109/TPEL.2018.2846526},\n ISSN={1941-0107},\n month={March},}\n\n\n Three-phase LLC resonant converters can handle very high power levels beyond the capabilities of half-bridge and full-bridge LLC topologies. Among other characteristics, three-phase LLC structures reduce output current ripple (small output filter), enable parallel power processing (low peak current), and provide good thermal distribution. However, all these key advantages can be severely compromised due to passive components tolerances, leading to undesired current balance issues in three-phase LLC resonant converters. Tolerances in resonant tank passive components are inevitable and lead to unequal peak currents between phases, uneven temperature distribution, and large output current ripple. This paper investigates the imbalances in three-phase LLC converters and proposes a novel trigonometric current balancing (TCB) technique using phasor analysis. In this strategy, the required input voltage phase angles are calculated to achieve balanced phase currents, even under severe unbalanced conditions. In some cases, the output filter current ripple is reduced to less than half. The methodology is verified with a 3-kW experimental prototype, which validates the analytical framework and effectiveness of TCB.\n
\n\n\n\n \n\n \n \n Hafezinasab, H., Eberle, W., Gautam, D. S., & Botting, C.\n\n\n \n \n \n \n Universal Input AC Three-Phase Power Factor Correction With Adaptive Intermediate Bus Voltage to Optimize Efficiency.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Industry Applications, 55(2): 1698-1707. March 2019.\n \n\n\n\n
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\n\n\n@ARTICLE{8523805,\n author={Hafezinasab, Hamidreza and Eberle, Wilson and Gautam, Deepak S. and Botting, Chris},\n journal={IEEE Transactions on Industry Applications}, \n title={Universal Input AC Three-Phase Power Factor Correction With Adaptive Intermediate Bus Voltage to Optimize Efficiency}, \n year={2019},\n volume={55},\n number={2},\n pages={1698-1707},\n abstract={This paper proposes an adaptive intermediate bus voltage solution to optimize efficiency in a universal three-phase ac input (200-480 V) cascaded buck-follows-boost power factor corrected (PFC) converter with a 400-V dc output voltage. With this application and architecture, the output voltage of the boost converter needs to be higher than the peak ac input voltage to maintain PFC and regulation. The conventional approach would regulate the intermediate bus voltage to near 800-V dc; this allows for 480-V ac high line input, plus allowable overvoltage tolerance and margin for regulation, but it incurs heavy losses at low line input. This paper proposes to adaptively change the bus voltage between the boost and buck stages, based on the value of the ac input voltage, and the use of a relay to bypass the buck stage for low ac line input conditions in order to maximize efficiency. A loss analysis is included to show the significant loss savings and efficiency improvement using the proposed method. Experimental results are presented for a 5-kW silicon-carbide-based prototype. The proposed method demonstrates up to a 4.4 percentage point increase in efficiency (220-W decrease in loss) at low ac line input compared to the conventional PFC approach with an 800-V dc intermediate bus voltage.},\n keywords={Voltage control;Relays;Silicon carbide;Inductors;Stress;Topology;Reliability;400-V dc bus;dc bus optimization;intermediate bus voltage optimization;silicon carbide (SiC);three-phase boost–buck;universal input three-phase power factor corrected (PFC)},\n doi={10.1109/TIA.2018.2879790},\n ISSN={1939-9367},\n month={March},}\n\n This paper proposes an adaptive intermediate bus voltage solution to optimize efficiency in a universal three-phase ac input (200-480 V) cascaded buck-follows-boost power factor corrected (PFC) converter with a 400-V dc output voltage. With this application and architecture, the output voltage of the boost converter needs to be higher than the peak ac input voltage to maintain PFC and regulation. The conventional approach would regulate the intermediate bus voltage to near 800-V dc; this allows for 480-V ac high line input, plus allowable overvoltage tolerance and margin for regulation, but it incurs heavy losses at low line input. This paper proposes to adaptively change the bus voltage between the boost and buck stages, based on the value of the ac input voltage, and the use of a relay to bypass the buck stage for low ac line input conditions in order to maximize efficiency. A loss analysis is included to show the significant loss savings and efficiency improvement using the proposed method. Experimental results are presented for a 5-kW silicon-carbide-based prototype. The proposed method demonstrates up to a 4.4 percentage point increase in efficiency (220-W decrease in loss) at low ac line input compared to the conventional PFC approach with an 800-V dc intermediate bus voltage.\n
\n\n\n\n \n\n \n \n Ebrahimi, S., Amiri, N., Wang, L., & Jatskevich, J.\n\n\n \n \n \n \n Parametric Average-Value Modeling of Thyristor-Controlled Rectifiers With Internal Faults and Asymmetrical Operation.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Delivery, 34(2): 773-776. April 2019.\n \n\n\n\n
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\n\n\n@ARTICLE{8528507,\n author={Ebrahimi, Seyyedmilad and Amiri, Navid and Wang, Liwei and Jatskevich, Juri},\n journal={IEEE Transactions on Power Delivery}, \n title={Parametric Average-Value Modeling of Thyristor-Controlled Rectifiers With Internal Faults and Asymmetrical Operation}, \n year={2019},\n volume={34},\n number={2},\n pages={773-776},\n abstract={Recently, a parametric average-value model (PAVM) has been presented for diode rectifiers with internal faults, which considers their asymmetrical operation by including the ac-side harmonics in both positive and negative sequences. In this letter, the PAVM methodology is extended and generalized for thyristor-controlled rectifiers with faults. The presented PAVM considers the firing angle of thyristors in its formulation. Using extensive computer studies, the proposed PAVM is verified to reconstruct the detailed model results even under dynamics of thyristor firing angle control under faulty conditions, while providing faster and more efficient simulations compared with the detailed model.},\n keywords={Rectifiers;Thyristors;Computational modeling;Firing;Harmonic analysis;Power harmonic filters;Load modeling;Asymmetric;average-value modeling;fault;non-characteristic harmonic;thyristor-controlled rectifier},\n doi={10.1109/TPWRD.2018.2880616},\n ISSN={1937-4208},\n month={April},}\n\n Recently, a parametric average-value model (PAVM) has been presented for diode rectifiers with internal faults, which considers their asymmetrical operation by including the ac-side harmonics in both positive and negative sequences. In this letter, the PAVM methodology is extended and generalized for thyristor-controlled rectifiers with faults. The presented PAVM considers the firing angle of thyristors in its formulation. Using extensive computer studies, the proposed PAVM is verified to reconstruct the detailed model results even under dynamics of thyristor firing angle control under faulty conditions, while providing faster and more efficient simulations compared with the detailed model.\n
\n\n\n\n \n\n \n \n Rupasinghe, J., Filizadeh, S., & Wang, L.\n\n\n \n \n \n \n A Dynamic Phasor Model of an MMC With Extended Frequency Range for EMT Simulations.\n \n \n \n\n\n \n\n\n\n IEEE Journal of Emerging and Selected Topics in Power Electronics, 7(1): 30-40. March 2019.\n \n\n\n\n
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\n\n\n@ARTICLE{8576580,\n author={Rupasinghe, Janesh and Filizadeh, Shaahin and Wang, Liwei},\n journal={IEEE Journal of Emerging and Selected Topics in Power Electronics}, \n title={A Dynamic Phasor Model of an MMC With Extended Frequency Range for EMT Simulations}, \n year={2019},\n volume={7},\n number={1},\n pages={30-40},\n abstract={This paper presents a new dynamic phasor (DP) model of a modular multilevel converter (MMC) with extended frequency range for direct interfacing to an electromagnetic transient (EMT) simulator. The internal dynamics of the MMC are modeled considering dominant harmonic components of each variable. To model the external dynamics of the converter, a novel construct referred to as a base-frequency DP is employed, which allows to capture and model any number of frequency components of external variables without a significant increase in computational burden. The proposed model is validated against detailed EMT models by comparing its results for an inverter system, a back-to-back high-voltage direct current system, and a 12-bus power system built in PSCAD/EMTDC simulator. Simulation results prove that the new model is significantly more computationally efficient than existing models and is capable of maintaining a high level of accuracy. Experimental verification on a scaled-down laboratory setup is also included.},\n keywords={Computational modeling;Harmonic analysis;Capacitors;Power system dynamics;Switches;Modulation;Transient analysis;Base-frequency dynamic phasor (BFDP);electromagnetic transient (EMT) simulation;modular multilevel converters (MMCs)},\n doi={10.1109/JESTPE.2018.2886698},\n ISSN={2168-6785},\n month={March},}\n\n This paper presents a new dynamic phasor (DP) model of a modular multilevel converter (MMC) with extended frequency range for direct interfacing to an electromagnetic transient (EMT) simulator. The internal dynamics of the MMC are modeled considering dominant harmonic components of each variable. To model the external dynamics of the converter, a novel construct referred to as a base-frequency DP is employed, which allows to capture and model any number of frequency components of external variables without a significant increase in computational burden. The proposed model is validated against detailed EMT models by comparing its results for an inverter system, a back-to-back high-voltage direct current system, and a 12-bus power system built in PSCAD/EMTDC simulator. Simulation results prove that the new model is significantly more computationally efficient than existing models and is capable of maintaining a high level of accuracy. Experimental verification on a scaled-down laboratory setup is also included.\n
\n\n\n\n \n\n \n \n Toulabi, M. S., Wang, L., Bieber, L., Filizadeh, S., & Jatskevich, J.\n\n\n \n \n \n \n A Universal High-Frequency Induction Machine Model and Characterization Method for Arbitrary Stator Winding Connections.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Energy Conversion, 34(3): 1164-1177. Sep. 2019.\n \n\n\n\n
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\n\n\n@ARTICLE{8606154,\n author={Toulabi, Mohammad Sedigh and Wang, Liwei and Bieber, Levi and Filizadeh, Shaahin and Jatskevich, Juri},\n journal={IEEE Transactions on Energy Conversion}, \n title={A Universal High-Frequency Induction Machine Model and Characterization Method for Arbitrary Stator Winding Connections}, \n year={2019},\n volume={34},\n number={3},\n pages={1164-1177},\n abstract={High-frequency modeling of induction machines plays an important role in investigating motor drive electromagnetic interference issues such as stator winding reflected-wave overvoltage and bearing discharging current. Characterization of high-frequency machine models requires measurements of machine's differential-mode (DM) and common-mode (CM) impedances up to tens of MHz. The machine's stator winding connections, e.g., single-, and series-, parallel-winding Y/Δ configurations, influence the measured DM and CM impedances and model parameters. In this paper, a universal high-frequency equivalent circuit model capable of representing induction machines with arbitrary stator winding connections is proposed. The new model features a simple structure with a straightforward characterization method. Specifically, only one stator winding configuration is required for impedance measurements to fully characterize the machine model for arbitrary stator winding connections. The proposed methodology is demonstrated using a 7.5 hp dual-voltage nine-terminal/lead induction machine and a drive system. The simulated DM and CM impedances as well as the motor overvoltages show excellent agreement with the experimental results. The proposed model and characterization method represent significant improvement in terms of accuracy, applicability/generality, and convenience compared to prior conventional models.},\n keywords={Windings;Integrated circuit modeling;Stator windings;Equivalent circuits;Impedance measurement;Induction motors;Impedance;Common-mode (CM) impedance;differential-mode (DM) impedance;Δ-winding connection;high-frequency modeling;induction machine modeling;Y-winding connection},\n doi={10.1109/TEC.2019.2891349},\n ISSN={1558-0059},\n month={Sep.},}\n\n High-frequency modeling of induction machines plays an important role in investigating motor drive electromagnetic interference issues such as stator winding reflected-wave overvoltage and bearing discharging current. Characterization of high-frequency machine models requires measurements of machine's differential-mode (DM) and common-mode (CM) impedances up to tens of MHz. The machine's stator winding connections, e.g., single-, and series-, parallel-winding Y/Δ configurations, influence the measured DM and CM impedances and model parameters. In this paper, a universal high-frequency equivalent circuit model capable of representing induction machines with arbitrary stator winding connections is proposed. The new model features a simple structure with a straightforward characterization method. Specifically, only one stator winding configuration is required for impedance measurements to fully characterize the machine model for arbitrary stator winding connections. The proposed methodology is demonstrated using a 7.5 hp dual-voltage nine-terminal/lead induction machine and a drive system. The simulated DM and CM impedances as well as the motor overvoltages show excellent agreement with the experimental results. The proposed model and characterization method represent significant improvement in terms of accuracy, applicability/generality, and convenience compared to prior conventional models.\n
\n\n\n\n \n\n \n \n Hsu, J., Ordonez, M., Eberle, W., Craciun, M., & Botting, C.\n\n\n \n \n \n \n LLC Synchronous Rectification Using Resonant Capacitor Voltage.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Electronics, 34(11): 10970-10987. Nov 2019.\n \n\n\n\n
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\n\n\n@ARTICLE{8645703,\n author={Hsu, Jhih-Da and Ordonez, Martin and Eberle, Wilson and Craciun, Marian and Botting, Chris},\n journal={IEEE Transactions on Power Electronics}, \n title={LLC Synchronous Rectification Using Resonant Capacitor Voltage}, \n year={2019},\n volume={34},\n number={11},\n pages={10970-10987},\n abstract={Synchronous rectification (SR) for LLC resonant converters has been developed to enhance the power conversion efficiency and achieve high-power-density design. Conventional SR driving strategies can be categorized as current-driven methods, VDS-ON sensing methods, and alternative approaches. The current driven methods widely adopt current transformers (CTs) to sense the rectifier current and generate the SR driving signals. The CTs are lossy and bulky, which is unfavorable to high-power-density design. The VDS-ON sensing methods remove the current sensors by sensing the voltage across the ON-state resistor of the SR MOSFET, yet the sensed signal is small and prone to be offset by the inductive voltage induced from parasitic components. Most alternative approaches avoid sensing noise-sensitive signals; however, the operating range is narrow due to the limited information from the converter. This paper proposes an SR driving strategy based on the resonant capacitor voltage (RCV) to address those issues. The RCV SR driving strategy does not require current sensors. The sensed RCV is insensitive to the parasitic effects. In addition, the RCV strategy controls the SR ON-time effectively over a wide range of operating frequency and loading conditions. Simulation and experimental results of a 650-W/24-V LLC converter are presented to validate the effectiveness of the proposed RCV strategy. Compared with the conventional VDS-ON sensing method, the ON-time error caused by the parasitic effect is greatly reduced, which improves the power conversion efficiency and reduces the SR MOSFET temperature.},\n keywords={Sensors;MOSFET;Current transformers;Inductance;Resonant converters;Resonant frequency;Control systems;Current sensorless; $LLC$ resonant converter;resonant capacitor voltage (RCV);synchronous rectification (SR)},\n doi={10.1109/TPEL.2019.2900459},\n ISSN={1941-0107},\n month={Nov},}\n\n Synchronous rectification (SR) for LLC resonant converters has been developed to enhance the power conversion efficiency and achieve high-power-density design. Conventional SR driving strategies can be categorized as current-driven methods, VDS-ON sensing methods, and alternative approaches. The current driven methods widely adopt current transformers (CTs) to sense the rectifier current and generate the SR driving signals. The CTs are lossy and bulky, which is unfavorable to high-power-density design. The VDS-ON sensing methods remove the current sensors by sensing the voltage across the ON-state resistor of the SR MOSFET, yet the sensed signal is small and prone to be offset by the inductive voltage induced from parasitic components. Most alternative approaches avoid sensing noise-sensitive signals; however, the operating range is narrow due to the limited information from the converter. This paper proposes an SR driving strategy based on the resonant capacitor voltage (RCV) to address those issues. The RCV SR driving strategy does not require current sensors. The sensed RCV is insensitive to the parasitic effects. In addition, the RCV strategy controls the SR ON-time effectively over a wide range of operating frequency and loading conditions. Simulation and experimental results of a 650-W/24-V LLC converter are presented to validate the effectiveness of the proposed RCV strategy. Compared with the conventional VDS-ON sensing method, the ON-time error caused by the parasitic effect is greatly reduced, which improves the power conversion efficiency and reduces the SR MOSFET temperature.\n
\n\n\n\n \n\n \n \n Karaagac, U., Mahseredjian, J., Gagnon, R., Gras, H., Saad, H., Cai, L., Kocar, I., Haddadi, A., Farantatos, E., Bu, S., Chan, K. W., & Wang, L.\n\n\n \n \n \n \n A Generic EMT-Type Model for Wind Parks With Permanent Magnet Synchronous Generator Full Size Converter Wind Turbines.\n \n \n \n\n\n \n\n\n\n IEEE Power and Energy Technology Systems Journal, 6(3): 131-141. Sep. 2019.\n \n\n\n\n
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\n\n\n@ARTICLE{8760557,\n author={Karaagac, U. and Mahseredjian, J. and Gagnon, R. and Gras, H. and Saad, H. and Cai, L. and Kocar, I. and Haddadi, A. and Farantatos, E. and Bu, S. and Chan, K. W. and Wang, L.},\n journal={IEEE Power and Energy Technology Systems Journal}, \n title={A Generic EMT-Type Model for Wind Parks With Permanent Magnet Synchronous Generator Full Size Converter Wind Turbines}, \n year={2019},\n volume={6},\n number={3},\n pages={131-141},\n abstract={Utilities are under considerable pressure to increase the share of wind energy resources in their generation fleet. With the increasing share of wind energy resources, the dynamic behavior of power systems will change considerably due to fundamental differences in technologies used for wind and conventional generators. There is a very little standardization in the ways to model wind turbines (WTs) and wind parks (WPs) in sharp contrast to conventional power plants. Hence, there is an international interest to deliver generic models (i.e. standardized and publicly available) for WTs and WPs that are able to capture all performance aspects as good as manufacturer-specific models. This paper presents an electromagnetic transient (EMT) simulation model for full-size converter (FSC) WT-based WPs that can be used for stability analysis and interconnection studies. The considered topology uses a permanent magnet synchronous generator. Although the collector grid and the FSC WTs are represented with their aggregated models, the overall control structure of the WP is preserved. FSC WT and WP control systems include the non-linearities, and necessary transient and protection functions to simulate the accurate transient behavior of WPs.},\n keywords={Wind turbines;Voltage control;Wind speed;Power system stability;Reactive power;Electromagnetic transients;Electromagnetic transient program;full size converter;wind park;wind turbine},\n doi={10.1109/JPETS.2019.2928013},\n ISSN={2332-7707},\n month={Sep.},}\n\n Utilities are under considerable pressure to increase the share of wind energy resources in their generation fleet. With the increasing share of wind energy resources, the dynamic behavior of power systems will change considerably due to fundamental differences in technologies used for wind and conventional generators. There is a very little standardization in the ways to model wind turbines (WTs) and wind parks (WPs) in sharp contrast to conventional power plants. Hence, there is an international interest to deliver generic models (i.e. standardized and publicly available) for WTs and WPs that are able to capture all performance aspects as good as manufacturer-specific models. This paper presents an electromagnetic transient (EMT) simulation model for full-size converter (FSC) WT-based WPs that can be used for stability analysis and interconnection studies. The considered topology uses a permanent magnet synchronous generator. Although the collector grid and the FSC WTs are represented with their aggregated models, the overall control structure of the WP is preserved. FSC WT and WP control systems include the non-linearities, and necessary transient and protection functions to simulate the accurate transient behavior of WPs.\n
\n\n\n\n \n\n \n \n Khosroshahi, A. E., Mohammadpour Shotorbani, A., Dadashzadeh, H., Farakhor, A., & Wang, L.\n\n\n \n \n \n \n A New Coupled Inductor-Based High Step-Up DC-DC Converter for PV Applications.\n \n \n \n\n\n \n\n\n\n In 2019 20th Workshop on Control and Modeling for Power Electronics (COMPEL), pages 1-7, June 2019. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{8769630,\n author={Khosroshahi, Alireza Eyvazizadeh and Mohammadpour Shotorbani, Amin and Dadashzadeh, Hoda and Farakhor, Amir and Wang, Liwei},\n booktitle={2019 20th Workshop on Control and Modeling for Power Electronics (COMPEL)}, \n title={A New Coupled Inductor-Based High Step-Up DC-DC Converter for PV Applications}, \n year={2019},\n volume={},\n number={},\n pages={1-7},\n abstract={In this paper, a new high step-up cascaded DC-DC converter is presented. The first stage of the proposed converter is a buck-boost converter with a modified circuit structure. The second stage is a boost converter with coupled inductor and voltage multiplier cells. The energy stored in the leakage inductor of the coupled inductor is recycled by a passive voltage clamp to a capacitor thereby improving the efficiency. Besides, the voltage across the main switch is reduced in this structure with voltage clamp circuit. Thus, a switch with a low on resistance could be used which decreases the conduction loss. The steady-state operation of the proposed topology is analyzed and performance of the proposed converter is verified through simulation in MATLAB/SIMULINK to justify the analysis.},\n keywords={Inductors;Capacitors;Switches;Topology;DC-DC power converters;Stress;Mathematical model;high step-up;DC-DC converter;coupled inductor;photovoltaic energy system},\n doi={10.1109/COMPEL.2019.8769630},\n ISSN={1093-5142},\n month={June},}\n\n In this paper, a new high step-up cascaded DC-DC converter is presented. The first stage of the proposed converter is a buck-boost converter with a modified circuit structure. The second stage is a boost converter with coupled inductor and voltage multiplier cells. The energy stored in the leakage inductor of the coupled inductor is recycled by a passive voltage clamp to a capacitor thereby improving the efficiency. Besides, the voltage across the main switch is reduced in this structure with voltage clamp circuit. Thus, a switch with a low on resistance could be used which decreases the conduction loss. The steady-state operation of the proposed topology is analyzed and performance of the proposed converter is verified through simulation in MATLAB/SIMULINK to justify the analysis.\n
\n\n\n\n \n\n \n \n Shi, X., Filizadeh, S., & Wang, L.\n\n\n \n \n \n \n Analysis of Submodule Capacitor Voltage Ripple and Second-Harmonic Current in MMCs.\n \n \n \n\n\n \n\n\n\n In 2019 20th Workshop on Control and Modeling for Power Electronics (COMPEL), pages 1-8, June 2019. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{8769665,\n author={Shi, Xianghua and Filizadeh, Shaahin and Wang, Liwei},\n booktitle={2019 20th Workshop on Control and Modeling for Power Electronics (COMPEL)}, \n title={Analysis of Submodule Capacitor Voltage Ripple and Second-Harmonic Current in MMCs}, \n year={2019},\n volume={},\n number={},\n pages={1-8},\n abstract={This paper presents a straightforward approach to analyze the 2nd harmonic currents in modular multilevel converters. The submodule capacitor voltage ripple is derived based upon the capacitor's charge variations instead of commonly used energy variations, resulting in simplified calculations and an explicit expression for the voltage ripple to calculate the ripple value and select a proper SM capacitor size. Using analysis of the dc-side loop, a closed-form expression for 2nd harmonics in the arm currents is obtained considering SM redundancy. To validate the theoretical analyses, a 101-level, 500-MW half-bridge MMC is simulated in PSCAD/EMTDC. Experimental results of a downscaled laboratory setup are also presented. Comprehensive comparisons of the theoretical results obtained by the proposed method against simulation and experimental results as well as against an existing method demonstrate its superior accuracy.},\n keywords={Capacitors;Harmonic analysis;Modulation;Mathematical model;Closed-form solutions;Redundancy;Inductors;Second-order harmonic;Capacitor voltage ripple;MMC;Circulating-current suppression control},\n doi={10.1109/COMPEL.2019.8769665},\n ISSN={1093-5142},\n month={June},}\n\n This paper presents a straightforward approach to analyze the 2nd harmonic currents in modular multilevel converters. The submodule capacitor voltage ripple is derived based upon the capacitor's charge variations instead of commonly used energy variations, resulting in simplified calculations and an explicit expression for the voltage ripple to calculate the ripple value and select a proper SM capacitor size. Using analysis of the dc-side loop, a closed-form expression for 2nd harmonics in the arm currents is obtained considering SM redundancy. To validate the theoretical analyses, a 101-level, 500-MW half-bridge MMC is simulated in PSCAD/EMTDC. Experimental results of a downscaled laboratory setup are also presented. Comprehensive comparisons of the theoretical results obtained by the proposed method against simulation and experimental results as well as against an existing method demonstrate its superior accuracy.\n
\n\n\n\n \n\n \n \n Jahan, H. K., Mohammadpour Shotorbani, A., Khosroshahi, A. E., Wang, L., Blaabjerg, F., Abapour, M., & Zare, K.\n\n\n \n \n \n \n A DC-DC Converter-Based Single-Source Transformer-less Multilevel Inverter.\n \n \n \n\n\n \n\n\n\n In 2019 20th Workshop on Control and Modeling for Power Electronics (COMPEL), pages 1-8, June 2019. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{8769709,\n author={Jahan, Hossein Khoun and Mohammadpour Shotorbani, Amin and Khosroshahi, Alireza E. and Wang, Liwei and Blaabjerg, Frede and Abapour, Mehdi and Zare, Kazem},\n booktitle={2019 20th Workshop on Control and Modeling for Power Electronics (COMPEL)}, \n title={A DC-DC Converter-Based Single-Source Transformer-less Multilevel Inverter}, \n year={2019},\n volume={},\n number={},\n pages={1-8},\n abstract={Voltage Source Inverters (VSIs) are one of the most important power electronic converters in power industry. Generally, an inverter realizes a desired AC voltage with an arbitrary amplitude and frequency using a DC voltage source. The DC source can be a set of battery, an array of photovoltaic cells, fuel cells, and so on. In some applications such as photovoltaic systems, the voltage magnitude of the DC source needs to be boosted. In certain applications, e.g. the machine drives, a controller with a high bandwidth is required. In this regard, the slow output filters can be eliminated using a multilevel inverter. In this study, a comprehensive converter topology of a single-source boosting multilevel inverter is proposed to meet the above-mentioned requirements. Due to the above-mentioned features, the proposed inverter is referred to boosting multilevel voltage source inverter (BM-VSI). The suggested BM-VSI realizes a seven-level phase-to-phase staircase ac voltage using two DC-DC Cuk converters and only one DC source. The developed output voltage in the proposed BM-VSI is three times of the conventional voltage source inverter. The performance of the proposed topology is evaluated using a laboratory-scaled prototype.},\n keywords={Inverters;Topology;Voltage control;Regulators;Switches;Renewable energy sources;Boosting;voltage source inverter;multilevel inverter;boost converter},\n doi={10.1109/COMPEL.2019.8769709},\n ISSN={1093-5142},\n month={June},}\n\n Voltage Source Inverters (VSIs) are one of the most important power electronic converters in power industry. Generally, an inverter realizes a desired AC voltage with an arbitrary amplitude and frequency using a DC voltage source. The DC source can be a set of battery, an array of photovoltaic cells, fuel cells, and so on. In some applications such as photovoltaic systems, the voltage magnitude of the DC source needs to be boosted. In certain applications, e.g. the machine drives, a controller with a high bandwidth is required. In this regard, the slow output filters can be eliminated using a multilevel inverter. In this study, a comprehensive converter topology of a single-source boosting multilevel inverter is proposed to meet the above-mentioned requirements. Due to the above-mentioned features, the proposed inverter is referred to boosting multilevel voltage source inverter (BM-VSI). The suggested BM-VSI realizes a seven-level phase-to-phase staircase ac voltage using two DC-DC Cuk converters and only one DC source. The developed output voltage in the proposed BM-VSI is three times of the conventional voltage source inverter. The performance of the proposed topology is evaluated using a laboratory-scaled prototype.\n
\n\n\n\n \n\n \n \n Aliaslkhiabani, M., Paz, F., Ordonez, M., & Wang, L.\n\n\n \n \n \n \n Partial Shading Mitigation in Photovoltaic Arrays using Shade Dispenser Technique.\n \n \n \n\n\n \n\n\n\n In 2019 IEEE 10th International Symposium on Power Electronics for Distributed Generation Systems (PEDG), pages 617-622, June 2019. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{8807663,\n author={Aliaslkhiabani, Mahdieh and Paz, Francisco and Ordonez, Martin and Wang, Liwei},\n booktitle={2019 IEEE 10th International Symposium on Power Electronics for Distributed Generation Systems (PEDG)}, \n title={Partial Shading Mitigation in Photovoltaic Arrays using Shade Dispenser Technique}, \n year={2019},\n volume={},\n number={},\n pages={617-622},\n abstract={Partial Shading (PS) critically reduces the maximum power extractable from a photovoltaic (PV) array, decreasing its efficiency, and creating multiple local peaks (LP) in the characteristic P-V curve of the array. Currently, the electrical interconnection that minimizes these losses is the Total Cross Tied (TCT), where each panel in a string is connected in parallel to all the other panels in the same row, creating an electrical matrix connection. Although the TCT connection partially solves the problem, it is still sensitive to several shaded panels on the same row constraining the current. In this paper, a new method is presented to reduce the consequences of PS by optimally rearranging the electrical connections in such a way that the shadow is distributed through the array. The proposed method is dubbed "Shade Dispenser" (SD), as it takes a physical shade covering adjacent modules and electrically distributes it minimizing the occurrence of the same-row shades. The physical separation of electrically connected PV panels comes at a cost: it increases the wiring cost and power losses of the array. This trade-off is explored in this paper, outlining the solution for each array size. As a result, this technique represents a reduction in the effects of PS while minimizing wiring losses and costs. The performance of the system is investigated under different shading patterns and compared with the most efficient existing interconnections. Simulation results confirm that not only is the efficiency of the SD strategy higher, but the payback time for overhead wiring cost is lower. Moreover, this method diminishes the number of LPs in the P-V curve of the array.},\n keywords={Wiring;Power generation;Simulation;Complexity theory;Wires;Control systems;Logic arrays},\n doi={10.1109/PEDG.2019.8807663},\n ISSN={2329-5767},\n month={June},}\n\n Partial Shading (PS) critically reduces the maximum power extractable from a photovoltaic (PV) array, decreasing its efficiency, and creating multiple local peaks (LP) in the characteristic P-V curve of the array. Currently, the electrical interconnection that minimizes these losses is the Total Cross Tied (TCT), where each panel in a string is connected in parallel to all the other panels in the same row, creating an electrical matrix connection. Although the TCT connection partially solves the problem, it is still sensitive to several shaded panels on the same row constraining the current. In this paper, a new method is presented to reduce the consequences of PS by optimally rearranging the electrical connections in such a way that the shadow is distributed through the array. The proposed method is dubbed \"Shade Dispenser\" (SD), as it takes a physical shade covering adjacent modules and electrically distributes it minimizing the occurrence of the same-row shades. The physical separation of electrically connected PV panels comes at a cost: it increases the wiring cost and power losses of the array. This trade-off is explored in this paper, outlining the solution for each array size. As a result, this technique represents a reduction in the effects of PS while minimizing wiring losses and costs. The performance of the system is investigated under different shading patterns and compared with the most efficient existing interconnections. Simulation results confirm that not only is the efficiency of the SD strategy higher, but the payback time for overhead wiring cost is lower. Moreover, this method diminishes the number of LPs in the P-V curve of the array.\n
\n\n\n\n \n\n \n \n Shotorbani, A. M., Zhang, Y., & Wang, L.\n\n\n \n \n \n \n Secondary Control of a Multi-Terminal HVDC Grid Using a Consensus-Based Distributed Scheme.\n \n \n \n\n\n \n\n\n\n In 2019 IEEE Canadian Conference of Electrical and Computer Engineering (CCECE), pages 1-4, May 2019. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{8861531,\n author={Shotorbani, Amin Mohammadpour and Zhang, Yuanshi and Wang, Liwei},\n booktitle={2019 IEEE Canadian Conference of Electrical and Computer Engineering (CCECE)}, \n title={Secondary Control of a Multi-Terminal HVDC Grid Using a Consensus-Based Distributed Scheme}, \n year={2019},\n volume={},\n number={},\n pages={1-4},\n abstract={Variants of droop control for power-sharing in a multi-terminal high voltage dc (MTDC) grid result in voltage deviation from the nominal value. Moreover, the power-sharing is inaccurate in the droop-controlled MTDC system. This paper proposes a secondary control scheme with a distributed architecture to compensate the voltage deviation and share the power mismatch automatically. Furthermore, a distributed observer is used to estimate the average voltage of the MTDC grid stations. The proposed distributed controller and observer use the local measurements and communications with neighboring stations, in which a limited information of output powers and voltages are shared. Therefore, the requirement of the global information in the centralized secondary control schemes is eliminated, which improves the reliability and stability of the MTDC system. The case studies illustrate that the proposed distributed scheme regulates the stations' average voltage and shares the power mismatch automatically.},\n keywords={Voltage control;Observers;Communication networks;Power system stability;Lyapunov methods;Power generation;Power demand;Automatic power sharing;Distributed control;Multi-terminal high-voltage dc system;Secondary voltage regulation},\n doi={10.1109/CCECE.2019.8861531},\n ISSN={2576-7046},\n month={May},}\n\n Variants of droop control for power-sharing in a multi-terminal high voltage dc (MTDC) grid result in voltage deviation from the nominal value. Moreover, the power-sharing is inaccurate in the droop-controlled MTDC system. This paper proposes a secondary control scheme with a distributed architecture to compensate the voltage deviation and share the power mismatch automatically. Furthermore, a distributed observer is used to estimate the average voltage of the MTDC grid stations. The proposed distributed controller and observer use the local measurements and communications with neighboring stations, in which a limited information of output powers and voltages are shared. Therefore, the requirement of the global information in the centralized secondary control schemes is eliminated, which improves the reliability and stability of the MTDC system. The case studies illustrate that the proposed distributed scheme regulates the stations' average voltage and shares the power mismatch automatically.\n
\n\n\n\n \n\n \n \n Khosroshahi, A. E., Wang, L., Dadashzadeh, H., Ardi, H., Farakhor, A., & Shotorbani, A. M.\n\n\n \n \n \n \n A Two-Stage Coupled-Inductor-Based Cascaded DC-DC Converter with a High Voltage Gain.\n \n \n \n\n\n \n\n\n\n In 2019 IEEE Canadian Conference of Electrical and Computer Engineering (CCECE), pages 1-5, May 2019. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{8861768,\n author={Khosroshahi, Alireza E. and Wang, Liwei and Dadashzadeh, Hoda and Ardi, Hossein and Farakhor, Amir and Shotorbani, Amin Mohammadpour},\n booktitle={2019 IEEE Canadian Conference of Electrical and Computer Engineering (CCECE)}, \n title={A Two-Stage Coupled-Inductor-Based Cascaded DC-DC Converter with a High Voltage Gain}, \n year={2019},\n volume={},\n number={},\n pages={1-5},\n abstract={In this paper, a new high step-up cascaded DC-DC converter is presented. The first stage of the proposed converter is a buck-boost converter with modified converter topology. The second stage is a boost converter with coupled inductor and voltage multiplier cells. The energy stored in the leakage inductor of the coupled inductor is recycled by a passive voltage clamp to a capacitor thereby improving the efficiency. Besides, the blocking voltage across the MOSFET switch is reduced in the proposed topology due to voltage clamp circuit. Thus, a low on-resistance (RDS-on) switch can be used to reduce conduction loss. The steady-state analysis of the proposed converter is presented in the paper. Finally, the proposed converter is simulated in MATLAB/SIMULINK to verify the converter performance.},\n keywords={Inductors;Capacitors;Switches;High-voltage techniques;Mathematical model;DC-DC power converters;Clamps;Buck-boost converter;cascaded converter;coupled-inductor;high step-up DC-DC converter;voltage clamp circuit},\n doi={10.1109/CCECE.2019.8861768},\n ISSN={2576-7046},\n month={May},}\n\n In this paper, a new high step-up cascaded DC-DC converter is presented. The first stage of the proposed converter is a buck-boost converter with modified converter topology. The second stage is a boost converter with coupled inductor and voltage multiplier cells. The energy stored in the leakage inductor of the coupled inductor is recycled by a passive voltage clamp to a capacitor thereby improving the efficiency. Besides, the blocking voltage across the MOSFET switch is reduced in the proposed topology due to voltage clamp circuit. Thus, a low on-resistance (RDS-on) switch can be used to reduce conduction loss. The steady-state analysis of the proposed converter is presented in the paper. Finally, the proposed converter is simulated in MATLAB/SIMULINK to verify the converter performance.\n
\n\n\n\n \n\n \n \n Nowak, S., Wang, L., Eberle, W., Shotorbani, A. M., & Metcalfe, M. S.\n\n\n \n \n \n \n Measurement-based Network Model Reduction Of Distribution Systems Using Two-port Networks.\n \n \n \n\n\n \n\n\n\n In 2019 IEEE Canadian Conference of Electrical and Computer Engineering (CCECE), pages 1-4, May 2019. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{8861874,\n author={Nowak, Severin and Wang, Liwei and Eberle, Wilson and Shotorbani, Amin Mohammadpour and Metcalfe, Malcolm S.},\n booktitle={2019 IEEE Canadian Conference of Electrical and Computer Engineering (CCECE)}, \n title={Measurement-based Network Model Reduction Of Distribution Systems Using Two-port Networks}, \n year={2019},\n volume={},\n number={},\n pages={1-4},\n abstract={This paper proposes a measurement-based method to derive a reduced-network model of distribution systems in real-time using two-port networks. Instead of relying on an offline model, the method uses only synchronized voltage and current phasor data collected from a limited number of strate-gically placed distribution-level phasor measurement units. An important feature of the measurement-based approach is that it is adaptive to operating-point changes. Through numerical examples, we verify the accuracy of the reduced-network model by comparing its power flow solution and optimal power flow solution to that of the original distribution system from which measurements are obtained.},\n keywords={Load modeling;Mathematical model;Integrated circuit modeling;Voltage measurement;Computational modeling;Adaptation models;Current measurement},\n doi={10.1109/CCECE.2019.8861874},\n ISSN={2576-7046},\n month={May},}\n\n This paper proposes a measurement-based method to derive a reduced-network model of distribution systems in real-time using two-port networks. Instead of relying on an offline model, the method uses only synchronized voltage and current phasor data collected from a limited number of strate-gically placed distribution-level phasor measurement units. An important feature of the measurement-based approach is that it is adaptive to operating-point changes. Through numerical examples, we verify the accuracy of the reduced-network model by comparing its power flow solution and optimal power flow solution to that of the original distribution system from which measurements are obtained.\n
\n\n\n\n \n\n \n \n Bieber, L., & Wang, L.\n\n\n \n \n \n \n An Active-Forced-Commutated Thyristor-Based Multilevel Converter for HVDC Transmission.\n \n \n \n\n\n \n\n\n\n In 2019 IEEE 10th Annual Information Technology, Electronics and Mobile Communication Conference (IEMCON), pages 0447-0453, Oct 2019. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{8936170,\n author={Bieber, Levi and Wang, Liwei},\n booktitle={2019 IEEE 10th Annual Information Technology, Electronics and Mobile Communication Conference (IEMCON)}, \n title={An Active-Forced-Commutated Thyristor-Based Multilevel Converter for HVDC Transmission}, \n year={2019},\n volume={},\n number={},\n pages={0447-0453},\n abstract={This paper proposes a thyristor-based hybrid three-level converter (TH3LC) integrated with AC-side full-bridge submodule chain-link (AC-FBCL) for high voltage direct current (HVDC) transmission. The TH3LC makes use of thyristor director switches (DSs) to conduct the bulk of transferred power while the AC-FBCL enables a multilevel voltage output. Third-order harmonic voltage injection is used by the AC-FBCL to limit its total blocking voltage to a quarter of the DC-side voltage, which reduces the converter footprint, the semiconductor count, and the losses. The DSs of the TH3LC are force-commutated by an additional neutral-point-connected, low capacitance commutation FBCL (C-FBCL), enabling low DS switching frequency. The C-FBCL enables stepped-trapezoidal voltage output of the three-level converter for straight-forward synchronization with the AC-FBCL. Simulated case studies show that the TH3LC provides similar converter efficiency to the half-bridge MMC (HB-MMC) while possessing DC fault blocking capability and a significantly smaller footprint due to a reduced number of submodules and less energy storage requirement.},\n keywords={Thyristors;Harmonic analysis;Modulation;Power harmonic filters;Circuit faults;HVDC transmission;Converters;hybrid multilevel converter;modular multilevel converter;HVDC transmission;thyristor-based;voltage source converter (VSC)},\n doi={10.1109/IEMCON.2019.8936170},\n ISSN={2644-3163},\n month={Oct},}\n\n This paper proposes a thyristor-based hybrid three-level converter (TH3LC) integrated with AC-side full-bridge submodule chain-link (AC-FBCL) for high voltage direct current (HVDC) transmission. The TH3LC makes use of thyristor director switches (DSs) to conduct the bulk of transferred power while the AC-FBCL enables a multilevel voltage output. Third-order harmonic voltage injection is used by the AC-FBCL to limit its total blocking voltage to a quarter of the DC-side voltage, which reduces the converter footprint, the semiconductor count, and the losses. The DSs of the TH3LC are force-commutated by an additional neutral-point-connected, low capacitance commutation FBCL (C-FBCL), enabling low DS switching frequency. The C-FBCL enables stepped-trapezoidal voltage output of the three-level converter for straight-forward synchronization with the AC-FBCL. Simulated case studies show that the TH3LC provides similar converter efficiency to the half-bridge MMC (HB-MMC) while possessing DC fault blocking capability and a significantly smaller footprint due to a reduced number of submodules and less energy storage requirement.\n
\n\n\n\n \n\n \n \n Han, J., Bieber, L., Meng, X., Wang, L., & Li, W.\n\n\n \n \n \n \n An Average Value Model of Hybrid Cascaded Multilevel Voltage Source Converter for Accelerated EMT Simulation.\n \n \n \n\n\n \n\n\n\n In 2019 IEEE 10th Annual Information Technology, Electronics and Mobile Communication Conference (IEMCON), pages 0454-0460, Oct 2019. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{8936301,\n author={Han, Jintao and Bieber, Levi and Meng, Xuekun and Wang, Liwei and Li, Wei},\n booktitle={2019 IEEE 10th Annual Information Technology, Electronics and Mobile Communication Conference (IEMCON)}, \n title={An Average Value Model of Hybrid Cascaded Multilevel Voltage Source Converter for Accelerated EMT Simulation}, \n year={2019},\n volume={},\n number={},\n pages={0454-0460},\n abstract={The voltage source converters (VSC) based high voltage direct current transmission systems become increasingly popular for efficient transmission of large-scale renewable energy over long distances. Recently, the hybrid cascaded multilevel converter (HCMC) is proposed to further improve the converter efficiency, compactness, and fault resilience compared to the traditional modular multilevel converters (MMCs). The efficient and accurate simulation of the HCMC in electromagnetic transient (EMT) programs play an important role for the converter control and design. The previous research works focus on numerically efficient and accurate models of the MMCs, but very few on those of the HCMC. This paper proposes an average value model (AVM) of the HCMC, which significantly improves the simulation efficiency while maintaining the simulation accuracy. The proposed AVM is validated against the detailed equivalent model (DEM) for dynamic transients. The simulation results by the proposed AVM demonstrate good modeling accuracy. The simulation speed of the proposed AVM is independent of the number of submodules, which is very desirable for the HCMC with large numbers of submodules.},\n keywords={Integrated circuit modeling;Voltage control;Computational modeling;Harmonic analysis;Numerical models;Semiconductor diodes;Multilevel converters;Average value model;electromagnetic transient;high voltage direct current system;hybrid cascaded multilevel converter},\n doi={10.1109/IEMCON.2019.8936301},\n ISSN={2644-3163},\n month={Oct},}\n\n The voltage source converters (VSC) based high voltage direct current transmission systems become increasingly popular for efficient transmission of large-scale renewable energy over long distances. Recently, the hybrid cascaded multilevel converter (HCMC) is proposed to further improve the converter efficiency, compactness, and fault resilience compared to the traditional modular multilevel converters (MMCs). The efficient and accurate simulation of the HCMC in electromagnetic transient (EMT) programs play an important role for the converter control and design. The previous research works focus on numerically efficient and accurate models of the MMCs, but very few on those of the HCMC. This paper proposes an average value model (AVM) of the HCMC, which significantly improves the simulation efficiency while maintaining the simulation accuracy. The proposed AVM is validated against the detailed equivalent model (DEM) for dynamic transients. The simulation results by the proposed AVM demonstrate good modeling accuracy. The simulation speed of the proposed AVM is independent of the number of submodules, which is very desirable for the HCMC with large numbers of submodules.\n
\n\n\n\n \n\n \n \n Meng, X., Han, J., Pfannschmidt, J., Wang, L., Li, W., & Belanger, J.\n\n\n \n \n \n \n An Enhanced Average Value Model of Modular Multilevel Converter for Accurate Representation of Converter Blocking Operation.\n \n \n \n\n\n \n\n\n\n In 2019 IEEE Power & Energy Society General Meeting (PESGM), pages 1-5, Aug 2019. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{8973959,\n author={Meng, Xuekun and Han, Jintao and Pfannschmidt, Joel and Wang, Liwei and Li, Wei and Belanger, Jean},\n booktitle={2019 IEEE Power & Energy Society General Meeting (PESGM)}, \n title={An Enhanced Average Value Model of Modular Multilevel Converter for Accurate Representation of Converter Blocking Operation}, \n year={2019},\n volume={},\n number={},\n pages={1-5},\n abstract={Modular Multilevel Converter (MMC) has demonstrated significant advantage in harmonic elimination and improved converter efficiency due to the use of large number of submodules and low switching frequency of the submodules. However, the massive switching events of the Insulated-Gate Bipolar Transistors (IGBTs) in the MMC have also introduced high computational burden when modelling the MMC in electromagnetic transient tools. Various research efforts have dedicated to developing the numerically efficient average value models (AVMs) for the MMC. This paper gives an overview of the existing control signal based AVMs of the MMC and proposes an enhanced average value model with arm current initialization method to compensate for the initial condition issue in the previously developed AVMs. The proposed approach is evaluated in a point-to-point MMC HVDC system under Simulink/eMEGAsim environment.},\n keywords={Average value model;electromagnetic transient;high voltage direct current system;modular multilevel converter},\n doi={10.1109/PESGM40551.2019.8973959},\n ISSN={1944-9933},\n month={Aug},}\n\n Modular Multilevel Converter (MMC) has demonstrated significant advantage in harmonic elimination and improved converter efficiency due to the use of large number of submodules and low switching frequency of the submodules. However, the massive switching events of the Insulated-Gate Bipolar Transistors (IGBTs) in the MMC have also introduced high computational burden when modelling the MMC in electromagnetic transient tools. Various research efforts have dedicated to developing the numerically efficient average value models (AVMs) for the MMC. This paper gives an overview of the existing control signal based AVMs of the MMC and proposes an enhanced average value model with arm current initialization method to compensate for the initial condition issue in the previously developed AVMs. The proposed approach is evaluated in a point-to-point MMC HVDC system under Simulink/eMEGAsim environment.\n
\n\n\n\n \n\n \n \n Nowak, S., Wang, L., & Chen, Y. C.\n\n\n \n \n \n \n Measurement-based Optimal Power Flow with Linear Power-flow Constraint for DER Dispatch.\n \n \n \n\n\n \n\n\n\n In 2019 North American Power Symposium (NAPS), pages 1-5, Oct 2019. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{9000217,\n author={Nowak, Severin and Wang, Liwei and Chen, Yu Christine},\n booktitle={2019 North American Power Symposium (NAPS)}, \n title={Measurement-based Optimal Power Flow with Linear Power-flow Constraint for DER Dispatch}, \n year={2019},\n volume={},\n number={},\n pages={1-5},\n abstract={This paper proposes a measurement-based method to obtain optimal power-flow (OPF) solutions that optimize distribution-system operations by dispatching active- and reactive-power outputs of distributed energy resources (DERs). Central to the proposed method is the estimation of a linear power-flow model from synchronized voltage and power-injection data collected from distribution-level phasor measurement units (D-PMUs). The estimated model is then incorporated into an OPF problem as an equality constraint. We formulate a quadratic cost function that enables co-optimization of DER active- and reactive-power costs, voltage deviations away from prescribed reference levels, as well as active- and reactive-power deviations from desired setpoints. Via numerical simulations of the IEEE 33-bus distribution test system, we demonstrate that the proposed measurement-based method yields sufficiently accurate solutions compared to model-based OPF solutions. Furthermore, we highlight the adaptability of the proposed method in case an accurate network model is not available.},\n keywords={Voltage measurement;Computational modeling;Estimation;Mathematical model;Power measurement;Cost function;Adaptation models},\n doi={10.1109/NAPS46351.2019.9000217},\n ISSN={},\n month={Oct},}\n\n This paper proposes a measurement-based method to obtain optimal power-flow (OPF) solutions that optimize distribution-system operations by dispatching active- and reactive-power outputs of distributed energy resources (DERs). Central to the proposed method is the estimation of a linear power-flow model from synchronized voltage and power-injection data collected from distribution-level phasor measurement units (D-PMUs). The estimated model is then incorporated into an OPF problem as an equality constraint. We formulate a quadratic cost function that enables co-optimization of DER active- and reactive-power costs, voltage deviations away from prescribed reference levels, as well as active- and reactive-power deviations from desired setpoints. Via numerical simulations of the IEEE 33-bus distribution test system, we demonstrate that the proposed measurement-based method yields sufficiently accurate solutions compared to model-based OPF solutions. Furthermore, we highlight the adaptability of the proposed method in case an accurate network model is not available.\n
\n\n\n\n \n\n \n \n Fu, X., Wang, C., Li, P., & Wang, L.\n\n\n \n \n \n \n Exponential integration algorithm for large-scale wind farm simulation with Krylov subspace acceleration.\n \n \n \n\n\n \n\n\n\n Applied Energy, 254: 113692. 2019.\n \n\n\n\n
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\n\n\n\n@article{fu2019exponential,\n title={Exponential integration algorithm for large-scale wind farm simulation with Krylov subspace acceleration},\n author={Fu, Xiaopeng and Wang, Chengshan and Li, Peng and Wang, Liwei},\n journal={Applied Energy},\n volume={254},\n pages={113692},\n year={2019},\n publisher={Elsevier}\n}\n\n\n\n \n\n \n \n Nami, A., Liang, J., Dijkhuizen, F., & Wang, L.\n\n\n \n \n \n \n Multilevel converter with reduced AC fault handling rating.\n \n \n \n\n\n \n\n\n\n April 9 2019.\n US Patent 10,256,745\n\n\n\n
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\n\n\n\n@misc{nami2019multilevel,\n title={Multilevel converter with reduced AC fault handling rating},\n author={Nami, Alireza and Liang, Jiaqi and Dijkhuizen, Frans and Wang, Liwei},\n year={2019},\n month=apr # "~9",\n publisher={Google Patents},\n note={US Patent 10,256,745}\n}\n\n\n\n \n\n \n \n Shotorbani, A. M., Mohammadi-Ivatloo, B., Wang, L., Marzband, M., & Sabahi, M.\n\n\n \n \n \n \n Application of finite-time control Lyapunov function in low-power PMSG wind energy conversion systems for sensorless MPPT.\n \n \n \n\n\n \n\n\n\n International Journal of Electrical Power & Energy Systems, 106: 169–182. 2019.\n \n\n\n\n
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\n\n\n\n@article{shotorbani2019application,\n title={Application of finite-time control Lyapunov function in low-power PMSG wind energy conversion systems for sensorless MPPT},\n author={Shotorbani, Amin Mohammadpour and Mohammadi-Ivatloo, Behnam and Wang, Liwei and Marzband, Mousa and Sabahi, Mehran},\n journal={International Journal of Electrical Power \\& Energy Systems},\n volume={106},\n pages={169--182},\n year={2019},\n publisher={Elsevier}\n}\n\n\n\n
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\n \n \n\n \n \n Ebrahimi, S., Amiri, N., Atighechi, H., Huang, Y., Wang, L., & Jatskevich, J.\n\n\n \n \n \n \n Generalized Parametric Average-Value Model of Line-Commutated Rectifiers Considering AC Harmonics With Variable Frequency Operation.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Energy Conversion, 33(1): 341-353. March 2018.\n \n\n\n\n
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\n\n\n@ARTICLE{8036252,\n author={Ebrahimi, Seyyedmilad and Amiri, Navid and Atighechi, Hamid and Huang, Yingwei and Wang, Liwei and Jatskevich, Juri},\n journal={IEEE Transactions on Energy Conversion}, \n title={Generalized Parametric Average-Value Model of Line-Commutated Rectifiers Considering AC Harmonics With Variable Frequency Operation}, \n year={2018},\n volume={33},\n number={1},\n pages={341-353},\n abstract={Line-commutated rectifiers are often utilized in machine-converter systems and many energy conversion applications. Simulation of such power systems using detailed switching models of rectifiers is computationally expensive, and as an alternative for system-level studies, the so-called average-value modeling (AVM) techniques have become indispensable. The parametric AVM (PAVM) uses a computerized approach for establishing the key relationships between the averaged ac and dc variables. In this paper, a generalized PAVM (GPAVM) is proposed, which extends several previously proposed models. The new GPAVM includes the ac harmonics in thyristor-controlled rectifier models considering their nonlinear dependency on the line frequency. The new model is verified using detailed simulations and experimental results and is demonstrated to have better accuracy in a wider range of operating conditions and speeds/frequencies.},\n keywords={Rectifiers;Harmonic analysis;Computational modeling;Power harmonic filters;Switches;Average-value modeling;harmonics;line-commutated rectifiers;parametric approach;variable frequency},\n doi={10.1109/TEC.2017.2752129},\n ISSN={1558-0059},\n month={March},}\n\n Line-commutated rectifiers are often utilized in machine-converter systems and many energy conversion applications. Simulation of such power systems using detailed switching models of rectifiers is computationally expensive, and as an alternative for system-level studies, the so-called average-value modeling (AVM) techniques have become indispensable. The parametric AVM (PAVM) uses a computerized approach for establishing the key relationships between the averaged ac and dc variables. In this paper, a generalized PAVM (GPAVM) is proposed, which extends several previously proposed models. The new GPAVM includes the ac harmonics in thyristor-controlled rectifier models considering their nonlinear dependency on the line frequency. The new model is verified using detailed simulations and experimental results and is demonstrated to have better accuracy in a wider range of operating conditions and speeds/frequencies.\n
\n\n\n\n \n\n \n \n Shotorbani, A. M., Meng, X., Wang, L., & Mohammadi-Ivatloo, B.\n\n\n \n \n \n \n A Decentralized Multiloop Scheme for Robust Control of a Power Flow Controller With Two Shunt Modular Multilevel Converters.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Industrial Informatics, 14(10): 4309-4321. Oct 2018.\n \n\n\n\n
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\n\n\n@ARTICLE{8270354,\n author={Shotorbani, Amin Mohammadpour and Meng, Xuekun and Wang, Liwei and Mohammadi-Ivatloo, Behnam},\n journal={IEEE Transactions on Industrial Informatics}, \n title={A Decentralized Multiloop Scheme for Robust Control of a Power Flow Controller With Two Shunt Modular Multilevel Converters}, \n year={2018},\n volume={14},\n number={10},\n pages={4309-4321},\n abstract={This paper investigates the robust multiloop control for power flow controller in power transmission grids. A hybrid power flow controller (HPFC) is proposed, which comprises two shunt modular-multilevel-converter (MMC) based voltage source converters and one series capacitor. A nonlinear multiloop controller is designed via control Lyapunov function to achieve fast tracking performance, and robustness against system uncertainties and disturbances. Stability of the closed-loop nonlinear HPFC system is proved using Lyapunov stability theorem. The proposed finite-time controller (FTC) is decentralized using adaptive observer to estimate the nonlocal system parameters, in case of communication failure. Simulation and experimental studies are used to validate the proposed FTC with detailed model of MMCs, and the interarea oscillation damping with Phasor model of HPFC. Comparisons of the proposed FTC and the conventional PI controller show that the FTC has fast control response, small transient overshoot, and improved robustness.},\n keywords={Capacitors;Power transmission lines;Robustness;Voltage control;Load flow;Lyapunov methods;Observers;Adaptive observer;decentralized multiloop control;modular multilevel converter (MMC);power transmission control;robustness},\n doi={10.1109/TII.2018.2799139},\n ISSN={1941-0050},\n month={Oct},}\n\n This paper investigates the robust multiloop control for power flow controller in power transmission grids. A hybrid power flow controller (HPFC) is proposed, which comprises two shunt modular-multilevel-converter (MMC) based voltage source converters and one series capacitor. A nonlinear multiloop controller is designed via control Lyapunov function to achieve fast tracking performance, and robustness against system uncertainties and disturbances. Stability of the closed-loop nonlinear HPFC system is proved using Lyapunov stability theorem. The proposed finite-time controller (FTC) is decentralized using adaptive observer to estimate the nonlocal system parameters, in case of communication failure. Simulation and experimental studies are used to validate the proposed FTC with detailed model of MMCs, and the interarea oscillation damping with Phasor model of HPFC. Comparisons of the proposed FTC and the conventional PI controller show that the FTC has fast control response, small transient overshoot, and improved robustness.\n
\n\n\n\n \n\n \n \n Hafezinasab, H., Eberle, W., Gautam, D., & Botting, C.\n\n\n \n \n \n \n An adaptive selection of intermediate bus voltage to optimize efficiency in a universal input three-phase power factor correction circuit.\n \n \n \n\n\n \n\n\n\n In 2018 IEEE Applied Power Electronics Conference and Exposition (APEC), pages 24-29, March 2018. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{8340984,\n author={Hafezinasab, Hamidreza and Eberle, Wilson and Gautam, Deepak and Botting, Chris},\n booktitle={2018 IEEE Applied Power Electronics Conference and Exposition (APEC)}, \n title={An adaptive selection of intermediate bus voltage to optimize efficiency in a universal input three-phase power factor correction circuit}, \n year={2018},\n volume={},\n number={},\n pages={24-29},\n abstract={This paper proposes an adaptive intermediate bus voltage solution to optimize efficiency in a universal three-phase AC input (200-480 V) cascaded buck-follows-boost power factor corrected (PFC) converter with a 400 V DC output voltage. With this application and architecture, the output voltage of the boost converter needs to be higher than the peak AC input to maintain PFC and regulation. Thus, at 480 V AC input, taking into consideration allowable overvoltage and margin for regulation, typically a bus voltage near 800 V DC is used between the boost and buck stages. This work proposes to adaptively change the bus voltage between the boost and buck stages based on the value of the AC input in order to maximize efficiency. A loss analysis is included to show the significant loss savings and efficiency improvement using the proposed method. Experimental results are presented for a 5 kW silicon carbide based prototype. The results show up to 4.4 percentage point improvement in efficiency at low AC line input compared to the conventional PFC approach with an 800 V DC intermediate bus voltage. The total loss savings in this case is 220 W, which is 4.4 % of total output power.},\n keywords={Voltage control;Switches;Relays;Inductors;Silicon carbide;Buck converters;Optimization;universal input three phase PFC;DC bus optimization;three-phase boost-buck;intermediate bus voltage optimization;400VDC bus;SiC},\n doi={10.1109/APEC.2018.8340984},\n ISSN={2470-6647},\n month={March},}\n\n This paper proposes an adaptive intermediate bus voltage solution to optimize efficiency in a universal three-phase AC input (200-480 V) cascaded buck-follows-boost power factor corrected (PFC) converter with a 400 V DC output voltage. With this application and architecture, the output voltage of the boost converter needs to be higher than the peak AC input to maintain PFC and regulation. Thus, at 480 V AC input, taking into consideration allowable overvoltage and margin for regulation, typically a bus voltage near 800 V DC is used between the boost and buck stages. This work proposes to adaptively change the bus voltage between the boost and buck stages based on the value of the AC input in order to maximize efficiency. A loss analysis is included to show the significant loss savings and efficiency improvement using the proposed method. Experimental results are presented for a 5 kW silicon carbide based prototype. The results show up to 4.4 percentage point improvement in efficiency at low AC line input compared to the conventional PFC approach with an 800 V DC intermediate bus voltage. The total loss savings in this case is 220 W, which is 4.4 % of total output power.\n
\n\n\n\n \n\n \n \n Ebrahimi, S., Amiri, N., Wang, L., & Jatskevich, J.\n\n\n \n \n \n \n Efficient Modeling of Six-Phase PM Synchronous Machine-Rectifier Systems in State-Variable-Based Simulation Programs.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Energy Conversion, 33(3): 1557-1570. Sep. 2018.\n \n\n\n\n
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\n\n\n@ARTICLE{8345666,\n author={Ebrahimi, Seyyedmilad and Amiri, Navid and Wang, Liwei and Jatskevich, Juri},\n journal={IEEE Transactions on Energy Conversion}, \n title={Efficient Modeling of Six-Phase PM Synchronous Machine-Rectifier Systems in State-Variable-Based Simulation Programs}, \n year={2018},\n volume={33},\n number={3},\n pages={1557-1570},\n abstract={Many advanced energy conversion systems utilize multiphase (e.g., six or more phases) electrical machines that feed high-count-pulse (e.g., 12 or more pulses) rectifiers for supplying dc power. Efficient simulation of such power systems in commonly-used state-variable-based programs requires fast and accurate models of electrical machines and power electronic converters with compatible interfaces. As an alternative to the existing $qd$ and voltage-behind-reactance (VBR) machine models, this paper develops a constant-parameter VBR model for six-phase permanent magnet synchronous machines to offer computationally efficient interface. For system-level studies where the switching details of rectifiers can be neglected, a multiple-reference-frame parametric-average-value model is developed for the 12-pulse rectifiers that provides fast simulation and preserves the dominant ac harmonics of interest. The accuracy and numerical efficiency of the proposed machine-converter models are verified using the detailed and alternative existing models.},\n keywords={Numerical models;Computational modeling;Stator windings;Rectifiers;Rotors;Integrated circuit modeling;Constant parameter voltage behind reactance (CPVBR);parametric average-value modeling (PAVM), simulation;six-phase permanent magnet synchronous machine (PMSM);12-pulse rectifiers},\n doi={10.1109/TEC.2018.2829808},\n ISSN={1558-0059},\n month={Sep.},}\n\n Many advanced energy conversion systems utilize multiphase (e.g., six or more phases) electrical machines that feed high-count-pulse (e.g., 12 or more pulses) rectifiers for supplying dc power. Efficient simulation of such power systems in commonly-used state-variable-based programs requires fast and accurate models of electrical machines and power electronic converters with compatible interfaces. As an alternative to the existing $qd$ and voltage-behind-reactance (VBR) machine models, this paper develops a constant-parameter VBR model for six-phase permanent magnet synchronous machines to offer computationally efficient interface. For system-level studies where the switching details of rectifiers can be neglected, a multiple-reference-frame parametric-average-value model is developed for the 12-pulse rectifiers that provides fast simulation and preserves the dominant ac harmonics of interest. The accuracy and numerical efficiency of the proposed machine-converter models are verified using the detailed and alternative existing models.\n
\n\n\n\n \n\n \n \n Ebrahimi, S., Amiri, N., Huang, Y., Wang, L., & Jatskevich, J.\n\n\n \n \n \n \n Average-Value Modeling of Diode Rectifier Systems Under Asymmetrical Operation and Internal Faults.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Energy Conversion, 33(4): 1895-1906. Dec 2018.\n \n\n\n\n
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\n\n\n@ARTICLE{8353792,\n author={Ebrahimi, Seyyedmilad and Amiri, Navid and Huang, Yingwei and Wang, Liwei and Jatskevich, Juri},\n journal={IEEE Transactions on Energy Conversion}, \n title={Average-Value Modeling of Diode Rectifier Systems Under Asymmetrical Operation and Internal Faults}, \n year={2018},\n volume={33},\n number={4},\n pages={1895-1906},\n abstract={Line-commutated rectifiers (LCRs) are extensively utilized in exciters of large electrical machines, ac-dc power systems of ships, vehicles, aircraft, and many other industrial applications. Efficient and accurate computer simulations are necessary to analyze various aspects of such systems under both normal and unbalanced/faulty operating conditions. The so-called parametric average-value modeling (PAVM) technique has been recently developed and shown to provide accurate and computationally efficient models of power-electronic converters for system-level simulations. In this paper, the PAVM methodology is extended to LCRs with internal faults. The new formulation considers the asymmetrical operation of rectifiers by including the ac-side characteristic (i.e., 5th, 7th, etc.) and non-characteristic (i.e., 2nd, 3rd, 4th, etc.) harmonics in both positive and negative sequences as well as dc components that may be present on ac variables. The proposed PAVM is verified by experimental measurements and detailed model and is demonstrated to have excellent accuracy under various operating modes and fault configurations.},\n keywords={Harmonic analysis;Rectifiers;Computational modeling;Power system harmonics;Switches;Artificial neural networks;Asymmetric;internal faults;line-commutated rectifiers;non-characteristic harmonics;parametric average-value modeling},\n doi={10.1109/TEC.2018.2832652},\n ISSN={1558-0059},\n month={Dec},}\n\n Line-commutated rectifiers (LCRs) are extensively utilized in exciters of large electrical machines, ac-dc power systems of ships, vehicles, aircraft, and many other industrial applications. Efficient and accurate computer simulations are necessary to analyze various aspects of such systems under both normal and unbalanced/faulty operating conditions. The so-called parametric average-value modeling (PAVM) technique has been recently developed and shown to provide accurate and computationally efficient models of power-electronic converters for system-level simulations. In this paper, the PAVM methodology is extended to LCRs with internal faults. The new formulation considers the asymmetrical operation of rectifiers by including the ac-side characteristic (i.e., 5th, 7th, etc.) and non-characteristic (i.e., 2nd, 3rd, 4th, etc.) harmonics in both positive and negative sequences as well as dc components that may be present on ac variables. The proposed PAVM is verified by experimental measurements and detailed model and is demonstrated to have excellent accuracy under various operating modes and fault configurations.\n
\n\n\n\n \n\n \n \n Ebrahimi, S., Amiri, N., Jatskevich, J., & Wang, L.\n\n\n \n \n \n \n Simulation of Line-Commutated Rectifier Systems Using Fixed Time-Step without Zero-Crossing Events.\n \n \n \n\n\n \n\n\n\n In 2018 IEEE International Conference on Smart Energy Grid Engineering (SEGE), pages 195-199, Aug 2018. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{8499446,\n author={Ebrahimi, Seyyedmilad and Amiri, Navid and Jatskevich, Juri and Wang, Liwei},\n booktitle={2018 IEEE International Conference on Smart Energy Grid Engineering (SEGE)}, \n title={Simulation of Line-Commutated Rectifier Systems Using Fixed Time-Step without Zero-Crossing Events}, \n year={2018},\n volume={},\n number={},\n pages={195-199},\n abstract={Line-commutated rectifiers (LCRs) are widely used in many industrial applications and electronic loads. For analysis and simulation of power systems that include many switching converters, numerically efficient and accurate models of rectifiers are needed. The detailed switching models of LCRs in traditional electromagnetic transient (EMT) simulation programs (either state-variable-based or EMTP-type) require special handling of switching events (i.e., interpolation and/or use of small time-steps for zero crossing detection), which results in increased computational complexity. This paper presents the recently developed generalized parametric average-value model (GPAVM) of LCRs that is capable of predicting the ac harmonics of interest with good accuracy while using fairly large fixed time-steps without the need for handling the zero-crossing events. This feature represents an advantage over the established methods and may be utilized for more efficient simulation of power systems with many rectifier loads.},\n keywords={Rectifiers;Load modeling;Integrated circuit modeling;Computational modeling;Switches;Harmonic analysis;Power system harmonics;average-value model;fixed time-step;harmonics;line commutated rectifier;transient simulation},\n doi={10.1109/SEGE.2018.8499446},\n ISSN={2575-2693},\n month={Aug},}\n\n Line-commutated rectifiers (LCRs) are widely used in many industrial applications and electronic loads. For analysis and simulation of power systems that include many switching converters, numerically efficient and accurate models of rectifiers are needed. The detailed switching models of LCRs in traditional electromagnetic transient (EMT) simulation programs (either state-variable-based or EMTP-type) require special handling of switching events (i.e., interpolation and/or use of small time-steps for zero crossing detection), which results in increased computational complexity. This paper presents the recently developed generalized parametric average-value model (GPAVM) of LCRs that is capable of predicting the ac harmonics of interest with good accuracy while using fairly large fixed time-steps without the need for handling the zero-crossing events. This feature represents an advantage over the established methods and may be utilized for more efficient simulation of power systems with many rectifier loads.\n
\n\n\n\n \n\n \n \n Khan, U. A., Cha, H., Khan, A. A., Kim, H., Eberle, W., & Wang, L.\n\n\n \n \n \n \n An Improved Cascaded Dual-Buck Inverter.\n \n \n \n\n\n \n\n\n\n In 2018 International Power Electronics Conference (IPEC-Niigata 2018 -ECCE Asia), pages 927-933, May 2018. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{8507703,\n author={Khan, Usman Ali and Cha, Honnyong and Khan, Ashraf Ali and Kim, Heung-Geun and Eberle, Wilson and Wang, Liwei},\n booktitle={2018 International Power Electronics Conference (IPEC-Niigata 2018 -ECCE Asia)}, \n title={An Improved Cascaded Dual-Buck Inverter}, \n year={2018},\n volume={},\n number={},\n pages={927-933},\n abstract={The cascaded H-bridge inverter plays an important role for achieving a high output voltage using standard low voltage rating semiconductor devices in dc-ac power conversion. It possesses shoot-through problem, and requires dead-time in switching signals to solve it. The dead-time reduces practical voltage gain and output waveforms quality. To overcome these inconveniences, an improved cascaded dual-buck inverter having no shoot-through problem is presented in this paper. It can be operated without using dead-times in switching signals. Additionally, the proposed inverter is capable of using power MOSFETs without reverse recovery issues of their body diodes to boost efficiency and increase switching frequencies. Compared to the conventional dual-buck dc-ac inverter, the proposed inverter reduces the inverter volume and cost by using fewer inductors. To validate the feasibility of the proposed inverter simulation and experimental results are presented.},\n keywords={Inverters;Inductors;Switches;MOSFET;Pulse width modulation;Limiting;Dual-buck inverter;inductor;MOSFET;power density},\n doi={10.23919/IPEC.2018.8507703},\n ISSN={},\n month={May},}\n\n The cascaded H-bridge inverter plays an important role for achieving a high output voltage using standard low voltage rating semiconductor devices in dc-ac power conversion. It possesses shoot-through problem, and requires dead-time in switching signals to solve it. The dead-time reduces practical voltage gain and output waveforms quality. To overcome these inconveniences, an improved cascaded dual-buck inverter having no shoot-through problem is presented in this paper. It can be operated without using dead-times in switching signals. Additionally, the proposed inverter is capable of using power MOSFETs without reverse recovery issues of their body diodes to boost efficiency and increase switching frequencies. Compared to the conventional dual-buck dc-ac inverter, the proposed inverter reduces the inverter volume and cost by using fewer inductors. To validate the feasibility of the proposed inverter simulation and experimental results are presented.\n
\n\n\n\n \n\n \n \n Nowak, S., Tehrani, N., Metcalfe, M. S, Eberle, W., & Wang, L.\n\n\n \n \n \n \n Cloud-based DERMS Test Platform Using Real-time Power System Simulation.\n \n \n \n\n\n \n\n\n\n In 2018 IEEE Power & Energy Society General Meeting (PESGM), pages 1-5, Aug 2018. \n \n\n\n\n
\n\n\n\n \n\n \n \n doi\n \n \n\n \n link\n \n \n\n bibtex\n \n\n \n \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n \n \n \n \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{8585806,\n author={Nowak, Severin and Tehrani, Nima and Metcalfe, Malcolm S and Eberle, Wilson and Wang, Liwei},\n booktitle={2018 IEEE Power & Energy Society General Meeting (PESGM)}, \n title={Cloud-based DERMS Test Platform Using Real-time Power System Simulation}, \n year={2018},\n volume={},\n number={},\n pages={1-5},\n abstract={Effective software development of distributed energy resource management systems (DERMS) requires an adequate test environment to facilitate implementation and testing. As the power system with distributed energy resources (DER) is a complex physical system and access to real-world test environments is limited, it is of interest to use real-time simulation for DERMS development. This paper introduces a cloud-based DERMS test platform using an OPAL-RT simulator for hardware-in-the-loop testing. A phasor-domain model of a modified IEEE 34 node test feeder with DER is implemented within ePHASORsim and interfaced through a Modbus connection to an internet-of-things (IoT) solution of KMC Control. The DERMS by Enbala operates on the Amazon cloud and is interfaced to the IoT cloud over a proprietary API. This paper describes the test setup and provides results of a sanity test of the DERMS. In the sanity test, DERs are controlled to avoid reverse power flow at the substation during high DER generation periods. The real-time hardware-in-the-loop test results have verified the basic functionalities and operations of the cloud-based DERMS control platform.},\n keywords={Cloud computing;Real-time systems;Power grids;Computational modeling;Load modeling;Testing;Distributed energy resource management system;real-time simulation;hardware-in-the-loop;IoT cloud},\n doi={10.1109/PESGM.2018.8585806},\n ISSN={1944-9933},\n month={Aug},}\n\n Effective software development of distributed energy resource management systems (DERMS) requires an adequate test environment to facilitate implementation and testing. As the power system with distributed energy resources (DER) is a complex physical system and access to real-world test environments is limited, it is of interest to use real-time simulation for DERMS development. This paper introduces a cloud-based DERMS test platform using an OPAL-RT simulator for hardware-in-the-loop testing. A phasor-domain model of a modified IEEE 34 node test feeder with DER is implemented within ePHASORsim and interfaced through a Modbus connection to an internet-of-things (IoT) solution of KMC Control. The DERMS by Enbala operates on the Amazon cloud and is interfaced to the IoT cloud over a proprietary API. This paper describes the test setup and provides results of a sanity test of the DERMS. In the sanity test, DERs are controlled to avoid reverse power flow at the substation during high DER generation periods. The real-time hardware-in-the-loop test results have verified the basic functionalities and operations of the cloud-based DERMS control platform.\n
\n\n\n\n \n\n \n \n Monteiro, M. R., Reis Rodrigues, Y., Schumann Minami, J. P., Zambroni de Souza, A., Ribeiro, P. F., Wang, L., Eberle, W., & Bonatto, B. D.\n\n\n \n \n \n \n Unbalanced Frequency Dependent Load Flow for Microgrids.\n \n \n \n\n\n \n\n\n\n In 2018 IEEE Power & Energy Society General Meeting (PESGM), pages 1-5, Aug 2018. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{8586066,\n author={Monteiro, Maira Ribas and Reis Rodrigues, Yuri and Schumann Minami, Joseph P.O and Zambroni de Souza, A.C. and Ribeiro, Paulo F. and Wang, Liwei and Eberle, Wilson and Bonatto, Benedito Donizeti},\n booktitle={2018 IEEE Power & Energy Society General Meeting (PESGM)}, \n title={Unbalanced Frequency Dependent Load Flow for Microgrids}, \n year={2018},\n volume={},\n number={},\n pages={1-5},\n abstract={This work presents an unbalanced three-phase frequency dependent load flow for microgrids at distribution level considering the insertion of renewable energy sources, distributed generation and frequency dependent loads. To assess the frequency influence on microgrids, the IEEE 34 Bus test feeder was employed. Further, simulations were held for both traditional and frequency dependent load flow approaches. The results indicated that the frequency dependency interaction accounted by the proposed methodology provides a more realistic scenario leading to a better-conditioned microgrid operation, which is fundamental for islanded system studies when compared to the traditional approach, which provides a more pessimistic perspective.},\n keywords={Frequency dependency;load flow;microgrids},\n doi={10.1109/PESGM.2018.8586066},\n ISSN={1944-9933},\n month={Aug},}\n\n This work presents an unbalanced three-phase frequency dependent load flow for microgrids at distribution level considering the insertion of renewable energy sources, distributed generation and frequency dependent loads. To assess the frequency influence on microgrids, the IEEE 34 Bus test feeder was employed. Further, simulations were held for both traditional and frequency dependent load flow approaches. The results indicated that the frequency dependency interaction accounted by the proposed methodology provides a more realistic scenario leading to a better-conditioned microgrid operation, which is fundamental for islanded system studies when compared to the traditional approach, which provides a more pessimistic perspective.\n
\n\n\n\n \n\n \n \n Rodrigues, Y. R., Monteiro, M. R., Zambroni de Souza, A. C., Riberiro, P. F., Wang, L., & Eberle, W.\n\n\n \n \n \n \n Adaptative Secondary Control for Energy Storage in Island Microgrids.\n \n \n \n\n\n \n\n\n\n In 2018 IEEE Power & Energy Society General Meeting (PESGM), pages 1-5, Aug 2018. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{8586228,\n author={Rodrigues, Yuri R. and Monteiro, Maíra R. and Zambroni de Souza, A. C. and Riberiro, P. F. and Wang, Liwei and Eberle, Wilson},\n booktitle={2018 IEEE Power & Energy Society General Meeting (PESGM)}, \n title={Adaptative Secondary Control for Energy Storage in Island Microgrids}, \n year={2018},\n volume={},\n number={},\n pages={1-5},\n abstract={This paper proposes an adaptive secondary control to islanded microgrids focused on autonomy enhancement and power quality, thus establishing an increase in its survival upon being islanded and guaranteeing its operation within established limits. The proposed control defines the contribution parcel of each storage unit for the frequency regulation based on how much energy is available in each unit and the actual microgrids' frequency level. The influence among dispatchable units is also analyzed. To validate the results of the proposed control model, the comparison between a traditional and the proposed secondary control strategy is made. The modified IEEE 34 bus system considering the insertion of energy storages devices is employed as the case studies. The analyses were held for three scenarios of communication infrastructure: without communication, with implicit communication, and with full communication. The results show great improvement in autonomy when the proposed control method is implemented.},\n keywords={Microgrids;Frequency control;Energy storage;Control systems;Resilience;Adaptive control;microgrid;adaptative secondary control;autonomy;energy storage},\n doi={10.1109/PESGM.2018.8586228},\n ISSN={1944-9933},\n month={Aug},}\n\n This paper proposes an adaptive secondary control to islanded microgrids focused on autonomy enhancement and power quality, thus establishing an increase in its survival upon being islanded and guaranteeing its operation within established limits. The proposed control defines the contribution parcel of each storage unit for the frequency regulation based on how much energy is available in each unit and the actual microgrids' frequency level. The influence among dispatchable units is also analyzed. To validate the results of the proposed control model, the comparison between a traditional and the proposed secondary control strategy is made. The modified IEEE 34 bus system considering the insertion of energy storages devices is employed as the case studies. The analyses were held for three scenarios of communication infrastructure: without communication, with implicit communication, and with full communication. The results show great improvement in autonomy when the proposed control method is implemented.\n
\n\n\n\n \n\n \n \n Ebrahimi, S., Amiri, N., Jatskevich, J., & Wang, L.\n\n\n \n \n \n \n Parametric Average-Value Modeling of Single-Phase Line-Commutated Electronic Rectifier Circuits.\n \n \n \n\n\n \n\n\n\n In 2018 IEEE 9th Annual Information Technology, Electronics and Mobile Communication Conference (IEMCON), pages 626-631, Nov 2018. \n \n\n\n\n
\n\n\n\n \n\n \n \n doi\n \n \n\n \n link\n \n \n\n bibtex\n \n\n \n \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n \n \n \n \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{8614980,\n author={Ebrahimi, Seyyedmilad and Amiri, Navid and Jatskevich, Juri and Wang, Liwei},\n booktitle={2018 IEEE 9th Annual Information Technology, Electronics and Mobile Communication Conference (IEMCON)}, \n title={Parametric Average-Value Modeling of Single-Phase Line-Commutated Electronic Rectifier Circuits}, \n year={2018},\n volume={},\n number={},\n pages={626-631},\n abstract={Single-phase line-commutated rectifier loads are broadly used in many commercial and industrial systems. Study and analysis of such systems require accurate and efficient models of the rectifier circuits in simulation programs. The socalled parametric average-value modeling (PAVM) methodology has been introduced to remove discrete switching of power-electronic converters and shown in the prior literature to provide computationally efficient models for three-phase line-commutated rectifiers. In this paper, the PAVM methodology is applied to single-phase line-commutated rectifiers where the dominant ac-side harmonics are also considered. Using extensive experimental measurements and computer studies, the new PAVM of single-phase rectifiers is verified to provide excellent accuracy over the entire range of rectifier operating modes/conditions; meanwhile, being computationally more efficient than the traditional detailed models. The proposed methodology can be very useful for system-level studies of large distribution networks which may contain many switching power electronic converters and single-phase electronic loads, that are otherwise computationally expensive to simulate using conventional detailed models.},\n keywords={Rectifiers;Computational modeling;Load modeling;Integrated circuit modeling;Harmonic analysis;Predictive models;Switches;Average-value model;harmonic;line-commutated rectifier;simulation;single-phase},\n doi={10.1109/IEMCON.2018.8614980},\n ISSN={},\n month={Nov},}\n\n Single-phase line-commutated rectifier loads are broadly used in many commercial and industrial systems. Study and analysis of such systems require accurate and efficient models of the rectifier circuits in simulation programs. The socalled parametric average-value modeling (PAVM) methodology has been introduced to remove discrete switching of power-electronic converters and shown in the prior literature to provide computationally efficient models for three-phase line-commutated rectifiers. In this paper, the PAVM methodology is applied to single-phase line-commutated rectifiers where the dominant ac-side harmonics are also considered. Using extensive experimental measurements and computer studies, the new PAVM of single-phase rectifiers is verified to provide excellent accuracy over the entire range of rectifier operating modes/conditions; meanwhile, being computationally more efficient than the traditional detailed models. The proposed methodology can be very useful for system-level studies of large distribution networks which may contain many switching power electronic converters and single-phase electronic loads, that are otherwise computationally expensive to simulate using conventional detailed models.\n
\n\n\n\n \n\n \n \n Atighechi, H., Hu, P., Ebrahimi, S., Lu, J., Wang, G., & Wang, L.\n\n\n \n \n \n \n An effective load shedding remedial action scheme considering wind farms generation.\n \n \n \n\n\n \n\n\n\n International Journal of Electrical Power & Energy Systems, 95: 353–363. 2018.\n \n\n\n\n
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\n\n\n\n@article{atighechi2018effective,\n title={An effective load shedding remedial action scheme considering wind farms generation},\n author={Atighechi, Hamid and Hu, Po and Ebrahimi, Seyyedmilad and Lu, Jun and Wang, Guihua and Wang, Liwei},\n journal={International Journal of Electrical Power \\& Energy Systems},\n volume={95},\n pages={353--363},\n year={2018},\n publisher={Elsevier}\n}\n\n\n\n \n\n \n \n Shotorbani, A. M., Mohammadi-Ivatloo, B., Wang, L., Ghassem-Zadeh, S., & Hosseini, S. H.\n\n\n \n \n \n \n Distributed secondary control of battery energy storage systems in a stand-alone microgrid.\n \n \n \n\n\n \n\n\n\n IET Generation, Transmission & Distribution, 12(17): 3944–3953. 2018.\n \n\n\n\n
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\n\n\n\n@article{shotorbani2018distributed,\n title={Distributed secondary control of battery energy storage systems in a stand-alone microgrid},\n author={Shotorbani, Amin Mohammadpour and Mohammadi-Ivatloo, Behnam and Wang, Liwei and Ghassem-Zadeh, Saeid and Hosseini, Seyed Hossein},\n journal={IET Generation, Transmission \\& Distribution},\n volume={12},\n number={17},\n pages={3944--3953},\n year={2018},\n publisher={Wiley Online Library}\n}\n\n\n\n
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\n \n \n\n \n \n Wang, C., Fu, X., Li, P., Wu, J., & Wang, L.\n\n\n \n \n \n \n Multiscale Simulation of Power System Transients Based on the Matrix Exponential Function.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Systems, 32(3): 1913-1926. May 2017.\n \n\n\n\n
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\n\n\n@ARTICLE{7539283,\n author={Wang, Chengshan and Fu, Xiaopeng and Li, Peng and Wu, Jianzhong and Wang, Liwei},\n journal={IEEE Transactions on Power Systems}, \n title={Multiscale Simulation of Power System Transients Based on the Matrix Exponential Function}, \n year={2017},\n volume={32},\n number={3},\n pages={1913-1926},\n abstract={Power system electro-magnetic transient programs (EMTP) have been popular among researchers and practitioners due to their detailed component modeling and high simulation accuracy for complex system operations. Despite broad applications in simulations with wide range of timescales, the small discretization step of these programs makes their use very time-consuming for system studies with long time span. Facing the increasingly complex power system transient characteristics and simulation demands, a multiscale algorithm that integrates the simulations of the electromagnetic and slower electromechanical transients is desirable. The multiscale simulation algorithm preserves the high fidelity of the EMTP and attains higher efficiency for the overall transient simulation. In this paper, we achieve this goal by exploiting the unique properties of the matrix exponential function. The proposed algorithm is capable of utilizing large step sizes to speed up the simulation of slow dynamics, whereas the fast transients are accurately reconstructed through efficient dense output mechanism, which is built upon the matrix exponential function computation. Numerical studies including a large-scale wind farm simulation are conducted to demonstrate the effectiveness of the proposed multiscale algorithm.},\n keywords={Transient analysis;Power system dynamics;Numerical models;Heuristic algorithms;Mathematical model;Algorithm design and analysis;Dense output formula;electromagnetic transients;electromechanical transients;exponential integrators;multiscale simulation},\n doi={10.1109/TPWRS.2016.2598883},\n ISSN={1558-0679},\n month={May},}\n\n Power system electro-magnetic transient programs (EMTP) have been popular among researchers and practitioners due to their detailed component modeling and high simulation accuracy for complex system operations. Despite broad applications in simulations with wide range of timescales, the small discretization step of these programs makes their use very time-consuming for system studies with long time span. Facing the increasingly complex power system transient characteristics and simulation demands, a multiscale algorithm that integrates the simulations of the electromagnetic and slower electromechanical transients is desirable. The multiscale simulation algorithm preserves the high fidelity of the EMTP and attains higher efficiency for the overall transient simulation. In this paper, we achieve this goal by exploiting the unique properties of the matrix exponential function. The proposed algorithm is capable of utilizing large step sizes to speed up the simulation of slow dynamics, whereas the fast transients are accurately reconstructed through efficient dense output mechanism, which is built upon the matrix exponential function computation. Numerical studies including a large-scale wind farm simulation are conducted to demonstrate the effectiveness of the proposed multiscale algorithm.\n
\n\n\n\n \n\n \n \n Alam, M., Eberle, W., Gautam, D. S., & Botting, C.\n\n\n \n \n \n \n A Soft-Switching Bridgeless AC–DC Power Factor Correction Converter.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Electronics, 32(10): 7716-7726. Oct 2017.\n \n\n\n\n
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\n\n\n@ARTICLE{7755813,\n author={Alam, Muntasir and Eberle, Wilson and Gautam, Deepak S. and Botting, Chris},\n journal={IEEE Transactions on Power Electronics}, \n title={A Soft-Switching Bridgeless AC–DC Power Factor Correction Converter}, \n year={2017},\n volume={32},\n number={10},\n pages={7716-7726},\n abstract={A new soft-switching, bridgeless power factor correction (PFC) boost converter is proposed for power supply and battery charging applications. The converter operates in both pulse width modulation (PWM) mode and resonant mode each switching cycle, and utilizes standard average current mode control. The converter is bridgeless, therefore eliminating the need for a front-end diode bridge rectifier. It operates in continuous conduction mode and achieves zero voltage switching (ZVS) for all switches. The proposed converter also reduces the turn-off losses of the PWM switches, therefore nearly eliminating switching losses. The output diodes operate with controlled di/dt turn-off, which reduces reverse-recovery losses. The PWM switches of the proposed converter can be driven with the same PWM signal, enabling simplified control. The detailed operation of the proposed converter is presented, including the conditions for ZVS operation and a stress analysis for the circuit components. Experimental results are presented for a 650-W prototype at 150-kHz switching frequency, universal ac input, and 400-V dc output. The proposed converter shows about 1% better efficiency and lower device temperatures at full load and 100-V ac input (maximum loss operating point) compared with the conventional hard switched PFC boost converter.},\n keywords={Pulse width modulation;Semiconductor diodes;Resonant frequency;Zero voltage switching;Topology;Switching frequency;Bridge circuits;AC–DC converters;battery chargers;power factor correction (PFC);power supplies;resonant converters;soft-switching;zero current switching (ZCS);zero voltage switching (ZVS)},\n doi={10.1109/TPEL.2016.2632100},\n ISSN={1941-0107},\n month={Oct},}\n\n A new soft-switching, bridgeless power factor correction (PFC) boost converter is proposed for power supply and battery charging applications. The converter operates in both pulse width modulation (PWM) mode and resonant mode each switching cycle, and utilizes standard average current mode control. The converter is bridgeless, therefore eliminating the need for a front-end diode bridge rectifier. It operates in continuous conduction mode and achieves zero voltage switching (ZVS) for all switches. The proposed converter also reduces the turn-off losses of the PWM switches, therefore nearly eliminating switching losses. The output diodes operate with controlled di/dt turn-off, which reduces reverse-recovery losses. The PWM switches of the proposed converter can be driven with the same PWM signal, enabling simplified control. The detailed operation of the proposed converter is presented, including the conditions for ZVS operation and a stress analysis for the circuit components. Experimental results are presented for a 650-W prototype at 150-kHz switching frequency, universal ac input, and 400-V dc output. The proposed converter shows about 1% better efficiency and lower device temperatures at full load and 100-V ac input (maximum loss operating point) compared with the conventional hard switched PFC boost converter.\n
\n\n\n\n \n\n \n \n Alam, M., Eberle, W., Gautam, D. S., Botting, C., Dohmeier, N., & Musavi, F.\n\n\n \n \n \n \n A Hybrid Resonant Pulse-Width Modulation Bridgeless AC–DC Power Factor Correction Converter.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Industry Applications, 53(2): 1406-1415. March 2017.\n \n\n\n\n
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\n\n\n@ARTICLE{7781671,\n author={Alam, Muntasir and Eberle, Wilson and Gautam, Deepak S. and Botting, Chris and Dohmeier, Nicholas and Musavi, Fariborz},\n journal={IEEE Transactions on Industry Applications}, \n title={A Hybrid Resonant Pulse-Width Modulation Bridgeless AC–DC Power Factor Correction Converter}, \n year={2017},\n volume={53},\n number={2},\n pages={1406-1415},\n abstract={A hybrid resonant pulse-width modulation (PWM) bridgeless ac-dc power factor correction (PFC) boost converter is proposed for application in power supplies and battery chargers. The bridgeless operation of the proposed converter eliminates the need for the front-end diode bridge rectifier. The PWM switches share the same gating signal, so the converter does not need extra circuitry to sense the positive or negative ac input line-cycle operation. The resonant tank components are relatively small in size and, unlike a totem-pole PFC converter, the hybrid-resonant mode of operation alleviates the reverse-recovery losses for the body diodes of the PWM switches. The inherent inrush current-limiting capabilities improve the system reliability. Moreover, the converter architecture enables simple implementation of lightning and surge protection systems. To verify the proof of concept, experimental results are presented for a 650-W prototype at 70-kHz switching frequency, universal ac input, and 400-V dc output.},\n keywords={Surge protection;Surges;Topology;Pulse width modulation;Resonant frequency;Bridge circuits;Rectifiers;AC–DC converter;boost converter;bridgeless converter;continuous-conduction mode (CCM);dual-boost converter;hybrid resonant pulse-width modulation (HRPWM);power factor correction (PFC);semibridgeless converter},\n doi={10.1109/TIA.2016.2638806},\n ISSN={1939-9367},\n month={March},}\n\n A hybrid resonant pulse-width modulation (PWM) bridgeless ac-dc power factor correction (PFC) boost converter is proposed for application in power supplies and battery chargers. The bridgeless operation of the proposed converter eliminates the need for the front-end diode bridge rectifier. The PWM switches share the same gating signal, so the converter does not need extra circuitry to sense the positive or negative ac input line-cycle operation. The resonant tank components are relatively small in size and, unlike a totem-pole PFC converter, the hybrid-resonant mode of operation alleviates the reverse-recovery losses for the body diodes of the PWM switches. The inherent inrush current-limiting capabilities improve the system reliability. Moreover, the converter architecture enables simple implementation of lightning and surge protection systems. To verify the proof of concept, experimental results are presented for a 650-W prototype at 70-kHz switching frequency, universal ac input, and 400-V dc output.\n
\n\n\n\n \n\n \n \n Kerns, B., Lindsay, T., Williams, T., & Eberle, W.\n\n\n \n \n \n \n A control algorithm to reduce electric vehicle battery pack RMS currents enabling a minimally sized supercapacitor pack.\n \n \n \n\n\n \n\n\n\n In 2017 IEEE Transportation Electrification Conference and Expo (ITEC), pages 376-380, June 2017. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{7993300,\n author={Kerns, Brittney and Lindsay, Tobias and Williams, Todd and Eberle, Wilson},\n booktitle={2017 IEEE Transportation Electrification Conference and Expo (ITEC)}, \n title={A control algorithm to reduce electric vehicle battery pack RMS currents enabling a minimally sized supercapacitor pack}, \n year={2017},\n volume={},\n number={},\n pages={376-380},\n abstract={This paper presents a novel control algorithm that dynamically directs the current between a small supercapacitor / ultracapacitor pack and an electric vehicle battery to create an economical hybrid energy storage system. This has the potential to extend the service life of the battery by reducing the battery peak currents, adding value to the electric vehicle. To validate the effectiveness of the small SC pack on the battery's RMS and peak currents, simulations are presented using Powersim with drive cycle data from the Advanced Vehicle Simulator MATLAB application. The proposed algorithm demonstrates a 19 percent reduction in the battery pack RMS current while using an SC pack that has up to six times less total capacitance than existing SC-based hybrid energy storage systems.},\n keywords={Batteries;Supercapacitors;Capacitance;Heuristic algorithms;Algorithm design and analysis;Hybrid power systems;Hybrid Energy Storage System;Electric Vehicle;Supercapacitors;Ultracapacitors;Control Algorithm;Battery Service Life;Vehicle Simulation;Control Strategies},\n doi={10.1109/ITEC.2017.7993300},\n ISSN={},\n month={June},}\n\n This paper presents a novel control algorithm that dynamically directs the current between a small supercapacitor / ultracapacitor pack and an electric vehicle battery to create an economical hybrid energy storage system. This has the potential to extend the service life of the battery by reducing the battery peak currents, adding value to the electric vehicle. To validate the effectiveness of the small SC pack on the battery's RMS and peak currents, simulations are presented using Powersim with drive cycle data from the Advanced Vehicle Simulator MATLAB application. The proposed algorithm demonstrates a 19 percent reduction in the battery pack RMS current while using an SC pack that has up to six times less total capacitance than existing SC-based hybrid energy storage systems.\n
\n\n\n\n \n\n \n \n Yu, Y., Eberle, W., & Musavi, F.\n\n\n \n \n \n \n A discontinuous boost power factor correction conduction loss model.\n \n \n \n\n\n \n\n\n\n In 2017 IEEE Energy Conversion Congress and Exposition (ECCE), pages 251-256, Oct 2017. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{8095789,\n author={Yu, Yanqi and Eberle, Wilson and Musavi, Fariborz},\n booktitle={2017 IEEE Energy Conversion Congress and Exposition (ECCE)}, \n title={A discontinuous boost power factor correction conduction loss model}, \n year={2017},\n volume={},\n number={},\n pages={251-256},\n abstract={In this paper, a novel effective duty cycle method is introduced to predict the RMS and average current for power components in discontinuous conduction mode (DCM) AC-DC boost power factor correction (PFC) topologies. The proposed model can be used for power component conduction losses estimation. The RMS current and average current of power components are derived. PSIM simulation and experimental results are used to verify the accuracy of calculation. A DCM boost converter prototype which converts universal AC input voltage to 400 V DC bus was built and tested in order to verify the proposed model. Experimental results demonstrate that the proposed model can be used for accurate estimation of RMS and average currents for the boost PFC topology.},\n keywords={Inductors;Switches;Semiconductor diodes;Current measurement;Mathematical model;Power harmonic filters;Switching frequency;DCM PFC;loss calculation;boost converter},\n doi={10.1109/ECCE.2017.8095789},\n ISSN={},\n month={Oct},}\n\n In this paper, a novel effective duty cycle method is introduced to predict the RMS and average current for power components in discontinuous conduction mode (DCM) AC-DC boost power factor correction (PFC) topologies. The proposed model can be used for power component conduction losses estimation. The RMS current and average current of power components are derived. PSIM simulation and experimental results are used to verify the accuracy of calculation. A DCM boost converter prototype which converts universal AC input voltage to 400 V DC bus was built and tested in order to verify the proposed model. Experimental results demonstrate that the proposed model can be used for accurate estimation of RMS and average currents for the boost PFC topology.\n
\n\n\n\n \n\n \n \n Arshadi, S. A., Ordonez, M., Mohammadi, M., & Eberle, W.\n\n\n \n \n \n \n Efficiency improvement of three-phase LLC resonant converter using phase shedding.\n \n \n \n\n\n \n\n\n\n In 2017 IEEE Energy Conversion Congress and Exposition (ECCE), pages 3771-3775, Oct 2017. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{8096666,\n author={Arshadi, Sayed Abbas and Ordonez, Martin and Mohammadi, Mehdi and Eberle, Wilson},\n booktitle={2017 IEEE Energy Conversion Congress and Exposition (ECCE)}, \n title={Efficiency improvement of three-phase LLC resonant converter using phase shedding}, \n year={2017},\n volume={},\n number={},\n pages={3771-3775},\n abstract={One main advantage of three-phase LLC converters for high power applications is their full-load efficiency. However, issues with light load operation (i.e. low efficiency) requires investigation. In this paper, a new modulation strategy is proposed to improve the light load efficiency of three-phase LLC converters to achieve a better efficiency curve. The proposed strategy uses two different modulation techniques for the three-phase LLC converter: three phase and two phase modulations. Through these two operating modes, phase shedding for the three-phase LLC resonant converter is achieved. In order to validate the theoretical analysis, experimental results of a 3kW three-phase LLC resonant converter are provided. The results show light-load efficiency improvements of up to 2%.},\n keywords={RLC circuits;Topology;Equivalent circuits;Inductors;Windings;Phase modulation;Magnetic resonance},\n doi={10.1109/ECCE.2017.8096666},\n ISSN={},\n month={Oct},}\n\n One main advantage of three-phase LLC converters for high power applications is their full-load efficiency. However, issues with light load operation (i.e. low efficiency) requires investigation. In this paper, a new modulation strategy is proposed to improve the light load efficiency of three-phase LLC converters to achieve a better efficiency curve. The proposed strategy uses two different modulation techniques for the three-phase LLC converter: three phase and two phase modulations. Through these two operating modes, phase shedding for the three-phase LLC resonant converter is achieved. In order to validate the theoretical analysis, experimental results of a 3kW three-phase LLC resonant converter are provided. The results show light-load efficiency improvements of up to 2%.\n
\n\n\n\n \n\n \n \n Nowak, S., Metcalfe, M. S., Eberle, W., & Wang, L.\n\n\n \n \n \n \n Comparison of voltage control methods in distribution systems using Q-V based PI and droop controls of solar inverters.\n \n \n \n\n\n \n\n\n\n In 2017 IEEE Power & Energy Society General Meeting, pages 1-5, July 2017. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{8273969,\n author={Nowak, Severin and Metcalfe, Malcolm S. and Eberle, Wilson and Wang, Liwei},\n booktitle={2017 IEEE Power & Energy Society General Meeting}, \n title={Comparison of voltage control methods in distribution systems using Q-V based PI and droop controls of solar inverters}, \n year={2017},\n volume={},\n number={},\n pages={1-5},\n abstract={The increasing penetration of photovoltaic power generation in distribution systems causes serious voltage management issues. To mitigate the voltage variations due to solar generation intermittency, this paper introduces a PI-based reactive power control method of PV inverters. The proposed PI controller adjusts the reactive power injection of the solar inverters dynamically to drive the voltage at the Point of Common Coupling (PCC) to a target value. The simulation studies are performed to evaluate the proposed PI-based reactive power control using the IEEE 34 test feeder for a 24-hour period in OpenDSS and Matlab. The performance of the proposed PI controller is compared to the conventional PV inverter controls with no reactive power generation and with the Q-V-based droop control at different penetration levels. The case studies demonstrate that the proposed PI-based voltage control method reduces effectively the voltage deviations at the PCC of the PV inverters. The voltage profiles under the proposed PI controller have narrower variation bands compared with the conventional PV reactive power control methods particularly at high penetration levels of solar generation.},\n keywords={Inverters;Voltage control;Reactive power;Reactive power control;Power generation;Substations;Regulators;Reactive power control;Voltage control;Solar power generation;Distributed power generation;Power distribution},\n doi={10.1109/PESGM.2017.8273969},\n ISSN={1944-9933},\n month={July},}\n\n The increasing penetration of photovoltaic power generation in distribution systems causes serious voltage management issues. To mitigate the voltage variations due to solar generation intermittency, this paper introduces a PI-based reactive power control method of PV inverters. The proposed PI controller adjusts the reactive power injection of the solar inverters dynamically to drive the voltage at the Point of Common Coupling (PCC) to a target value. The simulation studies are performed to evaluate the proposed PI-based reactive power control using the IEEE 34 test feeder for a 24-hour period in OpenDSS and Matlab. The performance of the proposed PI controller is compared to the conventional PV inverter controls with no reactive power generation and with the Q-V-based droop control at different penetration levels. The case studies demonstrate that the proposed PI-based voltage control method reduces effectively the voltage deviations at the PCC of the PV inverters. The voltage profiles under the proposed PI controller have narrower variation bands compared with the conventional PV reactive power control methods particularly at high penetration levels of solar generation.\n
\n\n\n\n \n\n \n \n Rodrigues, Y. R, de Souza, A. Z., Ribeiro, P. F, Monteiro, M., Bosco, D., Eberle, W., & Metcalfe, M. S\n\n\n \n \n \n \n Impact of the Load Usage Context on Harmonic Generation.\n \n \n \n\n\n \n\n\n\n . 2017.\n \n\n\n\n
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\n\n\n\n@article{rodriguesimpact,\n title={Impact of the Load Usage Context on Harmonic Generation},\n author={Rodrigues, Yuri R and de Souza, AC Zambroni and Ribeiro, Paulo F and Monteiro, Ma{\\'\\i}ra R and Bosco, Dom and Eberle, Wilson and Metcalfe, Malcolm S},\n year={2017}\n}\n\n\n\n \n\n \n \n Nami, A., & Wang, L.\n\n\n \n \n \n \n Multilevel converter with hybrid full-bridge cells.\n \n \n \n\n\n \n\n\n\n July 25 2017.\n US Patent 9,716,425\n\n\n\n
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\n\n\n\n@misc{nami2017multilevel,\n title={Multilevel converter with hybrid full-bridge cells},\n author={Nami, Alireza and Wang, Liwei},\n year={2017},\n month=jul # "~25",\n publisher={Google Patents},\n note={US Patent 9,716,425}\n}\n\n\n\n \n\n \n \n Li, P., Wang, Z., Wang, C., Fu, X., Yu, H., & Wang, L.\n\n\n \n \n \n \n Synchronisation mechanism and interfaces design of multi-FPGA-based real-time simulator for microgrids.\n \n \n \n\n\n \n\n\n\n IET Generation, Transmission & Distribution, 11(12): 3088–3096. 2017.\n \n\n\n\n
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\n\n\n\n@article{li2017synchronisation,\n title={Synchronisation mechanism and interfaces design of multi-FPGA-based real-time simulator for microgrids},\n author={Li, Peng and Wang, Zhiying and Wang, Chengshan and Fu, Xiaopeng and Yu, Hao and Wang, Liwei},\n journal={IET Generation, Transmission \\& Distribution},\n volume={11},\n number={12},\n pages={3088--3096},\n year={2017},\n publisher={Wiley Online Library}\n}\n\n\n\n \n\n \n \n Meng, X., & Wang, L.\n\n\n \n \n \n \n Interfacing an EMT-type modular multilevel converter HVDC model in transient stability simulation.\n \n \n \n\n\n \n\n\n\n IET Generation, Transmission & Distribution, 11(12): 3002–3008. 2017.\n \n\n\n\n
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\n\n\n\n@article{meng2017interfacing,\n title={Interfacing an EMT-type modular multilevel converter HVDC model in transient stability simulation},\n author={Meng, Xuekun and Wang, Liwei},\n journal={IET Generation, Transmission \\& Distribution},\n volume={11},\n number={12},\n pages={3002--3008},\n year={2017},\n publisher={Wiley Online Library}\n}\n\n\n\n
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\n \n \n\n \n \n Therrien, F., Wang, L., Chapariha, M., & Jatskevich, J.\n\n\n \n \n \n \n Constant-Parameter Interfacing of Induction Machine Models Considering Main Flux Saturation in EMTP-Type Programs.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Energy Conversion, 31(1): 12-26. March 2016.\n \n\n\n\n
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\n\n\n@ARTICLE{7243328,\n author={Therrien, Francis and Wang, Liwei and Chapariha, Mehrdad and Jatskevich, Juri},\n journal={IEEE Transactions on Energy Conversion}, \n title={Constant-Parameter Interfacing of Induction Machine Models Considering Main Flux Saturation in EMTP-Type Programs}, \n year={2016},\n volume={31},\n number={1},\n pages={12-26},\n abstract={The state-of-the-art magnetically linear voltage-behind-reactance (VBR) and phase-domain induction machine models for nodal-analysis-based electromagnetic transients programs (EMTP-type) offer an excellent combination of numerical stability, accuracy, and efficiency. However, incorporation of magnetic saturation in these models renders their interfacing circuits dependent on the operating segment of the piecewise-linear saturation characteristics. Consequently, refactorization of the network's conductance matrix is required during simulations, which reduces the numerical efficiency of the overall solution and limits the models' range of application. This paper presents a new VBR squirrel-cage induction machine model that includes main flux saturation and possesses a saturation-independent constant-parameter interfacing circuit. Case studies in PSCAD/EMTDC demonstrate that the proposed model offers similar numerical stability and accuracy to the state-of-the-art models, while considerably increasing simulation speed for practical multimachine systems.},\n keywords={Numerical models;Mathematical model;Integrated circuit modeling;Rotors;Induction machines;Saturation magnetization;Stators;Constant-parameter interfacing circuit;electromagnetic transients program (EMTP);induction machine;main flux saturation;voltage-behind-reactance (VBR) model;Constant-parameter interfacing circuit;electromagnetic transients program (EMTP);induction machine;main flux saturation;voltage-behind-reactance (VBR) model},\n doi={10.1109/TEC.2015.2443118},\n ISSN={1558-0059},\n month={March},}\n\n The state-of-the-art magnetically linear voltage-behind-reactance (VBR) and phase-domain induction machine models for nodal-analysis-based electromagnetic transients programs (EMTP-type) offer an excellent combination of numerical stability, accuracy, and efficiency. However, incorporation of magnetic saturation in these models renders their interfacing circuits dependent on the operating segment of the piecewise-linear saturation characteristics. Consequently, refactorization of the network's conductance matrix is required during simulations, which reduces the numerical efficiency of the overall solution and limits the models' range of application. This paper presents a new VBR squirrel-cage induction machine model that includes main flux saturation and possesses a saturation-independent constant-parameter interfacing circuit. Case studies in PSCAD/EMTDC demonstrate that the proposed model offers similar numerical stability and accuracy to the state-of-the-art models, while considerably increasing simulation speed for practical multimachine systems.\n
\n\n\n\n \n\n \n \n Ebrahimi, S., Amiri, N., Atighechi, H., Wang, L., & Jatskevich, J.\n\n\n \n \n \n \n Verification of Parametric Average-Value Model of Thyristor-Controlled Rectifier Systems for Variable-Frequency Wind Generation Systems.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Energy Conversion, 31(1): 401-403. March 2016.\n \n\n\n\n
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\n\n\n@ARTICLE{7299628,\n author={Ebrahimi, Seyyedmilad and Amiri, Navid and Atighechi, Hamid and Wang, Liwei and Jatskevich, Juri},\n journal={IEEE Transactions on Energy Conversion}, \n title={Verification of Parametric Average-Value Model of Thyristor-Controlled Rectifier Systems for Variable-Frequency Wind Generation Systems}, \n year={2016},\n volume={31},\n number={1},\n pages={401-403},\n abstract={Line-commutated thyristor-controlled rectifiers are often used in many industrial and renewable energy applications where controllable dc voltage is required. The derivation of accurate dynamic average-value models for thyristor-controlled systems is challenging. The recently proposed parametric average value modeling (PAVM) avoids the discrete switching states of the converters and results in computationally efficient models that are suitable for system level studies. This paper extends the PAVM recently developed for synchronous-machine-fed thyristor-controlled-rectifier systems to a permanent magnet synchronous machine wind generation system where the operation in variable speed and frequency is required.},\n keywords={Computational modeling;Transient analysis;Frequency control;Numerical models;Switches;Generators;Voltage control;Parametric average-value model;thyristor-controlled rectifiers;variable frequency;wind generation;Parametric average-value model;thyristor-controlled rectifiers;variable frequency;wind generation},\n doi={10.1109/TEC.2015.2484065},\n ISSN={1558-0059},\n month={March},}\n\n Line-commutated thyristor-controlled rectifiers are often used in many industrial and renewable energy applications where controllable dc voltage is required. The derivation of accurate dynamic average-value models for thyristor-controlled systems is challenging. The recently proposed parametric average value modeling (PAVM) avoids the discrete switching states of the converters and results in computationally efficient models that are suitable for system level studies. This paper extends the PAVM recently developed for synchronous-machine-fed thyristor-controlled-rectifier systems to a permanent magnet synchronous machine wind generation system where the operation in variable speed and frequency is required.\n
\n\n\n\n \n\n \n \n Yu, Y., Saasaa, R., & Eberle, W.\n\n\n \n \n \n \n A series resonant circuit for voltage equalization of series connected energy storage devices.\n \n \n \n\n\n \n\n\n\n In 2016 IEEE Applied Power Electronics Conference and Exposition (APEC), pages 1286-1291, March 2016. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{7468034,\n author={Yu, Yanqi and Saasaa, Raed and Eberle, Wilson},\n booktitle={2016 IEEE Applied Power Electronics Conference and Exposition (APEC)}, \n title={A series resonant circuit for voltage equalization of series connected energy storage devices}, \n year={2016},\n volume={},\n number={},\n pages={1286-1291},\n abstract={In this paper, a novel cell voltage equalizer using a series LC resonant converter topology is proposed for a series connection of energy storage devices, namely battery, or supercapacitor cells. The objective of the target project is to design an active voltage equalization circuit that is low cost, small in size and achieves a short voltage equalization time. The target application is electric vehicles. Compared to existing solutions, the series LC resonant converter eliminates the complexity of multi-winding transformers and it can balance series connected energy storage devices quickly by transporting energy successively between the lowest and highest charge cell pairs. The circuit operation and a theoretical analysis is provided. Simulation and experimental results are presented for a circuit balancing three supercapacitors demonstrating from an initial voltage difference of 527 mV to a final difference of 10 mV in 900 seconds.},\n keywords={Supercapacitors;Inductors;Switches;Topology;Batteries;Supercapacitor;resonant converter;voltage equalization;voltage deviation},\n doi={10.1109/APEC.2016.7468034},\n ISSN={},\n month={March},}\n\n In this paper, a novel cell voltage equalizer using a series LC resonant converter topology is proposed for a series connection of energy storage devices, namely battery, or supercapacitor cells. The objective of the target project is to design an active voltage equalization circuit that is low cost, small in size and achieves a short voltage equalization time. The target application is electric vehicles. Compared to existing solutions, the series LC resonant converter eliminates the complexity of multi-winding transformers and it can balance series connected energy storage devices quickly by transporting energy successively between the lowest and highest charge cell pairs. The circuit operation and a theoretical analysis is provided. Simulation and experimental results are presented for a circuit balancing three supercapacitors demonstrating from an initial voltage difference of 527 mV to a final difference of 10 mV in 900 seconds.\n
\n\n\n\n \n\n \n \n Nawaz, M., Chen, N., Chimento, F., & Wang, L.\n\n\n \n \n \n \n Static and Dynamic Characterization of High Power Silicon Carbide BJT Modules.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Industry Applications, 52(6): 4990-4998. Nov 2016.\n \n\n\n\n
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\n\n\n@ARTICLE{7544528,\n author={Nawaz, Muhammad and Chen, Nan and Chimento, Filippo and Wang, Liwei},\n journal={IEEE Transactions on Industry Applications}, \n title={Static and Dynamic Characterization of High Power Silicon Carbide BJT Modules}, \n year={2016},\n volume={52},\n number={6},\n pages={4990-4998},\n abstract={Silicon carbide (SiC) based power semiconductor devices are now considered as key components for future power applications where high power density, high temperature, and high ruggedness against radiation are key parameters, thanks to the exceptional material properties including lower conduction and switching losses offered by the SiC devices. This paper deals with static and dynamic measurements performed for SiC-based bipolar junction transistors power modules with voltage rating 1200 V and current rating 800 A. The power modules are fabricated in flexible half-bridge configuration in order to allow either full power module with 2400 V and 800 A as one power switch or by using two parallel 1200 V and 400 A half-bridge legs. Results from engineering samples show overall good confidence as promised by the manufacturer for most of the transistor samples. A 40-50% reduction in the current gain was observed when temperature was increased to 475 K as expected. Bipolar devices have been found out fairly stable under continuous static operation at nominal current levels.},\n keywords={Silicon carbide;Junctions;Multichip modules;Switches;Performance evaluation;Transistors;Silicon;Bipolar junction transistors (BJTs);power semiconductor modules;silicon carbide (SiC);4H-SiC BJTs},\n doi={10.1109/TIA.2016.2600651},\n ISSN={1939-9367},\n month={Nov},}\n\n Silicon carbide (SiC) based power semiconductor devices are now considered as key components for future power applications where high power density, high temperature, and high ruggedness against radiation are key parameters, thanks to the exceptional material properties including lower conduction and switching losses offered by the SiC devices. This paper deals with static and dynamic measurements performed for SiC-based bipolar junction transistors power modules with voltage rating 1200 V and current rating 800 A. The power modules are fabricated in flexible half-bridge configuration in order to allow either full power module with 2400 V and 800 A as one power switch or by using two parallel 1200 V and 400 A half-bridge legs. Results from engineering samples show overall good confidence as promised by the manufacturer for most of the transistor samples. A 40-50% reduction in the current gain was observed when temperature was increased to 475 K as expected. Bipolar devices have been found out fairly stable under continuous static operation at nominal current levels.\n
\n\n\n\n \n\n \n \n Ebrahimi, S., Amiri, N., Atighechi, H., Jatskevich, J., & Wang, L.\n\n\n \n \n \n \n Parametric average-value modeling of AC-AC matrix converters.\n \n \n \n\n\n \n\n\n\n In 2016 IEEE 17th Workshop on Control and Modeling for Power Electronics (COMPEL), pages 1-7, June 2016. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{7556778,\n author={Ebrahimi, Seyyedmilad and Amiri, Navid and Atighechi, Hamid and Jatskevich, Juri and Wang, Liwei},\n booktitle={2016 IEEE 17th Workshop on Control and Modeling for Power Electronics (COMPEL)}, \n title={Parametric average-value modeling of AC-AC matrix converters}, \n year={2016},\n volume={},\n number={},\n pages={1-7},\n abstract={Matrix converters are becoming increasingly considered in AC-AC energy conversion applications where they can supply loads with variable voltages in a broad range of frequencies. For simulation of power systems, detailed models of these switching converters can be utilized. Despite providing high accuracy, the detailed models introduce a large number of discrete switching events in the simulation. Handling all the repeated switching slows down the simulation, creating a great challenge for system-level computer studies. To alleviate this computational burden, the so-called parametric average-value modeling (PAVM) technique has been developed to provide sufficiently accurate and fast models of power electronic converters. In the past, the PAVM has been extensively developed for DC-DC and AC-DC converters and systems with their applications. In this paper, the PAVM methodology is extended to model AC-AC matrix converters. Excellent accuracy and superior numerical performance of the proposed PAVM of matrix converter are verified against the detailed model.},\n keywords={Matrix converters;Computational modeling;Numerical models;Switches;Load modeling;Frequency conversion;Switching converters;AC-AC conversion;average-value modeling;matrix converter;parametric approach},\n doi={10.1109/COMPEL.2016.7556778},\n ISSN={},\n month={June},}\n\n Matrix converters are becoming increasingly considered in AC-AC energy conversion applications where they can supply loads with variable voltages in a broad range of frequencies. For simulation of power systems, detailed models of these switching converters can be utilized. Despite providing high accuracy, the detailed models introduce a large number of discrete switching events in the simulation. Handling all the repeated switching slows down the simulation, creating a great challenge for system-level computer studies. To alleviate this computational burden, the so-called parametric average-value modeling (PAVM) technique has been developed to provide sufficiently accurate and fast models of power electronic converters. In the past, the PAVM has been extensively developed for DC-DC and AC-DC converters and systems with their applications. In this paper, the PAVM methodology is extended to model AC-AC matrix converters. Excellent accuracy and superior numerical performance of the proposed PAVM of matrix converter are verified against the detailed model.\n
\n\n\n\n \n\n \n \n Ebrahimi, S., Amiri, N., Huang, Y., Jatskevich, J., & Wang, L.\n\n\n \n \n \n \n Efficient simulation of wind farms using switching reduced models of converters and VBR formulation of six-phase PM synchronous generators.\n \n \n \n\n\n \n\n\n\n In 2016 IEEE Canadian Conference on Electrical and Computer Engineering (CCECE), pages 1-4, May 2016. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{7726805,\n author={Ebrahimi, Seyyedmilad and Amiri, Navid and Huang, Yingwei and Jatskevich, Juri and Wang, Liwei},\n booktitle={2016 IEEE Canadian Conference on Electrical and Computer Engineering (CCECE)}, \n title={Efficient simulation of wind farms using switching reduced models of converters and VBR formulation of six-phase PM synchronous generators}, \n year={2016},\n volume={},\n number={},\n pages={1-4},\n abstract={Wind generation systems with variable frequency generators commonly utilize several power electronics converters. Using numerically efficient models for converters and electrical machines can decrease simulation time of wind farms. In this paper, a voltage-behind-reactance model is developed for a six-phase permanent magnet synchronous generator. Then, a multiresolution simulation methodology is presented which utilizes different combinations of detailed and average-value models of twelve-pulse rectifier and three-phase inverter systems in conjunction with different six-phase machine models. The presented models are verified through simulations to provide superior performance in terms of speed and numerical efficiency.},\n keywords={Decision support systems;Handheld computers;Manuals;Indexes;Zirconium;Conferences;Multi-resolution modeling;parametric average-value modeling (PAVM);six-phase permanent magnet synchronous machines;twelve-pulse rectifiers;voltage behind reactance (VBR) formulation},\n doi={10.1109/CCECE.2016.7726805},\n ISSN={},\n month={May},}\n\n Wind generation systems with variable frequency generators commonly utilize several power electronics converters. Using numerically efficient models for converters and electrical machines can decrease simulation time of wind farms. In this paper, a voltage-behind-reactance model is developed for a six-phase permanent magnet synchronous generator. Then, a multiresolution simulation methodology is presented which utilizes different combinations of detailed and average-value models of twelve-pulse rectifier and three-phase inverter systems in conjunction with different six-phase machine models. The presented models are verified through simulations to provide superior performance in terms of speed and numerical efficiency.\n
\n\n\n\n \n\n \n \n Ebrahimi, S., Amiri, N., Huang, Y., Chapariha, M., Jatskevich, J., & Wang, L.\n\n\n \n \n \n \n Multi-resolution modeling of variable speed six-phase synchronous generator with regulated 400 Hz AC system.\n \n \n \n\n\n \n\n\n\n In 2016 IEEE Power and Energy Society General Meeting (PESGM), pages 1-5, July 2016. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{7741098,\n author={Ebrahimi, Seyyedmilad and Amiri, Navid and Yingwei Huang and Chapariha, Mehrdad and Jatskevich, Juri and Wang, Liwei},\n booktitle={2016 IEEE Power and Energy Society General Meeting (PESGM)}, \n title={Multi-resolution modeling of variable speed six-phase synchronous generator with regulated 400 Hz AC system}, \n year={2016},\n volume={},\n number={},\n pages={1-5},\n abstract={High-pulse line-commutated rectifiers are utilized in many high-power applications. Specifically, twelve-pulse rectifiers fed with six-phase synchronous generators are very popular in marine and aircraft power systems with variable frequency operation. Using numerically efficient averaged models of power electronics converters considerably saves simulation time when a large number of switching converters is used. Herein, a multi-resolution simulation methodology is presented and its application in efficient simulation of a twelve-pulse rectifier and an inverter system is demonstrated. The user can select the simulation resolution (level of details) for each components of the system, as desired. Superior performance of different switching-reduced models is demonstrated for variable frequency operation in terms of accuracy and CPU efficiency.},\n keywords={Inverters;Rectifiers;Computational modeling;Numerical models;Atmospheric modeling;Power systems;Switches;Multi-resolution modeling;parametric average-value modeling;six-phase synchronous machines;twelve-pulse rectifiers;variable frequency},\n doi={10.1109/PESGM.2016.7741098},\n ISSN={1944-9933},\n month={July},}\n\n High-pulse line-commutated rectifiers are utilized in many high-power applications. Specifically, twelve-pulse rectifiers fed with six-phase synchronous generators are very popular in marine and aircraft power systems with variable frequency operation. Using numerically efficient averaged models of power electronics converters considerably saves simulation time when a large number of switching converters is used. Herein, a multi-resolution simulation methodology is presented and its application in efficient simulation of a twelve-pulse rectifier and an inverter system is demonstrated. The user can select the simulation resolution (level of details) for each components of the system, as desired. Superior performance of different switching-reduced models is demonstrated for variable frequency operation in terms of accuracy and CPU efficiency.\n
\n\n\n\n \n\n \n \n Saasaa, R., Eberle, W., & Agamy, M.\n\n\n \n \n \n \n A single-stage interleaved LLC PFC converter.\n \n \n \n\n\n \n\n\n\n In 2016 IEEE Energy Conversion Congress and Exposition (ECCE), pages 1-6, Sep. 2016. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{7854785,\n author={Saasaa, Raed and Eberle, Wilson and Agamy, Mohammed},\n booktitle={2016 IEEE Energy Conversion Congress and Exposition (ECCE)}, \n title={A single-stage interleaved LLC PFC converter}, \n year={2016},\n volume={},\n number={},\n pages={1-6},\n abstract={This paper presents a novel single-stage AC/DC converter that can achieve high power factor with reduced switching losses for semiconductor devices. The topology is derived by integrating the interleaved boost-type PFC and full bridge LLC resonant converters. Due to interleaving at the input, the converter exhibits less input current ripple compared to the existing single stage topologies. Therefore, it is suitable for applications up to approximately 500 W. A detailed analysis of the operation modes is presented. Also, a 350-W prototype is designed at (120 V) input AC voltage to verify the effectiveness of the topology.},\n keywords={Topology;Inductors;Bridge circuits;Voltage control;Switches;Capacitors;Switching frequency},\n doi={10.1109/ECCE.2016.7854785},\n ISSN={},\n month={Sep.},}\n\n This paper presents a novel single-stage AC/DC converter that can achieve high power factor with reduced switching losses for semiconductor devices. The topology is derived by integrating the interleaved boost-type PFC and full bridge LLC resonant converters. Due to interleaving at the input, the converter exhibits less input current ripple compared to the existing single stage topologies. Therefore, it is suitable for applications up to approximately 500 W. A detailed analysis of the operation modes is presented. Also, a 350-W prototype is designed at (120 V) input AC voltage to verify the effectiveness of the topology.\n
\n\n\n\n \n\n \n \n Shotorbani, A. M., Ivatloo, B., Wang, L., & Zadeh, S. G.\n\n\n \n \n \n \n Decentralized voltage control in smart grids.\n \n \n \n\n\n \n\n\n\n Power Quality in Future Electrical Power Systems. IET Energy Engineering Series, 92: 305–341. 2016.\n \n\n\n\n
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\n\n\n\n@article{shotorbani2016decentralized,\n title={Decentralized voltage control in smart grids},\n author={Shotorbani, Amin Mohammadpour and Ivatloo, BM and Wang, Liwei and Zadeh, Saeid Ghassem},\n journal={Power Quality in Future Electrical Power Systems. IET Energy Engineering Series},\n volume={92},\n pages={305--341},\n year={2016}\n}\n\n\n\n \n\n \n \n Nami, A., & Wang, L.\n\n\n \n \n \n \n Converter cell with reduced power losses, high voltage multilevel converter and associated method.\n \n \n \n\n\n \n\n\n\n October 25 2016.\n US Patent 9,479,076\n\n\n\n
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\n\n\n\n@misc{nami2016converter,\n title={Converter cell with reduced power losses, high voltage multilevel converter and associated method},\n author={Nami, Alireza and Wang, Liwei},\n year={2016},\n month=oct # "~25",\n publisher={Google Patents},\n note={US Patent 9,479,076}\n}\n\n\n\n
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\n \n \n\n \n \n Chen, N., Chimento, F., Nawaz, M., & Wang, L.\n\n\n \n \n \n \n Dynamic Characterization of Parallel-Connected High-Power IGBT Modules.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Industry Applications, 51(1): 539-546. Jan 2015.\n \n\n\n\n
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\n\n\n@ARTICLE{6828767,\n author={Chen, Nan and Chimento, Filippo and Nawaz, Muhammad and Wang, Liwei},\n journal={IEEE Transactions on Industry Applications}, \n title={Dynamic Characterization of Parallel-Connected High-Power IGBT Modules}, \n year={2015},\n volume={51},\n number={1},\n pages={539-546},\n abstract={In high-power converter design, insulated gate bipolar transistor (IGBT) modules are often operated in parallel to reach high output currents. Evaluating the electrical and thermal behavior of the parallel IGBTs is crucial for the design and reliable operation of converter systems. This paper investigates the static and dynamic characterization of parallel IGBTs and the influence of the electrical parameters on the IGBT behavior. Si-based IGBT power modules with voltage rating of 4.5 kV and current rating of 1 kA are used for the experimental evaluation of module parallel connections. Parallel-connected modules have been driven by several commercial IGBT gate units at various dc-link voltages and current levels and with different temperatures. The tested IGBT gate units show good current sharing performance between the two parallel modules. Other important influencing factors such as busbar design layout, stray inductance variation, and gate driving are also investigated for parallel connections of IGBT modules. Finally, the switching energy of the parallel modules is extracted for IGBTs and diodes under different conditions.},\n keywords={Insulated gate bipolar transistors;Logic gates;Switches;Voltage measurement;Inductance;Semiconductor diodes;Resistors;Dynamic characterization;gate driving;high-power converter;insulated-gate bipolar transistors (IGBTs);parallel connection;power module},\n doi={10.1109/TIA.2014.2330075},\n ISSN={1939-9367},\n month={Jan},}\n\n In high-power converter design, insulated gate bipolar transistor (IGBT) modules are often operated in parallel to reach high output currents. Evaluating the electrical and thermal behavior of the parallel IGBTs is crucial for the design and reliable operation of converter systems. This paper investigates the static and dynamic characterization of parallel IGBTs and the influence of the electrical parameters on the IGBT behavior. Si-based IGBT power modules with voltage rating of 4.5 kV and current rating of 1 kA are used for the experimental evaluation of module parallel connections. Parallel-connected modules have been driven by several commercial IGBT gate units at various dc-link voltages and current levels and with different temperatures. The tested IGBT gate units show good current sharing performance between the two parallel modules. Other important influencing factors such as busbar design layout, stray inductance variation, and gate driving are also investigated for parallel connections of IGBT modules. Finally, the switching energy of the parallel modules is extracted for IGBTs and diodes under different conditions.\n
\n\n\n\n \n\n \n \n Ebrahimi, S., Amiri, N., Atighechi, H., Jatskevich, J., & Wang, L.\n\n\n \n \n \n \n Performance verification of parametric average-value model of line-commutated rectifiers under unbalanced conditions.\n \n \n \n\n\n \n\n\n\n In 2015 IEEE 16th Workshop on Control and Modeling for Power Electronics (COMPEL), pages 1-6, July 2015. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{7236467,\n author={Ebrahimi, Seyyedmilad and Amiri, Navid and Atighechi, Hamid and Jatskevich, Juri and Wang, Liwei},\n booktitle={2015 IEEE 16th Workshop on Control and Modeling for Power Electronics (COMPEL)}, \n title={Performance verification of parametric average-value model of line-commutated rectifiers under unbalanced conditions}, \n year={2015},\n volume={},\n number={},\n pages={1-6},\n abstract={The wide use of line-commutated rectifiers in large scale industrial applications has created the need for accurate and computationally efficient models in power electronics simulation modeling and simulation programs. The switch-level detailed models of such rectifier systems can be readily implemented using commercially available transient simulation packages. To improve the simulation efficiency for the transient studies, the so-called parametric average-value modeling (PAVM) technique has been developed. The PAVM provides models with accurate steady-state and transient simulation results with considerably lower mathematical complexity and computational burden, avoiding the discrete switching states of converters, making it suitable for large-scale system-level studies. In this paper, performance of PAVM of thyristor-controlled rectifiers is investigated for unbalanced conditions. The results show that the PAVM of thyristor-controlled rectifier provides a good approximation of transient and steady-state operation behavior of the detailed model even under unbalanced conditions while demonstrating improvements in terms of numerical efficiency and simulation speed.},\n keywords={Mathematical model;Computational modeling;Rectifiers;Analytical models;Numerical models;Impedance;Load modeling;Input impedance mapping;parametric average-value modeling;thyristor-controlled rectifiers;unbalanced conditions},\n doi={10.1109/COMPEL.2015.7236467},\n ISSN={1093-5142},\n month={July},}\n\n The wide use of line-commutated rectifiers in large scale industrial applications has created the need for accurate and computationally efficient models in power electronics simulation modeling and simulation programs. The switch-level detailed models of such rectifier systems can be readily implemented using commercially available transient simulation packages. To improve the simulation efficiency for the transient studies, the so-called parametric average-value modeling (PAVM) technique has been developed. The PAVM provides models with accurate steady-state and transient simulation results with considerably lower mathematical complexity and computational burden, avoiding the discrete switching states of converters, making it suitable for large-scale system-level studies. In this paper, performance of PAVM of thyristor-controlled rectifiers is investigated for unbalanced conditions. The results show that the PAVM of thyristor-controlled rectifier provides a good approximation of transient and steady-state operation behavior of the detailed model even under unbalanced conditions while demonstrating improvements in terms of numerical efficiency and simulation speed.\n
\n\n\n\n \n\n \n \n Ebrahimi, S., Amiri, N., Atighechi, H., Jatskevich, J., & Wang, L.\n\n\n \n \n \n \n Parametric average value modeling of high power AC/AC cyclo converters.\n \n \n \n\n\n \n\n\n\n In 2015 IEEE 16th Workshop on Control and Modeling for Power Electronics (COMPEL), pages 1-6, July 2015. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{7236489,\n author={Ebrahimi, Seyyedmilad and Amiri, Navid and Atighechi, Hamid and Jatskevich, Juri and Wang, Liwei},\n booktitle={2015 IEEE 16th Workshop on Control and Modeling for Power Electronics (COMPEL)}, \n title={Parametric average value modeling of high power AC/AC cyclo converters}, \n year={2015},\n volume={},\n number={},\n pages={1-6},\n abstract={Line-commutated thyristor-controlled AC/DC and AC/AC converters are commonly used in high power industrial applications. Therefore, analyzing industrial distribution systems requires accurate and computationally efficient models that may be easily implemented in simulation software packages. Average-value models (AVMs) avoid the discrete switching of the converters, provide accurate system-level steady-state and transient simulation results, which make such models particularly suitable for large scale studies of power electronic systems. Parametric average value modeling (PAVM) is one of very promising techniques resulting in accurate models that are also considerably simpler in terms of mathematical complexity. The PAVMs for AC/DC converter systems have been thoroughly analyzed in literature. This paper proposes a new PAVM for AC/AC cyclo-converters which supply the load at lower AC frequencies. The superior performance and computational advantages of the proposed PAVM of cyclo-converters are verified against the detailed model in terms of CPU efficiency as well as numerical accuracy.},\n keywords={Load modeling;Computational modeling;Numerical models;Predictive models;Indexes;Transient analysis;Steady-state;AC/AC converters;Average-value modeling;cyclo-converters;line-commutated converters},\n doi={10.1109/COMPEL.2015.7236489},\n ISSN={1093-5142},\n month={July},}\n\n Line-commutated thyristor-controlled AC/DC and AC/AC converters are commonly used in high power industrial applications. Therefore, analyzing industrial distribution systems requires accurate and computationally efficient models that may be easily implemented in simulation software packages. Average-value models (AVMs) avoid the discrete switching of the converters, provide accurate system-level steady-state and transient simulation results, which make such models particularly suitable for large scale studies of power electronic systems. Parametric average value modeling (PAVM) is one of very promising techniques resulting in accurate models that are also considerably simpler in terms of mathematical complexity. The PAVMs for AC/DC converter systems have been thoroughly analyzed in literature. This paper proposes a new PAVM for AC/AC cyclo-converters which supply the load at lower AC frequencies. The superior performance and computational advantages of the proposed PAVM of cyclo-converters are verified against the detailed model in terms of CPU efficiency as well as numerical accuracy.\n
\n\n\n\n \n\n \n \n Amiri, N., Chapariha, M., Ebrahimi, S., Jatskevich, J., & Wang, L.\n\n\n \n \n \n \n Constant parameter VBR model of permanent magnet synchronous machine wind generation system.\n \n \n \n\n\n \n\n\n\n In 2015 IEEE Power & Energy Society General Meeting, pages 1-5, July 2015. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{7286439,\n author={Amiri, Navid and Chapariha, Mehrdad and Ebrahimi, Seyyedmilad and Jatskevich, Juri and Wang, Liwei},\n booktitle={2015 IEEE Power & Energy Society General Meeting}, \n title={Constant parameter VBR model of permanent magnet synchronous machine wind generation system}, \n year={2015},\n volume={},\n number={},\n pages={1-5},\n abstract={Modeling renewable energy generation systems with electrical machines has been an active area of research, wherein interfacing the machine models with power electronic converters is a known challenge area. As an alternative to traditional qd models, the coupled-circuit phase-domain (CCPD) and voltage-behind-reactance (VBR) models have been recently proposed. The permanent magnet (PM) generator has internal saliency and damper structures, which results rotor-position-dependent inductances in both CCPD and VBR models, and interfacing qd models requires snubber circuits, all of which reduces the simulation efficiency. This paper presents a constant-parameter voltage behind reactance (CPVBR) model in order to achieve a numerically-efficient interface with the rectifier circuit. The model is demonstrated on a grid-connected variable-speed wind generation system, wherein significant computational advantages are demonstrated compared with existing models.},\n keywords={Mathematical model;Computational modeling;Integrated circuit modeling;Numerical models;Snubbers;Rotors;Stators;Constant-parameter voltage-behind-reactance;machine modeling;simulation;wind energy systems},\n doi={10.1109/PESGM.2015.7286439},\n ISSN={1932-5517},\n month={July},}\n\n Modeling renewable energy generation systems with electrical machines has been an active area of research, wherein interfacing the machine models with power electronic converters is a known challenge area. As an alternative to traditional qd models, the coupled-circuit phase-domain (CCPD) and voltage-behind-reactance (VBR) models have been recently proposed. The permanent magnet (PM) generator has internal saliency and damper structures, which results rotor-position-dependent inductances in both CCPD and VBR models, and interfacing qd models requires snubber circuits, all of which reduces the simulation efficiency. This paper presents a constant-parameter voltage behind reactance (CPVBR) model in order to achieve a numerically-efficient interface with the rectifier circuit. The model is demonstrated on a grid-connected variable-speed wind generation system, wherein significant computational advantages are demonstrated compared with existing models.\n
\n\n\n\n \n\n \n \n Rodrigues, Y. R., Eberle, W., Metcalfe, M. S., & Zambroni Souza, A.\n\n\n \n \n \n \n Impact of appliances harmonic content in microgrid environments.\n \n \n \n\n\n \n\n\n\n In 2015 IEEE PES Innovative Smart Grid Technologies Latin America (ISGT LATAM), pages 701-705, Oct 2015. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{7381242,\n author={Rodrigues, Yuri R. and Eberle, Wilson and Metcalfe, Malcolm S. and Zambroni Souza, A.C.},\n booktitle={2015 IEEE PES Innovative Smart Grid Technologies Latin America (ISGT LATAM)}, \n title={Impact of appliances harmonic content in microgrid environments}, \n year={2015},\n volume={},\n number={},\n pages={701-705},\n abstract={Harmonic contents are a growing and challenging problem. The increasing number of electronic appliances and the use of adjustable speed drivers (ASD) in fridges, dryers and washers as well as the insertion of distributed generation (DG) in smart grids using power electronics converters are some of many generators of harmonic contents presented in distribution systems. This study proposes an approach to identify the harmonic losses generated by appliances in distribution power systems likely to microgrid environments considering DG and susceptible of islanding. To develop this methodology models of appliances using real data measurements associated in different scenarios are created. A typical distribution system multi grounded neutral (MGN) is employed to determine the impact that each appliance harmonic contents have in the distribution power system technical losses.},\n keywords={Harmonic analysis;Home appliances;Power harmonic filters;Load modeling;Smart grids;Harmonic losses;Distribution power system;Microgrids;Appliances},\n doi={10.1109/ISGT-LA.2015.7381242},\n ISSN={},\n month={Oct},}\n\n Harmonic contents are a growing and challenging problem. The increasing number of electronic appliances and the use of adjustable speed drivers (ASD) in fridges, dryers and washers as well as the insertion of distributed generation (DG) in smart grids using power electronics converters are some of many generators of harmonic contents presented in distribution systems. This study proposes an approach to identify the harmonic losses generated by appliances in distribution power systems likely to microgrid environments considering DG and susceptible of islanding. To develop this methodology models of appliances using real data measurements associated in different scenarios are created. A typical distribution system multi grounded neutral (MGN) is employed to determine the impact that each appliance harmonic contents have in the distribution power system technical losses.\n
\n\n\n\n \n\n \n \n Öberg, Å., Chimento, F., Qin, J., Wang, L., & Jeppsson, O.\n\n\n \n \n \n \n Bypass switch assembly.\n \n \n \n\n\n \n\n\n\n August 4 2015.\n US Patent 9,099,268\n\n\n\n
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\n\n\n\n@misc{oberg2015bypass,\n title={Bypass switch assembly},\n author={{\\"O}berg, Åke and Chimento, Filippo and Qin, Jian and Wang, Liwei and Jeppsson, Ola},\n year={2015},\n month=aug # "~4",\n publisher={Google Patents},\n note={US Patent 9,099,268}\n}\n\n\n\n
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\n \n \n\n \n \n Clark, C. W., Musavi, F., & Eberle, W.\n\n\n \n \n \n \n Digital DCM Detection and Mixed Conduction Mode Control for Boost PFC Converters.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Electronics, 29(1): 347-355. Jan 2014.\n \n\n\n\n
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\n\n\n@ARTICLE{6482648,\n author={Clark, Colin W. and Musavi, Fariborz and Eberle, Wilson},\n journal={IEEE Transactions on Power Electronics}, \n title={Digital DCM Detection and Mixed Conduction Mode Control for Boost PFC Converters}, \n year={2014},\n volume={29},\n number={1},\n pages={347-355},\n abstract={This paper presents a novel mixed conduction mode (MCM) digital controller with a digital signal processor (DSP)-based discontinuous conduction mode (DCM) detection technique to realize total harmonic distortion (THD) and power factor improvements in boost power factor correction (PFC) converters operating in both continuous conduction mode (CCM) and DCM during a single ac line half-cycle. By using the integrated comparators found on many DSPs, simplification and cost-reductions over existing DCM and zero-current detection methods are made possible. Additionally, performance improvements over a conventional CCM digital control technique are possible with simple software modification, and can be extended to existing boost PFC converter designs provided a compatible DSP is present. At an output power of 98 W, an experimental 650 W boost PFC converter operating in the MCM controlled by a TMS320F28035 provides a THD reduction of 40.2% and power factor improvement of 1.5% over a conventional digital controller.},\n keywords={Inductors;Digital signal processing;Feedforward neural networks;Reactive power;Windings;Hardware;Digital control;Boost power factor correction (PFC);digital control;discontinuous conduction mode (DCM);mixed conduction mode (MCM)},\n doi={10.1109/TPEL.2013.2252471},\n ISSN={1941-0107},\n month={Jan},}\n\n This paper presents a novel mixed conduction mode (MCM) digital controller with a digital signal processor (DSP)-based discontinuous conduction mode (DCM) detection technique to realize total harmonic distortion (THD) and power factor improvements in boost power factor correction (PFC) converters operating in both continuous conduction mode (CCM) and DCM during a single ac line half-cycle. By using the integrated comparators found on many DSPs, simplification and cost-reductions over existing DCM and zero-current detection methods are made possible. Additionally, performance improvements over a conventional CCM digital control technique are possible with simple software modification, and can be extended to existing boost PFC converter designs provided a compatible DSP is present. At an output power of 98 W, an experimental 650 W boost PFC converter operating in the MCM controlled by a TMS320F28035 provides a THD reduction of 40.2% and power factor improvement of 1.5% over a conventional digital controller.\n
\n\n\n\n \n\n \n \n Musavi, F., Craciun, M., Gautam, D. S., & Eberle, W.\n\n\n \n \n \n \n Control Strategies for Wide Output Voltage Range LLC Resonant DC–DC Converters in Battery Chargers.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Vehicular Technology, 63(3): 1117-1125. March 2014.\n \n\n\n\n
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\n\n\n@ARTICLE{6728622,\n author={Musavi, Fariborz and Craciun, Marian and Gautam, Deepak S. and Eberle, Wilson},\n journal={IEEE Transactions on Vehicular Technology}, \n title={Control Strategies for Wide Output Voltage Range LLC Resonant DC–DC Converters in Battery Chargers}, \n year={2014},\n volume={63},\n number={3},\n pages={1117-1125},\n abstract={In this paper, a control strategy is presented for a high-performance capacitively loaded loop (LLC) multiresonant dc-dc converter in a two-stage smart charger for neighborhood electric vehicle (NEV) applications. It addresses several aspects and limitations of LLC resonant dc-dc converters in battery charging applications, such as very wide output voltage range while keeping the efficiency maximized, implementation of the current mode control at the secondary side, and optimization of burst mode operation for current regulation at very low output voltage. The proposed control scheme minimizes both low- and high-frequency current ripples on the battery while maintaining stability of the dc-dc converter, thus maximizing battery life without penalizing the volume of the charger. Experimental results are presented for a prototype unit converting 390 V from the input dc link to an output voltage range of 3-72 V dc at 650 W. The prototype achieves a peak efficiency value of 96%.},\n keywords={Batteries;Voltage control;Frequency conversion;Resonant frequency;Frequency control;Switches;Bridge circuits;Battery charger;burst mode operation;control stability;resonant converter},\n doi={10.1109/TVT.2013.2283158},\n ISSN={1939-9359},\n month={March},}\n\n In this paper, a control strategy is presented for a high-performance capacitively loaded loop (LLC) multiresonant dc-dc converter in a two-stage smart charger for neighborhood electric vehicle (NEV) applications. It addresses several aspects and limitations of LLC resonant dc-dc converters in battery charging applications, such as very wide output voltage range while keeping the efficiency maximized, implementation of the current mode control at the secondary side, and optimization of burst mode operation for current regulation at very low output voltage. The proposed control scheme minimizes both low- and high-frequency current ripples on the battery while maintaining stability of the dc-dc converter, thus maximizing battery life without penalizing the volume of the charger. Experimental results are presented for a prototype unit converting 390 V from the input dc link to an output voltage range of 3-72 V dc at 650 W. The prototype achieves a peak efficiency value of 96%.\n
\n\n\n\n \n\n \n \n Shafiei, N., Ordonez, M., & Eberle, W.\n\n\n \n \n \n \n Output rectifier analysis in parallel and series-parallel resonant converters with pure capacitive output filter.\n \n \n \n\n\n \n\n\n\n In 2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014, pages 9-13, March 2014. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6803282,\n author={Shafiei, Navid and Ordonez, Martin and Eberle, Wilson},\n booktitle={2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014}, \n title={Output rectifier analysis in parallel and series-parallel resonant converters with pure capacitive output filter}, \n year={2014},\n volume={},\n number={},\n pages={9-13},\n abstract={This paper analyzes the behavior of a pure capacitive output filter in parallel and series-parallel resonant converters. Unlike traditional resonant voltage-and current-driven rectifiers, pure capacitive output filters present interruptions in power transfer from the transformer primary to the secondary, owing to the existence of a parallel resonant capacitor. Therefore, existing formulas for different specifications of the output rectifier (e.g., output voltage ripple, efficiency, etc.) cannot be employed. This work provides detailed analysis of, and design equations for, pure capacitive output filters to cover the characteristic behavior of this rectifier. These valuable equations can be employed in the design of both low and high voltage power supplies for a variety of applications such as telecom power supplies and medical therapy instruments. Experimental results of a 10kVDC, 1.1kW power supply are presented to validate the analysis, along with other comparative experimental examples. With the rapid growth of low and high voltage applications, the equations will benefit researchers and R&D engineers in the area of resonant power conversion.},\n keywords={Capacitors;Mathematical model;Equations;Power supplies;Frequency conversion;Capacitance},\n doi={10.1109/APEC.2014.6803282},\n ISSN={1048-2334},\n month={March},}\n\n This paper analyzes the behavior of a pure capacitive output filter in parallel and series-parallel resonant converters. Unlike traditional resonant voltage-and current-driven rectifiers, pure capacitive output filters present interruptions in power transfer from the transformer primary to the secondary, owing to the existence of a parallel resonant capacitor. Therefore, existing formulas for different specifications of the output rectifier (e.g., output voltage ripple, efficiency, etc.) cannot be employed. This work provides detailed analysis of, and design equations for, pure capacitive output filters to cover the characteristic behavior of this rectifier. These valuable equations can be employed in the design of both low and high voltage power supplies for a variety of applications such as telecom power supplies and medical therapy instruments. Experimental results of a 10kVDC, 1.1kW power supply are presented to validate the analysis, along with other comparative experimental examples. With the rapid growth of low and high voltage applications, the equations will benefit researchers and R&D engineers in the area of resonant power conversion.\n
\n\n\n\n \n\n \n \n Alam, M. M. U., Eberle, W., Gautom, D., & Musavi, F.\n\n\n \n \n \n \n A soft-switching bridgeless AC-DC power factor correction converter for off-road and neighborhood electric vehicle battery charging.\n \n \n \n\n\n \n\n\n\n In 2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014, pages 103-108, March 2014. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6803295,\n author={Alam, Md. Muntasir Ul and Eberle, Wilson and Gautom, Deepak and Musavi, Fariborz},\n booktitle={2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014}, \n title={A soft-switching bridgeless AC-DC power factor correction converter for off-road and neighborhood electric vehicle battery charging}, \n year={2014},\n volume={},\n number={},\n pages={103-108},\n abstract={This paper presents a high efficiency, continuous conduction mode (CCM), zero voltage switching (ZVS) bridgeless AC-DC power-factor-correction (PFC) converter for neighborhood electric vehicle (NEV) battery charging. The converter operates in both pulse-width-modulation (PWM) mode and resonant mode each switching cycle and utilizes standard average-current-mode control. This new modulation technique is hereafter referred to as hybrid-resonant PWM (HRPWM). All the semiconductor devices of the proposed converter realize soft-switching, nearly eliminating all switching losses and reducing electromagnetic interference (EMI). Moreover, all the semiconductor devices can operate without voltage overstress for a wide universal AC input voltage range. The converter architecture exhibit low in-rush current and implementation of lightning and surge protection system is easy. The detailed operation of the proposed converter, along with the stress analysis of the circuit components, and detailed loss analysis are provided. The feasibility of the converter is confirmed by comparing an experimental prototype of the benchmark hard switched AC-DC boost converter. Through experimentation and analysis, the proposed converter can achieve a total loss reduction of 15 %, at 70 kHz switching frequency, 120 V input, and 400 V/650 W output in comparison to the benchmark AC-DC boost converter.},\n keywords={Switches;Zero voltage switching;Semiconductor diodes;Surge protection;Capacitors;Switching loss;Surges},\n doi={10.1109/APEC.2014.6803295},\n ISSN={1048-2334},\n month={March},}\n\n This paper presents a high efficiency, continuous conduction mode (CCM), zero voltage switching (ZVS) bridgeless AC-DC power-factor-correction (PFC) converter for neighborhood electric vehicle (NEV) battery charging. The converter operates in both pulse-width-modulation (PWM) mode and resonant mode each switching cycle and utilizes standard average-current-mode control. This new modulation technique is hereafter referred to as hybrid-resonant PWM (HRPWM). All the semiconductor devices of the proposed converter realize soft-switching, nearly eliminating all switching losses and reducing electromagnetic interference (EMI). Moreover, all the semiconductor devices can operate without voltage overstress for a wide universal AC input voltage range. The converter architecture exhibit low in-rush current and implementation of lightning and surge protection system is easy. The detailed operation of the proposed converter, along with the stress analysis of the circuit components, and detailed loss analysis are provided. The feasibility of the converter is confirmed by comparing an experimental prototype of the benchmark hard switched AC-DC boost converter. Through experimentation and analysis, the proposed converter can achieve a total loss reduction of 15 %, at 70 kHz switching frequency, 120 V input, and 400 V/650 W output in comparison to the benchmark AC-DC boost converter.\n
\n\n\n\n \n\n \n \n Alam, M. M. U., Eberle, W., & Musavi, F.\n\n\n \n \n \n \n A hybrid resonant bridgeless AC-DC power factor correction converter for off-road and neighborhood electric vehicle battery charging.\n \n \n \n\n\n \n\n\n\n In 2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014, pages 1641-1647, March 2014. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6803526,\n author={Alam, Md. Muntasir Ul and Eberle, Wilson and Musavi, Fariborz},\n booktitle={2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014}, \n title={A hybrid resonant bridgeless AC-DC power factor correction converter for off-road and neighborhood electric vehicle battery charging}, \n year={2014},\n volume={},\n number={},\n pages={1641-1647},\n abstract={In this paper, a new hybrid resonant bridgeless ac-dc PFC boost converter operating in continuous-conduction-mode (CCM) is proposed for neighborhood electric vehicle (NEV) battery charging. This hybrid-resonant boost converter has two active switches that operate in pulse-width modulation (PWM) and hybrid-resonant modes of operation. This combined modulation technique is called hybrid resonant PWM (HRPWM). The proposed converter with HRPWM features several benefits. The gates of the two active switches are tied together, so, the converter does not need any extra circuitry to sense the positive, or negative line-cycle operation. The semiconductor devices operate with a voltage stress close to the output voltage. The resonant tank components are relatively small in size and the hybrid-resonant mode of operation alleviates the reverse recovery losses for the body diode. The converter architecture exhibits less common mode noise compared with the dual-boost and bridgeless boost converters. Moreover, the converter architecture enables simple implementation of lightning and surge protection systems. And it has inherent inrush current limit capability. Experimental results of a prototype unit converting a universal ac input to a 400 V dc output at 650 W and 70 kHz switching frequency are presented to verify the proof of concept.},\n keywords={Surge protection;Resonant frequency;Surges;Semiconductor diodes;Topology;Inductors;Capacitors},\n doi={10.1109/APEC.2014.6803526},\n ISSN={1048-2334},\n month={March},}\n\n In this paper, a new hybrid resonant bridgeless ac-dc PFC boost converter operating in continuous-conduction-mode (CCM) is proposed for neighborhood electric vehicle (NEV) battery charging. This hybrid-resonant boost converter has two active switches that operate in pulse-width modulation (PWM) and hybrid-resonant modes of operation. This combined modulation technique is called hybrid resonant PWM (HRPWM). The proposed converter with HRPWM features several benefits. The gates of the two active switches are tied together, so, the converter does not need any extra circuitry to sense the positive, or negative line-cycle operation. The semiconductor devices operate with a voltage stress close to the output voltage. The resonant tank components are relatively small in size and the hybrid-resonant mode of operation alleviates the reverse recovery losses for the body diode. The converter architecture exhibits less common mode noise compared with the dual-boost and bridgeless boost converters. Moreover, the converter architecture enables simple implementation of lightning and surge protection systems. And it has inherent inrush current limit capability. Experimental results of a prototype unit converting a universal ac input to a 400 V dc output at 650 W and 70 kHz switching frequency are presented to verify the proof of concept.\n
\n\n\n\n \n\n \n \n Alam, M. M. U., Eberle, W., & Musavi, F.\n\n\n \n \n \n \n A single-stage bridgeless high efficiency ZVS hybrid-resonant off-road and neighborhood EV battery charger.\n \n \n \n\n\n \n\n\n\n In 2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014, pages 3237-3242, March 2014. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6803769,\n author={Alam, Md. Muntasir Ul and Eberle, Wilson and Musavi, Fariborz},\n booktitle={2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014}, \n title={A single-stage bridgeless high efficiency ZVS hybrid-resonant off-road and neighborhood EV battery charger}, \n year={2014},\n volume={},\n number={},\n pages={3237-3242},\n abstract={This paper introduces a single-stage battery charger for neighborhood electric vehicles (NEVs) which has the following characteristics: i. operate in continuous-conduction-mode (CCM), ii. include bridgeless operation, iii. realize zero-voltage switching (ZVS) operation for all MOSFETs, iv. provide controlled di/dt turn-off of the output diodes, v. has symmetric operation. The proposed battery charger exhibited minimum number of semiconductor devices compare with state-of-the-art battery charger. The input-output isolation reduces the possibility of safety hazards. The proposed isolation transformer acts as an AC transformer which is much smaller in size and increase transformer efficiency. The symmetric operation of the proposed converter reduces the common-mode (CM) noise. In the paper, the operation of the proposed converter is explained in detail and a mathematical analysis of its steady-state operation is performed. The feasibility of the converter is confirmed by comparing an experimental prototype of the benchmark hard switched ac-dc current-fed push-pull converter and simulation work of the proposed converter. Through experimentation and analysis the proposed converter can achieve a total loss reduction of 20 %, at 70 kHz switching frequency, 120 V input, and 48 V/650 W output},\n keywords={Zero voltage switching;Batteries;Semiconductor diodes;Capacitors;Benchmark testing;Switching loss;MOSFET},\n doi={10.1109/APEC.2014.6803769},\n ISSN={1048-2334},\n month={March},}\n\n This paper introduces a single-stage battery charger for neighborhood electric vehicles (NEVs) which has the following characteristics: i. operate in continuous-conduction-mode (CCM), ii. include bridgeless operation, iii. realize zero-voltage switching (ZVS) operation for all MOSFETs, iv. provide controlled di/dt turn-off of the output diodes, v. has symmetric operation. The proposed battery charger exhibited minimum number of semiconductor devices compare with state-of-the-art battery charger. The input-output isolation reduces the possibility of safety hazards. The proposed isolation transformer acts as an AC transformer which is much smaller in size and increase transformer efficiency. The symmetric operation of the proposed converter reduces the common-mode (CM) noise. In the paper, the operation of the proposed converter is explained in detail and a mathematical analysis of its steady-state operation is performed. The feasibility of the converter is confirmed by comparing an experimental prototype of the benchmark hard switched ac-dc current-fed push-pull converter and simulation work of the proposed converter. Through experimentation and analysis the proposed converter can achieve a total loss reduction of 20 %, at 70 kHz switching frequency, 120 V input, and 48 V/650 W output\n
\n\n\n\n \n\n \n \n Therrien, F., Wang, L., Jatskevich, J., & Wasynczuk, O.\n\n\n \n \n \n \n Efficient explicit representation of AC machines main flux saturation in state-variable-based transient simulation packages.\n \n \n \n\n\n \n\n\n\n In 2014 IEEE PES General Meeting | Conference & Exposition, pages 1-1, July 2014. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6939342,\n author={Therrien, Francis and Wang, Liwei and Jatskevich, Juri and Wasynczuk, Oleg},\n booktitle={2014 IEEE PES General Meeting | Conference & Exposition}, \n title={Efficient explicit representation of AC machines main flux saturation in state-variable-based transient simulation packages}, \n year={2014},\n volume={},\n number={},\n pages={1-1},\n abstract={Summary form only given. Inclusion of magnetic saturation in low-order qd models of induction and synchronous machines improves the accuracy of system studies. Over the years, numerous explicit and implicit methods of representing magnetic saturation have been proposed in the literature, some of which find their use in commonly used transient simulation packages. This paper presents a straightforward and improved flux correction method of modeling saturation explicitly in classical qd state variable ac machine models. The approach requires limited additional information and avoids the need for a dynamic inductance, which is present in many other approaches. The method is first developed for induction machines and then extended to salient-pole synchronous machines as a more general case. Computer studies demonstrate the accuracy of the proposed method for predicting the dynamic and steady-state cross-saturation phenomena, as well as its computational advantages.},\n keywords={Computational modeling;Computers;AC machines;Transient analysis;Educational institutions;Magnetic flux},\n doi={10.1109/PESGM.2014.6939342},\n ISSN={1932-5517},\n month={July},}\n\n Summary form only given. Inclusion of magnetic saturation in low-order qd models of induction and synchronous machines improves the accuracy of system studies. Over the years, numerous explicit and implicit methods of representing magnetic saturation have been proposed in the literature, some of which find their use in commonly used transient simulation packages. This paper presents a straightforward and improved flux correction method of modeling saturation explicitly in classical qd state variable ac machine models. The approach requires limited additional information and avoids the need for a dynamic inductance, which is present in many other approaches. The method is first developed for induction machines and then extended to salient-pole synchronous machines as a more general case. Computer studies demonstrate the accuracy of the proposed method for predicting the dynamic and steady-state cross-saturation phenomena, as well as its computational advantages.\n
\n\n\n\n \n\n \n \n Alam, M., Eberle, W., Botting, C., & Edington, M.\n\n\n \n \n \n \n A bridgeless hybrid-resonant PWM zero voltage switching boost AC-DC power factor corrected converter.\n \n \n \n\n\n \n\n\n\n In 2014 IEEE Energy Conversion Congress and Exposition (ECCE), pages 606-610, Sep. 2014. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6953450,\n author={Alam, Muntasir and Eberle, Wilson and Botting, Chris and Edington, Murray},\n booktitle={2014 IEEE Energy Conversion Congress and Exposition (ECCE)}, \n title={A bridgeless hybrid-resonant PWM zero voltage switching boost AC-DC power factor corrected converter}, \n year={2014},\n volume={},\n number={},\n pages={606-610},\n abstract={This paper presents a new bridgeless zero-voltage switching (ZVS) ac-dc boost power factor corrected converter for application in power supplies and battery chargers. This converter utilizes standard average-current-mode control while operating in both pulse-width-modulation (PWM) mode and resonant mode each switching cycle. This modulation technique can be referred to as hybrid-resonant PWM (HRPWM). The PWM switches of the proposed converter can be driven with the same PWM signal, so extra circuitry is not required to sense the positive or negative line-cycle operation. The proposed converter realizes ZVS for the main and auxiliary switches which nearly eliminates all switching losses and enables improved efficiency. The resonant operation provides controlled di/dt turn-off of the output diodes which reduces the reverse recovery losses and electromagnetic interference (EMI). Detailed operation of the proposed converter is provided, along with a stress analysis of the circuit components, and a design methodology to select the resonant components. Finally experimental results are shown for a prototype unit converting a universal ac input to a 650W, 400 V dc output, operating at 70 kHz switching frequency.},\n keywords={Zero voltage switching;Pulse width modulation;Rectifiers;Switching loss;Semiconductor diodes;Topology;Stress},\n doi={10.1109/ECCE.2014.6953450},\n ISSN={2329-3748},\n month={Sep.},}\n\n This paper presents a new bridgeless zero-voltage switching (ZVS) ac-dc boost power factor corrected converter for application in power supplies and battery chargers. This converter utilizes standard average-current-mode control while operating in both pulse-width-modulation (PWM) mode and resonant mode each switching cycle. This modulation technique can be referred to as hybrid-resonant PWM (HRPWM). The PWM switches of the proposed converter can be driven with the same PWM signal, so extra circuitry is not required to sense the positive or negative line-cycle operation. The proposed converter realizes ZVS for the main and auxiliary switches which nearly eliminates all switching losses and enables improved efficiency. The resonant operation provides controlled di/dt turn-off of the output diodes which reduces the reverse recovery losses and electromagnetic interference (EMI). Detailed operation of the proposed converter is provided, along with a stress analysis of the circuit components, and a design methodology to select the resonant components. Finally experimental results are shown for a prototype unit converting a universal ac input to a 650W, 400 V dc output, operating at 70 kHz switching frequency.\n
\n\n\n\n \n\n \n \n Nawaz, M., Chen, N., Chimento, F., & Wang, L.\n\n\n \n \n \n \n Static and dynamic characterization of high power silicon carbide BJT modules.\n \n \n \n\n\n \n\n\n\n In 2014 IEEE Energy Conversion Congress and Exposition (ECCE), pages 2824-2831, Sep. 2014. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6953781,\n author={Nawaz, Muhammad and Chen, Nan and Chimento, Filippo and Wang, Liwei},\n booktitle={2014 IEEE Energy Conversion Congress and Exposition (ECCE)}, \n title={Static and dynamic characterization of high power silicon carbide BJT modules}, \n year={2014},\n volume={},\n number={},\n pages={2824-2831},\n abstract={Silicon carbide (SiC) based power semiconductor devices are now considered as key components for future power applications where high power density, high temperature and high ruggedness against radiation are key parameters. This thanks to lower conduction and switching losses offered by the SiC devices. This paper deals with static and dynamic measurements performed for SiC based BJTs (Bipolar Junction Transistors) power modules with voltage rating 1200 V and current rating 800 A. The power modules are fabricated in flexible half bridge configuration in order to allow either full power module with 2400 V and 800 A as one power switch or by using two parallel 1200 V and 400 A half bridge legs. Results from engineering samples show overall good confidence as promised by the manufacturer for most of the transistor samples. A 40-50% reduction in the current gain was observed when temperature was increased to 475K as expected. Bipolar devices have been found out fairly stable under continuous static operation at nominal current levels.},\n keywords={Silicon carbide;Multichip modules;Junctions;Temperature measurement;Transistors;Voltage measurement;Silicon;Power Semiconductor Modules;Silicon Carbide;Bipolar Junction Transistors;4H-SiC BJTs},\n doi={10.1109/ECCE.2014.6953781},\n ISSN={2329-3748},\n month={Sep.},}\n\n Silicon carbide (SiC) based power semiconductor devices are now considered as key components for future power applications where high power density, high temperature and high ruggedness against radiation are key parameters. This thanks to lower conduction and switching losses offered by the SiC devices. This paper deals with static and dynamic measurements performed for SiC based BJTs (Bipolar Junction Transistors) power modules with voltage rating 1200 V and current rating 800 A. The power modules are fabricated in flexible half bridge configuration in order to allow either full power module with 2400 V and 800 A as one power switch or by using two parallel 1200 V and 400 A half bridge legs. Results from engineering samples show overall good confidence as promised by the manufacturer for most of the transistor samples. A 40-50% reduction in the current gain was observed when temperature was increased to 475K as expected. Bipolar devices have been found out fairly stable under continuous static operation at nominal current levels.\n
\n\n\n\n \n\n \n \n Alam, M., Eberle, W., & Dohmeier, N.\n\n\n \n \n \n \n An inrush limited, surge tolerant hybrid resonant bridgeless PWM AC-DC PFC converter.\n \n \n \n\n\n \n\n\n\n In 2014 IEEE Energy Conversion Congress and Exposition (ECCE), pages 5647-5651, Sep. 2014. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6954175,\n author={Alam, Muntasir and Eberle, Wilson and Dohmeier, Nicholas},\n booktitle={2014 IEEE Energy Conversion Congress and Exposition (ECCE)}, \n title={An inrush limited, surge tolerant hybrid resonant bridgeless PWM AC-DC PFC converter}, \n year={2014},\n volume={},\n number={},\n pages={5647-5651},\n abstract={This paper introduces the inherent inrush current limiting and line surge tolerance capabilities of a hybrid resonant pulse width modulated (HRPWM) bridgeless ac-dc converter. The inrush current limiting and line surge tolerance capabilities improve system reliability while the low component count reduces losses and cost. This paper discusses different inrush current limiting circuits for conventional boost converters and analyzes the drawbacks associated with them. The operation, several key design considerations, and the surge tolerance of the proposed converter are discussed. The inrush current and input voltage surge performance of a prototype of the converter are presented and compared with a benchmark boost converter to verify the proof of concept. Finally experimental results are shown for the prototype unit converting a universal ac input to a 650W, 400 V output, operating at 70 kHz switching frequency.},\n keywords={Surges;Limiting;Capacitors;Surge protection;Switches;Voltage control;Prototypes},\n doi={10.1109/ECCE.2014.6954175},\n ISSN={2329-3748},\n month={Sep.},}\n\n This paper introduces the inherent inrush current limiting and line surge tolerance capabilities of a hybrid resonant pulse width modulated (HRPWM) bridgeless ac-dc converter. The inrush current limiting and line surge tolerance capabilities improve system reliability while the low component count reduces losses and cost. This paper discusses different inrush current limiting circuits for conventional boost converters and analyzes the drawbacks associated with them. The operation, several key design considerations, and the surge tolerance of the proposed converter are discussed. The inrush current and input voltage surge performance of a prototype of the converter are presented and compared with a benchmark boost converter to verify the proof of concept. Finally experimental results are shown for the prototype unit converting a universal ac input to a 650W, 400 V output, operating at 70 kHz switching frequency.\n
\n\n\n\n \n\n \n \n Musavi, F., & Eberle, W.\n\n\n \n \n \n \n Overview of wireless power transfer technologies for electric vehicle battery charging.\n \n \n \n\n\n \n\n\n\n IET Power Electronics, 7(1): 60–66. 2014.\n \n\n\n\n
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\n\n\n\n@article{musavi2014overview,\n title={Overview of wireless power transfer technologies for electric vehicle battery charging},\n author={Musavi, Fariborz and Eberle, Wilson},\n journal={IET Power Electronics},\n volume={7},\n number={1},\n pages={60--66},\n year={2014},\n publisher={Wiley Online Library}\n}\n\n\n\n
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\n \n \n\n \n \n Musavi, F., Edington, M., Eberle, W., & Dunford, W. G.\n\n\n \n \n \n \n Control Loop Design for a PFC Boost Converter With Ripple Steering.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Industry Applications, 49(1): 118-126. Jan 2013.\n \n\n\n\n
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\n\n\n@ARTICLE{6357245,\n author={Musavi, Fariborz and Edington, Murray and Eberle, Wilson and Dunford, William G.},\n journal={IEEE Transactions on Industry Applications}, \n title={Control Loop Design for a PFC Boost Converter With Ripple Steering}, \n year={2013},\n volume={49},\n number={1},\n pages={118-126},\n abstract={In this paper, an average switch model approach to the power stage modeling, feedback compensation network design, and dynamic analysis of power factor correction (PFC) boost converters with ripple steering is presented. The model is expressed by the derivation of power stage transfer functions for a conventional boost converter and then followed by the derivation of the power stage transfer functions for a boost converter with ripple steering. A detailed design procedure and comparison of both voltage and current feedback loops are given in a conventional PFC boost converter and boost converter with ripple steering. Experimental and simulation results of a prototype boost converter converting universal ac input voltage to 400 V dc at 1.6 kW are given to verify the proof of concept and analytical work reported. The experimental results demonstrate that the model can correctly predict the steady-state behavior of a continuous conduction mode PFC boost converter with ripple steering.},\n keywords={Switches;Transfer functions;Inductors;Integrated circuit modeling;Capacitors;Windings;Gain;AC–DC power converters;average switch model;boost converter;coupled magnetic;dc–dc power converters;feedback compensation design;power conversion;power factor correction (PFC);ripple steering},\n doi={10.1109/TIA.2012.2227640},\n ISSN={1939-9367},\n month={Jan},}\n\n In this paper, an average switch model approach to the power stage modeling, feedback compensation network design, and dynamic analysis of power factor correction (PFC) boost converters with ripple steering is presented. The model is expressed by the derivation of power stage transfer functions for a conventional boost converter and then followed by the derivation of the power stage transfer functions for a boost converter with ripple steering. A detailed design procedure and comparison of both voltage and current feedback loops are given in a conventional PFC boost converter and boost converter with ripple steering. Experimental and simulation results of a prototype boost converter converting universal ac input voltage to 400 V dc at 1.6 kW are given to verify the proof of concept and analytical work reported. The experimental results demonstrate that the model can correctly predict the steady-state behavior of a continuous conduction mode PFC boost converter with ripple steering.\n
\n\n\n\n \n\n \n \n Wang, L., & Jatskevich, J.\n\n\n \n \n \n \n A Phase-Domain Synchronous Machine Model With Constant Equivalent Conductance Matrix for EMTP-Type Solution.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Energy Conversion, 28(1): 191-202. March 2013.\n \n\n\n\n
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\n\n\n@ARTICLE{6373716,\n author={Wang, Liwei and Jatskevich, Juri},\n journal={IEEE Transactions on Energy Conversion}, \n title={A Phase-Domain Synchronous Machine Model With Constant Equivalent Conductance Matrix for EMTP-Type Solution}, \n year={2013},\n volume={28},\n number={1},\n pages={191-202},\n abstract={Interfacing machine models in either nodal analysis-based (EMTP-like) or state variable-based transient simulation programs play an important role in numerical accuracy and computational performance of the overall simulation. As an advantageous alternative to the traditional qd models, a number of advanced phase-domain (PD) and voltage-behind-reactance machine models have been recently introduced. However, the rotor-position-dependent conductance matrix in the machine-network interface complicates the use of such models in EMTP. This paper focuses on achieving constant and efficient interfacing circuit for the PD synchronous machine model. It is shown that the machine conductance matrix can be formulated into a constant submatrix plus a time-variant submatrix. Eliminating numerical saliency from the second term results in a constant conductance matrix of the proposed PD model, which is a very desirable property for the EMTP solution since the refactorization of the network conductance matrix at every time step is avoided. Case studies demonstrate that the proposed PD model represents a significant improvement over other established models used in EMTP while preserving the accuracy of the original/classical PD model.},\n keywords={Numerical models;Windings;Rotors;Mathematical model;Synchronous machines;Integrated circuit modeling;EMTP;Constant conductance matrix;EMTP;${\\bf G}$ matrix;phase-domain (PD) model;qd model;saliency elimination;synchronous machine;voltage-behind-reactance (VBR) model},\n doi={10.1109/TEC.2012.2227748},\n ISSN={1558-0059},\n month={March},}\n\n Interfacing machine models in either nodal analysis-based (EMTP-like) or state variable-based transient simulation programs play an important role in numerical accuracy and computational performance of the overall simulation. As an advantageous alternative to the traditional qd models, a number of advanced phase-domain (PD) and voltage-behind-reactance machine models have been recently introduced. However, the rotor-position-dependent conductance matrix in the machine-network interface complicates the use of such models in EMTP. This paper focuses on achieving constant and efficient interfacing circuit for the PD synchronous machine model. It is shown that the machine conductance matrix can be formulated into a constant submatrix plus a time-variant submatrix. Eliminating numerical saliency from the second term results in a constant conductance matrix of the proposed PD model, which is a very desirable property for the EMTP solution since the refactorization of the network conductance matrix at every time step is avoided. Case studies demonstrate that the proposed PD model represents a significant improvement over other established models used in EMTP while preserving the accuracy of the original/classical PD model.\n
\n\n\n\n \n\n \n \n Musavi, F., Eberle, W., & Dunford, W. G.\n\n\n \n \n \n \n A Phase-Shifted Gating Technique With Simplified Current Sensing for the Semi-Bridgeless AC–DC Converter.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Vehicular Technology, 62(4): 1568-1576. May 2013.\n \n\n\n\n
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\n\n\n@ARTICLE{6374268,\n author={Musavi, Fariborz and Eberle, Wilson and Dunford, William G.},\n journal={IEEE Transactions on Vehicular Technology}, \n title={A Phase-Shifted Gating Technique With Simplified Current Sensing for the Semi-Bridgeless AC–DC Converter}, \n year={2013},\n volume={62},\n number={4},\n pages={1568-1576},\n abstract={In this paper, a phase-shifted semi-bridgeless boost power-factor-corrected (PFC) converter is proposed to simplify the current-sensing technique for the semi-bridgeless PFC converter. The converter features high efficiency at light loads and low ac input lines, which is critical to minimize the charger size, charging time, and amount and cost of electricity drawn from the utility. The converter is applicable for automotive levels I and II but is ideally suited for level-I residential charging applications. A detailed converter description and steady-state operation analysis of this converter is presented. Experimental results of a prototype boost converter, converting the universal ac input voltage to 400 V dc at 3.4 kW, are given, and the results are compared with an interleaved boost converter to verify the proof of concept and the reported analytical work.},\n keywords={Topology;Sensors;MOSFETs;Inductors;Batteries;Semiconductor diodes;Prototypes;AC–DC power converters;boost converter;bridgeless power factor correction (PFC);current sensing;plug-in hybrid electric vehicle (PHEV) charger},\n doi={10.1109/TVT.2012.2231709},\n ISSN={1939-9359},\n month={May},}\n\n In this paper, a phase-shifted semi-bridgeless boost power-factor-corrected (PFC) converter is proposed to simplify the current-sensing technique for the semi-bridgeless PFC converter. The converter features high efficiency at light loads and low ac input lines, which is critical to minimize the charger size, charging time, and amount and cost of electricity drawn from the utility. The converter is applicable for automotive levels I and II but is ideally suited for level-I residential charging applications. A detailed converter description and steady-state operation analysis of this converter is presented. Experimental results of a prototype boost converter, converting the universal ac input voltage to 400 V dc at 3.4 kW, are given, and the results are compared with an interleaved boost converter to verify the proof of concept and the reported analytical work.\n
\n\n\n\n \n\n \n \n Therrien, F., Wang, L., Jatskevich, J., & Wasynczuk, O.\n\n\n \n \n \n \n Efficient Explicit Representation of AC Machines Main Flux Saturation in State-Variable-Based Transient Simulation Packages.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Energy Conversion, 28(2): 380-393. June 2013.\n \n\n\n\n
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\n\n\n@ARTICLE{6471773,\n author={Therrien, Francis and Wang, Liwei and Jatskevich, Juri and Wasynczuk, Oleg},\n journal={IEEE Transactions on Energy Conversion}, \n title={Efficient Explicit Representation of AC Machines Main Flux Saturation in State-Variable-Based Transient Simulation Packages}, \n year={2013},\n volume={28},\n number={2},\n pages={380-393},\n abstract={Inclusion of magnetic saturation in low-order qd models of induction and synchronous machines improves the accuracy of system studies. Over the years, numerous explicit and implicit methods of representing magnetic saturation have been proposed in the literature, some of which find their use in commonly used transient simulation packages. This paper presents a straightforward and improved flux correction method of modeling saturation explicitly in classical qd state variable ac machine models. The approach requires limited additional information and avoids the need for a dynamic inductance, which is present in many other approaches. The method is first developed for induction machines and then extended to salient-pole synchronous machines as a more general case. Computer studies demonstrate the accuracy of the proposed method for predicting the dynamic and steady-state cross-saturation phenomena, as well as its computational advantages.},\n keywords={Saturation magnetization;Mathematical model;Magnetic flux;Computational modeling;Induction machines;Synchronous machines;Equations;AC machines;cross-saturation;dynamic simulation;explicit methods;induction machine;magnetic saturation;synchronous machine},\n doi={10.1109/TEC.2013.2245332},\n ISSN={1558-0059},\n month={June},}\n\n Inclusion of magnetic saturation in low-order qd models of induction and synchronous machines improves the accuracy of system studies. Over the years, numerous explicit and implicit methods of representing magnetic saturation have been proposed in the literature, some of which find their use in commonly used transient simulation packages. This paper presents a straightforward and improved flux correction method of modeling saturation explicitly in classical qd state variable ac machine models. The approach requires limited additional information and avoids the need for a dynamic inductance, which is present in many other approaches. The method is first developed for induction machines and then extended to salient-pole synchronous machines as a more general case. Computer studies demonstrate the accuracy of the proposed method for predicting the dynamic and steady-state cross-saturation phenomena, as well as its computational advantages.\n
\n\n\n\n \n\n \n \n Gautam, D. S., Musavi, F., Eberle, W., & Dunford, W. G.\n\n\n \n \n \n \n A Zero-Voltage Switching Full-Bridge DC–DC Converter With Capacitive Output Filter for Plug-In Hybrid Electric Vehicle Battery Charging.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Electronics, 28(12): 5728-5735. Dec 2013.\n \n\n\n\n
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\n\n\n@ARTICLE{6471835,\n author={Gautam, Deepak S. and Musavi, Fariborz and Eberle, Wilson and Dunford, William G.},\n journal={IEEE Transactions on Power Electronics}, \n title={A Zero-Voltage Switching Full-Bridge DC--DC Converter With Capacitive Output Filter for Plug-In Hybrid Electric Vehicle Battery Charging}, \n year={2013},\n volume={28},\n number={12},\n pages={5728-5735},\n abstract={In this paper, a novel zero-voltage switching full-bridge converter with trailing edge pulse width modulation and capacitive output filter is presented. The target application for this study is the second stage dc–dc converter in a two stage 1.65 kW on-board charger for a plug-in hybrid electric vehicle. For this application the design objective is to achieve high efficiency and low cost in order to minimize the charger size, charging time, and the amount and the cost of electricity drawn from the utility. A detailed converter operation analysis is presented along with simulation and experimental results. In comparison to a benchmark full-bridge with an LC output filter, the proposed converter reduces the reverse recovery losses in the secondary rectifier diodes, therefore, enabling a converter switching frequency of 100 kHz. Experimental results are presented for a prototype unit converting 400 V from the input dc link to an output voltage range of 200–450 V dc at 1650 W. The prototype achieves a peak efficiency of 95.7%.},\n keywords={Zero voltage switching;Inductors;Rectifiers;Capacitance;Pulse width modulation;Equivalent circuits;Analytical models;Battery charger;capacitive filter;dc–dc converter;full-bridge;plug-in hybrid electric vehicle (PHEV);resonant converters;zero-voltage switching (ZVS)},\n doi={10.1109/TPEL.2013.2249671},\n ISSN={1941-0107},\n month={Dec},}\n\n In this paper, a novel zero-voltage switching full-bridge converter with trailing edge pulse width modulation and capacitive output filter is presented. The target application for this study is the second stage dc–dc converter in a two stage 1.65 kW on-board charger for a plug-in hybrid electric vehicle. For this application the design objective is to achieve high efficiency and low cost in order to minimize the charger size, charging time, and the amount and the cost of electricity drawn from the utility. A detailed converter operation analysis is presented along with simulation and experimental results. In comparison to a benchmark full-bridge with an LC output filter, the proposed converter reduces the reverse recovery losses in the secondary rectifier diodes, therefore, enabling a converter switching frequency of 100 kHz. Experimental results are presented for a prototype unit converting 400 V from the input dc link to an output voltage range of 200–450 V dc at 1650 W. The prototype achieves a peak efficiency of 95.7%.\n
\n\n\n\n \n\n \n \n Musavi, F., Craciun, M., Gautam, D. S., Eberle, W., & Dunford, W. G.\n\n\n \n \n \n \n An LLC Resonant DC–DC Converter for Wide Output Voltage Range Battery Charging Applications.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Electronics, 28(12): 5437-5445. Dec 2013.\n \n\n\n\n
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\n\n\n@ARTICLE{6480890,\n author={Musavi, Fariborz and Craciun, Marian and Gautam, Deepak S. and Eberle, Wilson and Dunford, William G.},\n journal={IEEE Transactions on Power Electronics}, \n title={An LLC Resonant DC–DC Converter for Wide Output Voltage Range Battery Charging Applications}, \n year={2013},\n volume={28},\n number={12},\n pages={5437-5445},\n abstract={In this paper, resonant tank design procedure and practical design considerations are presented for a high performance LLC multiresonant dc–dc converter in a two-stage smart battery charger for neighborhood electric vehicle applications. The multiresonant converter has been analyzed and its performance characteristics are presented. It eliminates both low- and high-frequency current ripple on the battery, thus maximizing battery life without penalizing the volume of the charger. Simulation and experimental results are presented for a prototype unit converting 390 V from the input dc link to an output voltage range of 48–72 V dc at 650 W. The prototype achieves a peak efficiency of 96%.},\n keywords={Batteries;Capacitors;MOSFET circuits;Resonant frequency;Switching frequency;Capacitance;Inductors;Batteries;dc–dc power converters;electric vehicles;resonant converters},\n doi={10.1109/TPEL.2013.2241792},\n ISSN={1941-0107},\n month={Dec},}\n\n In this paper, resonant tank design procedure and practical design considerations are presented for a high performance LLC multiresonant dc–dc converter in a two-stage smart battery charger for neighborhood electric vehicle applications. The multiresonant converter has been analyzed and its performance characteristics are presented. It eliminates both low- and high-frequency current ripple on the battery, thus maximizing battery life without penalizing the volume of the charger. Simulation and experimental results are presented for a prototype unit converting 390 V from the input dc link to an output voltage range of 48–72 V dc at 650 W. The prototype achieves a peak efficiency of 96%.\n
\n\n\n\n \n\n \n \n Gautam, D., Wager, D., Musavi, F., Edington, M., Eberle, W., & Dunford, W. G.\n\n\n \n \n \n \n A review of thermal management in power converters with thermal vias.\n \n \n \n\n\n \n\n\n\n In 2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC), pages 627-632, March 2013. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6520276,\n author={Gautam, Deepak and Wager, Dale and Musavi, Fariborz and Edington, Murray and Eberle, Wilson and Dunford, William G.},\n booktitle={2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)}, \n title={A review of thermal management in power converters with thermal vias}, \n year={2013},\n volume={},\n number={},\n pages={627-632},\n abstract={One important challenge in power electronics design is removing the heat cost effectively from the power devices. A thermal via is a small diameter hole plated with copper and is used to transfer the heat from one side of the printed circuit board (PCB) to the other side. In this paper, a thorough literature review of the design and analysis of thermal vias in PCBs for thermal management of devices in power electronics converters are presented. Key advantages of using PCB's for thermal management are also presented. Based on the conclusions drawn from the available literature and practical manufacturing guidelines, four different via patterns for a single power device are selected and their thermal performances are studied. Each of the four via patterns is laid out multiple times on the same PCB. A power component in a D2PAK is soldered to each of the patterns. The PCB is attached to a liquid cooled cold plate. The devices are powered up and a thermal imaging camera is used to record the temperature of the device. The experimental results presented closely matches with the theoretical prediction and helps in identifying the most efficient thermal via pattern.},\n keywords={Thermal resistance;Copper;Thermal analysis;Thermal conductivity;Heating;Thermal management of electronics},\n doi={10.1109/APEC.2013.6520276},\n ISSN={1048-2334},\n month={March},}\n\n One important challenge in power electronics design is removing the heat cost effectively from the power devices. A thermal via is a small diameter hole plated with copper and is used to transfer the heat from one side of the printed circuit board (PCB) to the other side. In this paper, a thorough literature review of the design and analysis of thermal vias in PCBs for thermal management of devices in power electronics converters are presented. Key advantages of using PCB's for thermal management are also presented. Based on the conclusions drawn from the available literature and practical manufacturing guidelines, four different via patterns for a single power device are selected and their thermal performances are studied. Each of the four via patterns is laid out multiple times on the same PCB. A power component in a D2PAK is soldered to each of the patterns. The PCB is attached to a liquid cooled cold plate. The devices are powered up and a thermal imaging camera is used to record the temperature of the device. The experimental results presented closely matches with the theoretical prediction and helps in identifying the most efficient thermal via pattern.\n
\n\n\n\n \n\n \n \n Musavi, F., Craciun, M., Gautam, D., Edington, M., Eberle, W., & Dunford, W. G.\n\n\n \n \n \n \n Control strategies for a LLC multi-resonant DC-DC converter in battery charging applications.\n \n \n \n\n\n \n\n\n\n In 2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC), pages 1804-1811, March 2013. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6520540,\n author={Musavi, Fariborz and Craciun, Marian and Gautam, Deepak and Edington, Murray and Eberle, Wilson and Dunford, William G.},\n booktitle={2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)}, \n title={Control strategies for a LLC multi-resonant DC-DC converter in battery charging applications}, \n year={2013},\n volume={},\n number={},\n pages={1804-1811},\n abstract={In this paper, a control strategy is presented for a high performance LLC multi-resonant dc-dc converter in a two stage smart charger for neighborhood electric vehicle applications. It addresses several aspects and limitations of LLC resonant dc-dc converters in battery charging applications, such as very wide output voltage range while keeping the efficiency maximized, implementation of the current mode control at the secondary side and optimization of burst mode operation for current regulation at very low output voltage. The proposed control scheme minimize both low and high frequency current ripple on the battery while maintaining stability of the dc-dc converter, thus maximizing battery life without penalizing the volume of the charger. Experimental results are presented for a prototype unit converting 390 V from the input dc link to an output voltage range of 48 V to 72 V dc at 650 W. The prototype achieves a peak efficiency of 96 %.},\n keywords={Batteries;Voltage control;Frequency conversion;Frequency control;Resonant frequency;Transfer functions;Switches},\n doi={10.1109/APEC.2013.6520540},\n ISSN={1048-2334},\n month={March},}\n\n In this paper, a control strategy is presented for a high performance LLC multi-resonant dc-dc converter in a two stage smart charger for neighborhood electric vehicle applications. It addresses several aspects and limitations of LLC resonant dc-dc converters in battery charging applications, such as very wide output voltage range while keeping the efficiency maximized, implementation of the current mode control at the secondary side and optimization of burst mode operation for current regulation at very low output voltage. The proposed control scheme minimize both low and high frequency current ripple on the battery while maintaining stability of the dc-dc converter, thus maximizing battery life without penalizing the volume of the charger. Experimental results are presented for a prototype unit converting 390 V from the input dc link to an output voltage range of 48 V to 72 V dc at 650 W. The prototype achieves a peak efficiency of 96 %.\n
\n\n\n\n \n\n \n \n Alam, M. M. U., Eberle, W., & Musavi, F.\n\n\n \n \n \n \n A semi-bridgeless boost power factor corrected converter with an auxiliary zero voltage switching circuit for electric vehicle battery chargers.\n \n \n \n\n\n \n\n\n\n In 2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC), pages 1820-1825, March 2013. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6520542,\n author={Alam, Md. Muntasir Ul and Eberle, Wilson and Musavi, Fariborz},\n booktitle={2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)}, \n title={A semi-bridgeless boost power factor corrected converter with an auxiliary zero voltage switching circuit for electric vehicle battery chargers}, \n year={2013},\n volume={},\n number={},\n pages={1820-1825},\n abstract={This paper presents a new zero-voltage switching (ZVS) semi-bridgeless ac-dc boost converter for application in plug-in hybrid electric vehicle battery chargers. The proposed auxiliary circuit enables ZVS for the main and auxiliary switches, which nearly eliminates all switching losses, enabling improved efficiency. The auxiliary circuit also helps to reduce the reverse-recovery losses of the boost diodes. The detailed operation of the proposed converter, a stress analysis of the auxiliary circuit components, and a proper design procedure are presented. The feasibility of the converter is confirmed by a simulation work operating at 70 kHz switching frequency, 240 V input, and 400 V/3.4 kW output.},\n keywords={Zero voltage switching;Switches;Capacitors;Semiconductor diodes;Inductors;Topology;Zero current switching},\n doi={10.1109/APEC.2013.6520542},\n ISSN={1048-2334},\n month={March},}\n\n This paper presents a new zero-voltage switching (ZVS) semi-bridgeless ac-dc boost converter for application in plug-in hybrid electric vehicle battery chargers. The proposed auxiliary circuit enables ZVS for the main and auxiliary switches, which nearly eliminates all switching losses, enabling improved efficiency. The auxiliary circuit also helps to reduce the reverse-recovery losses of the boost diodes. The detailed operation of the proposed converter, a stress analysis of the auxiliary circuit components, and a proper design procedure are presented. The feasibility of the converter is confirmed by a simulation work operating at 70 kHz switching frequency, 240 V input, and 400 V/3.4 kW output.\n
\n\n\n\n \n\n \n \n Clark, C., Eberle, W., & Musavi, F.\n\n\n \n \n \n \n An adaptive digital controller for the mixed conduction mode boost power factor correction converter.\n \n \n \n\n\n \n\n\n\n In 2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC), pages 2712-2719, March 2013. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6520679,\n author={Clark, Colin and Eberle, Wilson and Musavi, Fariborz},\n booktitle={2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)}, \n title={An adaptive digital controller for the mixed conduction mode boost power factor correction converter}, \n year={2013},\n volume={},\n number={},\n pages={2712-2719},\n abstract={This paper presents a novel adaptive mixed conduction mode (MCM) digital controller to realize total harmonic distortion (THD) and power factor improvements in boost power factor correction (PFC) converters operating over a wide load range in both continuous conduction mode (CCM) and discontinuous conduction mode (DCM) during a single ac line half cycle. By using the integrated comparators found on many digital signal processors (DSPs), a digital DCM detection method allowing a dynamic selection of appropriate compensators gives THD and power factor performance improvements when compared to a conventional digital control technique. At an output power of 98 W, an experimental 650 W boost PFC converter operating in MCM controlled by a TMS320F28035 provides a THD reduction of 40.2% and power factor improvement of 1.5% over a conventional digital controller.},\n keywords={Inductors;Digital signal processing;Switches;Reactive power;Feedforward neural networks;Software;Power generation},\n doi={10.1109/APEC.2013.6520679},\n ISSN={1048-2334},\n month={March},}\n\n This paper presents a novel adaptive mixed conduction mode (MCM) digital controller to realize total harmonic distortion (THD) and power factor improvements in boost power factor correction (PFC) converters operating over a wide load range in both continuous conduction mode (CCM) and discontinuous conduction mode (DCM) during a single ac line half cycle. By using the integrated comparators found on many digital signal processors (DSPs), a digital DCM detection method allowing a dynamic selection of appropriate compensators gives THD and power factor performance improvements when compared to a conventional digital control technique. At an output power of 98 W, an experimental 650 W boost PFC converter operating in MCM controlled by a TMS320F28035 provides a THD reduction of 40.2% and power factor improvement of 1.5% over a conventional digital controller.\n
\n\n\n\n \n\n \n \n Gautam, D., Musavi, F., Edington, M., Eberle, W., & Dunford, W. G.\n\n\n \n \n \n \n An isolated interleaved DC-DC converter with voltage doubler rectifier for PHEV battery charger.\n \n \n \n\n\n \n\n\n\n In 2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC), pages 3067-3072, March 2013. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6520737,\n author={Gautam, Deepak and Musavi, Fariborz and Edington, Murray and Eberle, Wilson and Dunford, William G.},\n booktitle={2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)}, \n title={An isolated interleaved DC-DC converter with voltage doubler rectifier for PHEV battery charger}, \n year={2013},\n volume={},\n number={},\n pages={3067-3072},\n abstract={In this paper, an isolated interleaved zero voltage switching full-bridge converter with trailing edge pulse width modulation and output voltage doubler rectifier is presented. The target application for this work is the second stage dc-dc converter in a two stage 3.3 kW on-board charger for a plug-in hybrid electric vehicle (PHEV). A detailed converter operation analysis is presented along with a design procedure. The interleaved dc-dc converter operates efficiently, shares equal output power and uniformly distributes thermal losses among the individual cells. The proposed converter significantly reduces the number of output rectifier diodes, reduces input filtering requirements and also reduces the reverse recovery losses in the secondary rectifier diodes. Simulation and experimental results are presented for a prototype unit converting 400 V from the input dc link to an output voltage range of 150 V to 400 V dc at 3300 W with a peak efficiency of 96%.},\n keywords={Rectifiers;Zero voltage switching;Inductors;Capacitors;Pulse width modulation;Power generation;Benchmark testing},\n doi={10.1109/APEC.2013.6520737},\n ISSN={1048-2334},\n month={March},}\n\n In this paper, an isolated interleaved zero voltage switching full-bridge converter with trailing edge pulse width modulation and output voltage doubler rectifier is presented. The target application for this work is the second stage dc-dc converter in a two stage 3.3 kW on-board charger for a plug-in hybrid electric vehicle (PHEV). A detailed converter operation analysis is presented along with a design procedure. The interleaved dc-dc converter operates efficiently, shares equal output power and uniformly distributes thermal losses among the individual cells. The proposed converter significantly reduces the number of output rectifier diodes, reduces input filtering requirements and also reduces the reverse recovery losses in the secondary rectifier diodes. Simulation and experimental results are presented for a prototype unit converting 400 V from the input dc link to an output voltage range of 150 V to 400 V dc at 3300 W with a peak efficiency of 96%.\n
\n\n\n\n \n\n \n \n Mei, L., Williams, D., & Eberle, W.\n\n\n \n \n \n \n A predictive analog dead-time control circuit for a buck converter.\n \n \n \n\n\n \n\n\n\n In 2013 26th IEEE Canadian Conference on Electrical and Computer Engineering (CCECE), pages 1-5, May 2013. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6567695,\n author={Mei, Luyan and Williams, David and Eberle, Wilson},\n booktitle={2013 26th IEEE Canadian Conference on Electrical and Computer Engineering (CCECE)}, \n title={A predictive analog dead-time control circuit for a buck converter}, \n year={2013},\n volume={},\n number={},\n pages={1-5},\n abstract={In this paper, a one-step predictive dead-time control circuit for a synchronous buck converter is proposed. It consists of dead-time detection and optimization circuits. The detection circuit utilizes an integrated dead-time detection diode which accurately detects body diode conduction of the synchronous MOSFET. The dead-time optimization circuit is an analog circuit which eliminates the major shortcoming of digital methods, specifically dead-time dithering in the steady state. Operation of the circuit is verified using PSIM. The results of the simulation show that the circuit reduces the body diode conduction time of the synchronous MOSFET to less than 4ns at 20A load, 12V input, 1.2V output and 500kHz switching frequency. As a result, the buck converter conduction losses can be reduced by 16.3%.},\n keywords={MOSFET;Optimization;Pulse width modulation;Logic gates;Capacitors;Benchmark testing;Discharges (electric);power electronics;DC-DC converters;buck converter;dead-time control},\n doi={10.1109/CCECE.2013.6567695},\n ISSN={0840-7789},\n month={May},}\n\n In this paper, a one-step predictive dead-time control circuit for a synchronous buck converter is proposed. It consists of dead-time detection and optimization circuits. The detection circuit utilizes an integrated dead-time detection diode which accurately detects body diode conduction of the synchronous MOSFET. The dead-time optimization circuit is an analog circuit which eliminates the major shortcoming of digital methods, specifically dead-time dithering in the steady state. Operation of the circuit is verified using PSIM. The results of the simulation show that the circuit reduces the body diode conduction time of the synchronous MOSFET to less than 4ns at 20A load, 12V input, 1.2V output and 500kHz switching frequency. As a result, the buck converter conduction losses can be reduced by 16.3%.\n
\n\n\n\n \n\n \n \n Musavi, F., Gautam, D. S., Eberle, W., & Dunford, W. G.\n\n\n \n \n \n \n A simplified power loss calculation method for PFC boost topologies.\n \n \n \n\n\n \n\n\n\n In 2013 IEEE Transportation Electrification Conference and Expo (ITEC), pages 1-5, June 2013. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6573469,\n author={Musavi, Fariborz and Gautam, Deepak S. and Eberle, Wilson and Dunford, William G.},\n booktitle={2013 IEEE Transportation Electrification Conference and Expo (ITEC)}, \n title={A simplified power loss calculation method for PFC boost topologies}, \n year={2013},\n volume={},\n number={},\n pages={1-5},\n abstract={In this paper, a novel, simple and accurate method is proposed to predict the RMS and average current for each component in the most common continuous conduction mode (CCM) AC-DC power factor correction (PFC) boost derived topologies. The model is based on using the effective duty cycle independent of the switching action. The proposed model enables simple and accurate estimation of powertrain component conduction losses. The paper includes the derivation of the RMS, or average current for the boost and interleaved boost PFC topologies. PSIM simulation and experimental results are used to verify the accuracy of model. Experimental and simulation results of a prototype interleaved boost converter converting universal AC input voltage to 400 V DC at up to 3.4 kW output are given to verify the proposed model. The experimental results demonstrate that the model can correctly predict the RMS and average currents in the interleaved boost topology.},\n keywords={Inductors;Topology;MOSFET;Mathematical model;Power generation;Switches;Current measurement},\n doi={10.1109/ITEC.2013.6573469},\n ISSN={},\n month={June},}\n\n In this paper, a novel, simple and accurate method is proposed to predict the RMS and average current for each component in the most common continuous conduction mode (CCM) AC-DC power factor correction (PFC) boost derived topologies. The model is based on using the effective duty cycle independent of the switching action. The proposed model enables simple and accurate estimation of powertrain component conduction losses. The paper includes the derivation of the RMS, or average current for the boost and interleaved boost PFC topologies. PSIM simulation and experimental results are used to verify the accuracy of model. Experimental and simulation results of a prototype interleaved boost converter converting universal AC input voltage to 400 V DC at up to 3.4 kW output are given to verify the proposed model. The experimental results demonstrate that the model can correctly predict the RMS and average currents in the interleaved boost topology.\n
\n\n\n\n \n\n \n \n Clark, C., Eberle, W., & Musavi, F.\n\n\n \n \n \n \n A DSP-based zero current and discontinuous conduction mode detection method.\n \n \n \n\n\n \n\n\n\n In 2013 IEEE Transportation Electrification Conference and Expo (ITEC), pages 1-5, June 2013. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6574512,\n author={Clark, Colin and Eberle, Wilson and Musavi, Fariborz},\n booktitle={2013 IEEE Transportation Electrification Conference and Expo (ITEC)}, \n title={A DSP-based zero current and discontinuous conduction mode detection method}, \n year={2013},\n volume={},\n number={},\n pages={1-5},\n abstract={This paper presents a digital signal processor (DSP)-based zero current detection (ZCD) and discontinuous conduction mode (DCM) digital detection method for the boost power factor correction (PFC) converter. The detection technique employs a DSP with integrated high-speed comparators to allow simple detection of zero inductor current and DCM operation. By avoiding the need for auxiliary circuits, inductor windings, and by effectively using DSP resources, the proposed detection technique realizes cost and performance advantages over alternative detection methods. An experimental 650 W boost PFC converter operating in mixed-conduction mode controlled by a TMS320F28035 confirms the effectiveness of the proposed detection technique.},\n keywords={Inductors;Switches;Digital signal processing;Noise;Hardware;Qualifications;Power factor correction},\n doi={10.1109/ITEC.2013.6574512},\n ISSN={},\n month={June},}\n\n\n This paper presents a digital signal processor (DSP)-based zero current detection (ZCD) and discontinuous conduction mode (DCM) digital detection method for the boost power factor correction (PFC) converter. The detection technique employs a DSP with integrated high-speed comparators to allow simple detection of zero inductor current and DCM operation. By avoiding the need for auxiliary circuits, inductor windings, and by effectively using DSP resources, the proposed detection technique realizes cost and performance advantages over alternative detection methods. An experimental 650 W boost PFC converter operating in mixed-conduction mode controlled by a TMS320F28035 confirms the effectiveness of the proposed detection technique.\n
\n\n\n\n \n\n \n \n Nami, A., Wang, L., Dijkhuizen, F., & Shukla, A.\n\n\n \n \n \n \n Five level cross connected cell for cascaded converters.\n \n \n \n\n\n \n\n\n\n In 2013 15th European Conference on Power Electronics and Applications (EPE), pages 1-9, Sep. 2013. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6631941,\n author={Nami, Alireza and Wang, Liwei and Dijkhuizen, Frans and Shukla, Anshuman},\n booktitle={2013 15th European Conference on Power Electronics and Applications (EPE)}, \n title={Five level cross connected cell for cascaded converters}, \n year={2013},\n volume={},\n number={},\n pages={1-9},\n abstract={Proposed here is an alternate Five-level four-quadrant cascaded multilevel converter cell configuration that compared to the other cell configurations, for dc fault current limitation, will be more compact and avoid the external dc breaker. Loss comparison on cells with dc fault blocking capability for the cascaded converter is also presented.},\n keywords={Fault currents;Switches;Voltage control;Capacitors;Bridge circuits;Electronic mail;Topology;VSC;HVDC;Multilevel converters},\n doi={10.1109/EPE.2013.6631941},\n ISSN={},\n month={Sep.},}\n\n Proposed here is an alternate Five-level four-quadrant cascaded multilevel converter cell configuration that compared to the other cell configurations, for dc fault current limitation, will be more compact and avoid the external dc breaker. Loss comparison on cells with dc fault blocking capability for the cascaded converter is also presented.\n
\n\n\n\n \n\n \n \n Chen, N., Chimento, F., Nawaz, M., & Wang, L.\n\n\n \n \n \n \n Dynamic characterization of parallel-connected high-power IGBT modules.\n \n \n \n\n\n \n\n\n\n In 2013 IEEE Energy Conversion Congress and Exposition, pages 4263-4269, Sep. 2013. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6647270,\n author={Chen, Nan and Chimento, Filippo and Nawaz, Muhammad and Wang, Liwei},\n booktitle={2013 IEEE Energy Conversion Congress and Exposition}, \n title={Dynamic characterization of parallel-connected high-power IGBT modules}, \n year={2013},\n volume={},\n number={},\n pages={4263-4269},\n abstract={In high power converter design, IGBT modules are often operated in parallel to reach high output currents. Evaluating the electrical and thermal behaviour of the paralleling IGBTs is crucial for the design and reliable operation of converter systems. This paper investigates the static and dynamic characterization of paralleling IGBTs and the influence of the electrical parameters on the IGBT behaviour. Si based IGBT power modules with voltage rating of 4.5kV and current rating of 1 kA are used for the experimental evaluation of module parallel connections. Parallel connected modules have been driven by several commercial IGBT gate units at various DC-link voltages and current levels and with different temperatures. The tested IGBT gate units show good current sharing performance between the two parallel modules. Other important influencing factors such as busbar design layout, stray inductance variation and gate driving are also investigated for parallel connections of IGBT modules. Finally, the switching energy of the paralleling modules is extracted for IGBTs and diodes under different conditions.},\n keywords={Insulated gate bipolar transistors;Logic gates;Switches;Inductance;Switching loss;Integrated circuits;Semiconductor diodes;IGBTs;Dynamic characterization;Gate driving;Parallel connection;High power converter;Power module},\n doi={10.1109/ECCE.2013.6647270},\n ISSN={2329-3748},\n month={Sep.},}\n\n In high power converter design, IGBT modules are often operated in parallel to reach high output currents. Evaluating the electrical and thermal behaviour of the paralleling IGBTs is crucial for the design and reliable operation of converter systems. This paper investigates the static and dynamic characterization of paralleling IGBTs and the influence of the electrical parameters on the IGBT behaviour. Si based IGBT power modules with voltage rating of 4.5kV and current rating of 1 kA are used for the experimental evaluation of module parallel connections. Parallel connected modules have been driven by several commercial IGBT gate units at various DC-link voltages and current levels and with different temperatures. The tested IGBT gate units show good current sharing performance between the two parallel modules. Other important influencing factors such as busbar design layout, stray inductance variation and gate driving are also investigated for parallel connections of IGBT modules. Finally, the switching energy of the paralleling modules is extracted for IGBTs and diodes under different conditions.\n
\n\n\n\n \n\n \n \n Mei, L., Williams, D., & Eberle, W.\n\n\n \n \n \n \n A Synchronous Buck Converter Using a New Predictive Analog Dead-Time Control Circuit to Improve Efficiency.\n \n \n \n\n\n \n\n\n\n Canadian Journal of Electrical and Computer Engineering, 36(4): 181-187. Fall 2013.\n \n\n\n\n
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\n\n\n@ARTICLE{6776585,\n author={Mei, Luyan and Williams, David and Eberle, Wilson},\n journal={Canadian Journal of Electrical and Computer Engineering}, \n title={A Synchronous Buck Converter Using a New Predictive Analog Dead-Time Control Circuit to Improve Efficiency}, \n year={2013},\n volume={36},\n number={4},\n pages={181-187},\n abstract={The one-step predictive dead-time control circuit proposed in this paper consists of a dead-time detection circuit and an analog optimization circuit. The detection circuit, which can be manufactured on the same die as the synchronous MOSFET of the buck converter, provides an accurate detection signal that indicates body diode conduction. The proposed dead-time optimization circuit is an analog circuit, which uses the body diode detection signal and eliminates the shortcomings of digital dead-time detection circuits. Operation of the circuit is verified using PSIM. The results of the simulation show that the circuit reduces the body diode conduction time of the synchronous MOSFET to less than 4 ns at 20-A load, 12-V input, 1.2-V output, and 500-kHz switching frequency. As a result, the buck converter conduction losses can be reduced by 16.3%.},\n keywords={MOSFET;Pulse width modulation;Optimization;Switches;Logic gates;Capacitors;Buck converter;dc-dc power converters;dead-time control;power electronics},\n doi={10.1109/CJECE.2014.2303521},\n ISSN={0840-8688},\n month={Fall},}\n\n The one-step predictive dead-time control circuit proposed in this paper consists of a dead-time detection circuit and an analog optimization circuit. The detection circuit, which can be manufactured on the same die as the synchronous MOSFET of the buck converter, provides an accurate detection signal that indicates body diode conduction. The proposed dead-time optimization circuit is an analog circuit, which uses the body diode detection signal and eliminates the shortcomings of digital dead-time detection circuits. Operation of the circuit is verified using PSIM. The results of the simulation show that the circuit reduces the body diode conduction time of the synchronous MOSFET to less than 4 ns at 20-A load, 12-V input, 1.2-V output, and 500-kHz switching frequency. As a result, the buck converter conduction losses can be reduced by 16.3%.\n
\n\n\n\n \n\n \n \n Mei, L., Williams, D., & Eberle, W.\n\n\n \n \n \n \n A synchronous buck converter using a new predictive analog dead-time control circuit to improve efficiency.\n \n \n \n\n\n \n\n\n\n Canadian Journal of Electrical and Computer Engineering, 36(4): 181–187. 2013.\n \n\n\n\n
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\n\n\n\n@article{mei2013synchronous,\n title={A synchronous buck converter using a new predictive analog dead-time control circuit to improve efficiency},\n author={Mei, Luyan and Williams, David and Eberle, Wilson},\n journal={Canadian Journal of Electrical and Computer Engineering},\n volume={36},\n number={4},\n pages={181--187},\n year={2013},\n publisher={IEEE}\n}\n\n\n\n \n\n \n \n Wang, L, & Jatskevich, J\n\n\n \n \n \n \n Modeling of long-cable-fed induction motor drive system for predicting overvoltage transients.\n \n \n \n\n\n \n\n\n\n Енергетика і автоматика, (3): 22–30. 2013.\n \n\n\n\n
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\n\n\n\n@article{wang2013modeling,\n title={Modeling of long-cable-fed induction motor drive system for predicting overvoltage transients},\n author={Wang, L and Jatskevich, J},\n journal={Енергетика і автоматика},\n number={3},\n pages={22--30},\n year={2013},\n publisher={Національний університет біоресурсів і природокористування України}\n}\n\n\n\n
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\n \n \n\n \n \n Musavi, F., Edington, M., Eberle, W., & Dunford, W. G.\n\n\n \n \n \n \n Evaluation and Efficiency Comparison of Front End AC-DC Plug-in Hybrid Charger Topologies.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Smart Grid, 3(1): 413-421. March 2012.\n \n\n\n\n
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\n\n\n@ARTICLE{6056591,\n author={Musavi, Fariborz and Edington, Murray and Eberle, Wilson and Dunford, William G.},\n journal={IEEE Transactions on Smart Grid}, \n title={Evaluation and Efficiency Comparison of Front End AC-DC Plug-in Hybrid Charger Topologies}, \n year={2012},\n volume={3},\n number={1},\n pages={413-421},\n abstract={As a key component of a plug-in hybrid electric vehicle (PHEV) charger system, the front-end ac-dc converter must achieve high efficiency and power density. This paper presents a topology survey evaluating topologies for use in front end ac-dc converters for PHEV battery chargers. The topology survey is focused on several boost power factor corrected converters, which offer high efficiency, high power factor, high density, and low cost. Experimental results are presented and interpreted for five prototype converters, converting universal ac input voltage to 400 V dc. The results demonstrate that the phase shifted semi-bridgeless PFC boost converter is ideally suited for automotive level I residential charging applications in North America, where the typical supply is limited to 120 V and 1.44 kVA or 1.92 kVA. For automotive level II residential charging applications in North America and Europe the bridgeless interleaved PFC boost converter is an ideal topology candidate for typical supplies of 240 V, with power levels of 3.3 kW, 5 kW, and 6.6 kW.},\n keywords={Topology;Batteries;Prototypes;Reactive power;Power generation;Bridge circuits;Semiconductor diodes;AC-DC power converters;DC-DC power converters;power conversion;power electronics;power quality},\n doi={10.1109/TSG.2011.2166413},\n ISSN={1949-3061},\n month={March},}\n\n As a key component of a plug-in hybrid electric vehicle (PHEV) charger system, the front-end ac-dc converter must achieve high efficiency and power density. This paper presents a topology survey evaluating topologies for use in front end ac-dc converters for PHEV battery chargers. The topology survey is focused on several boost power factor corrected converters, which offer high efficiency, high power factor, high density, and low cost. Experimental results are presented and interpreted for five prototype converters, converting universal ac input voltage to 400 V dc. The results demonstrate that the phase shifted semi-bridgeless PFC boost converter is ideally suited for automotive level I residential charging applications in North America, where the typical supply is limited to 120 V and 1.44 kVA or 1.92 kVA. For automotive level II residential charging applications in North America and Europe the bridgeless interleaved PFC boost converter is an ideal topology candidate for typical supplies of 240 V, with power levels of 3.3 kW, 5 kW, and 6.6 kW.\n
\n\n\n\n \n\n \n \n Gautam, D., Musavi, F., Edington, M., Eberle, W., & Dunford, W. G.\n\n\n \n \n \n \n A zero voltage switching full-bridge DC-DC converter with capacitive output filter for a plug-in-hybrid electric vehicle battery charger.\n \n \n \n\n\n \n\n\n\n In 2012 Twenty-Seventh Annual IEEE Applied Power Electronics Conference and Exposition (APEC), pages 1381-1386, Feb 2012. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6166000,\n author={Gautam, Deepak and Musavi, Fariborz and Edington, Murray and Eberle, Wilson and Dunford, William G.},\n booktitle={2012 Twenty-Seventh Annual IEEE Applied Power Electronics Conference and Exposition (APEC)}, \n title={A zero voltage switching full-bridge DC-DC converter with capacitive output filter for a plug-in-hybrid electric vehicle battery charger}, \n year={2012},\n volume={},\n number={},\n pages={1381-1386},\n abstract={In this paper, a novel zero voltage switching full-bridge converter with trailing edge pulse width modulation and capacitive output filter is presented. The target application for this work is the second stage dc-dc converter in a two stage 1.65 kW on-board charger for a plug-in hybrid electric vehicle (PHEV). For this application the design objective is to achieve high efficiency and lower cost in order to minimize the charger size, charging time and the amount and cost of electricity drawn from the utility. A detailed converter operation analysis is presented along with simulation and experimental results. In comparison to a benchmark full-bridge with LC output filter, the proposed converter reduces the reverse recovery losses in the secondary rectifier diodes, therefore enabling a converter switching frequency of 100 kHz. Experimental results are presented for a prototype unit converting 400 V from the input dc link to an output voltage range of 200 V to 450 V dc at 1650 W. The prototype achieves a peak efficiency of 95.7%.},\n keywords={Zero voltage switching;Inductors;Rectifiers;Capacitance;Pulse width modulation;Switches;Inductance},\n doi={10.1109/APEC.2012.6166000},\n ISSN={1048-2334},\n month={Feb},}\n\n In this paper, a novel zero voltage switching full-bridge converter with trailing edge pulse width modulation and capacitive output filter is presented. The target application for this work is the second stage dc-dc converter in a two stage 1.65 kW on-board charger for a plug-in hybrid electric vehicle (PHEV). For this application the design objective is to achieve high efficiency and lower cost in order to minimize the charger size, charging time and the amount and cost of electricity drawn from the utility. A detailed converter operation analysis is presented along with simulation and experimental results. In comparison to a benchmark full-bridge with LC output filter, the proposed converter reduces the reverse recovery losses in the secondary rectifier diodes, therefore enabling a converter switching frequency of 100 kHz. Experimental results are presented for a prototype unit converting 400 V from the input dc link to an output voltage range of 200 V to 450 V dc at 1650 W. The prototype achieves a peak efficiency of 95.7%.\n
\n\n\n\n \n\n \n \n Musavi, F., Craciun, M., Edington, M., Eberle, W., & Dunford, W. G.\n\n\n \n \n \n \n Practical design considerations for a LLC multi-resonant DC-DC converter in battery charging applications.\n \n \n \n\n\n \n\n\n\n In 2012 Twenty-Seventh Annual IEEE Applied Power Electronics Conference and Exposition (APEC), pages 2596-2602, Feb 2012. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6166189,\n author={Musavi, Fariborz and Craciun, Marian and Edington, Murray and Eberle, Wilson and Dunford, William G.},\n booktitle={2012 Twenty-Seventh Annual IEEE Applied Power Electronics Conference and Exposition (APEC)}, \n title={Practical design considerations for a LLC multi-resonant DC-DC converter in battery charging applications}, \n year={2012},\n volume={},\n number={},\n pages={2596-2602},\n abstract={In this paper, resonant tank design procedure and practical design considerations are presented for a high performance LLC multi-resonant dc-dc converter in a two-stage smart battery charger for neighborhood electric vehicle applications. The multi-resonant converter has been analyzed and its performance characteristics are presented. It eliminates both low and high frequency current ripple on the battery, thus maximizing battery life without penalizing the volume of the charger. Simulation and experimental results are presented for a prototype unit converting 390 V from the input dc link to an output voltage range of 48 V to 72 V dc at 650 W. The prototype achieves a peak efficiency of 96%.},\n keywords={Batteries;Capacitors;MOSFET circuits;Resonant frequency;Switching frequency;Inductors;Capacitance},\n doi={10.1109/APEC.2012.6166189},\n ISSN={1048-2334},\n month={Feb},}\n\n In this paper, resonant tank design procedure and practical design considerations are presented for a high performance LLC multi-resonant dc-dc converter in a two-stage smart battery charger for neighborhood electric vehicle applications. The multi-resonant converter has been analyzed and its performance characteristics are presented. It eliminates both low and high frequency current ripple on the battery, thus maximizing battery life without penalizing the volume of the charger. Simulation and experimental results are presented for a prototype unit converting 390 V from the input dc link to an output voltage range of 48 V to 72 V dc at 650 W. The prototype achieves a peak efficiency of 96%.\n
\n\n\n\n \n\n \n \n Alam, M. M. U., Eberle, W., & Musavi, F.\n\n\n \n \n \n \n A zero voltage switching semi-bridgeless boost power factor corrected converter for plug-in hybrid electric vehicle battery chargers.\n \n \n \n\n\n \n\n\n\n In 2012 Twenty-Seventh Annual IEEE Applied Power Electronics Conference and Exposition (APEC), pages 2625-2630, Feb 2012. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6166193,\n author={Alam, Md. Muntasir Ul and Eberle, Wilson and Musavi, Fariborz},\n booktitle={2012 Twenty-Seventh Annual IEEE Applied Power Electronics Conference and Exposition (APEC)}, \n title={A zero voltage switching semi-bridgeless boost power factor corrected converter for plug-in hybrid electric vehicle battery chargers}, \n year={2012},\n volume={},\n number={},\n pages={2625-2630},\n abstract={This paper presents a new zero-voltage switching (ZVS) semi-bridgeless ac-dc boost converter targeted for application in plug-in hybrid electric vehicle battery chargers. Switching losses are nearly eliminated due to a novel and simple auxiliary circuit that enables ZVS for the converter powertrain and auxiliary switches. The detailed operation of the proposed converter, a stress analysis of the auxiliary circuit components, and a detailed control strategy are presented. The feasibility of the converter is confirmed by an experimental prototype operating at 70 kHz switching frequency, 240 V input, and 400 V/3.4 kW output.},\n keywords={Zero voltage switching;Capacitors;Topology;Inductors;Semiconductor diodes;Switches;Zero current switching},\n doi={10.1109/APEC.2012.6166193},\n ISSN={1048-2334},\n month={Feb},}\n\n This paper presents a new zero-voltage switching (ZVS) semi-bridgeless ac-dc boost converter targeted for application in plug-in hybrid electric vehicle battery chargers. Switching losses are nearly eliminated due to a novel and simple auxiliary circuit that enables ZVS for the converter powertrain and auxiliary switches. The detailed operation of the proposed converter, a stress analysis of the auxiliary circuit components, and a detailed control strategy are presented. The feasibility of the converter is confirmed by an experimental prototype operating at 70 kHz switching frequency, 240 V input, and 400 V/3.4 kW output.\n
\n\n\n\n \n\n \n \n Chapariha, M., Wang, L., Jatskevich, J., Dommel, H. W., & Pekarek, S. D.\n\n\n \n \n \n \n Constant-Parameter $RL$-Branch Equivalent Circuit for Interfacing AC Machine Models in State-Variable-Based Simulation Packages.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Energy Conversion, 27(3): 634-645. Sep. 2012.\n \n\n\n\n
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\n\n\n@ARTICLE{6205360,\n author={Chapariha, Mehrdad and Wang, Liwei and Jatskevich, Juri and Dommel, Hermann W. and Pekarek, Steven D.},\n journal={IEEE Transactions on Energy Conversion}, \n title={Constant-Parameter $RL$-Branch Equivalent Circuit for Interfacing AC Machine Models in State-Variable-Based Simulation Packages}, \n year={2012},\n volume={27},\n number={3},\n pages={634-645},\n abstract={Transient simulation programs, either nodal analysis-based electromagnetic transient program (EMTP-like) or state-variable-based, are used very extensively for modeling and simulation of various power and energy systems with electrical machines. It has been shown in the literature that the method of interfacing machine models with the external electrical network plays an important role in numerical accuracy and computational performance of the overall simulation. This paper considers the state-variable-based simulation packages, and provides a constant-parameter decoupled RL-branch equivalent circuit for interfacing the ac induction and synchronous machine models with the external electrical network. The proposed interfacing circuit is based on the voltage-behind-reactance formulation which has been shown to have advantageous properties. For the synchronous machines, this paper describes both implicit and explicit (approximate) interfacing methods. The presented case studies demonstrate the advantages of using the proposed interfacing method over the traditional -models that are conventionally used in many simulation packages.},\n keywords={Integrated circuit modeling;Mathematical model;Rotors;Windings;Numerical models;Equations;Synchronous machines;AC machines;dynamic simulation;induction machine;interfacing circuit;$qd$-model;synchronous machine;voltage-behind-reactance (VBR) model},\n doi={10.1109/TEC.2012.2197623},\n ISSN={1558-0059},\n month={Sep.},}\n\n Transient simulation programs, either nodal analysis-based electromagnetic transient program (EMTP-like) or state-variable-based, are used very extensively for modeling and simulation of various power and energy systems with electrical machines. It has been shown in the literature that the method of interfacing machine models with the external electrical network plays an important role in numerical accuracy and computational performance of the overall simulation. This paper considers the state-variable-based simulation packages, and provides a constant-parameter decoupled RL-branch equivalent circuit for interfacing the ac induction and synchronous machine models with the external electrical network. The proposed interfacing circuit is based on the voltage-behind-reactance formulation which has been shown to have advantageous properties. For the synchronous machines, this paper describes both implicit and explicit (approximate) interfacing methods. The presented case studies demonstrate the advantages of using the proposed interfacing method over the traditional -models that are conventionally used in many simulation packages.\n
\n\n\n\n \n\n \n \n Musavi, F., Edington, M., Eberle, W., & Dunford, W.\n\n\n \n \n \n \n A cost effective high-performance smart battery charger for Off-road and neighborhood EVs.\n \n \n \n\n\n \n\n\n\n In 2012 IEEE Transportation Electrification Conference and Expo (ITEC), pages 1-6, June 2012. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6243489,\n author={Musavi, Fariborz and Edington, Murray and Eberle, Wilson and Dunford, William},\n booktitle={2012 IEEE Transportation Electrification Conference and Expo (ITEC)}, \n title={A cost effective high-performance smart battery charger for Off-road and neighborhood EVs}, \n year={2012},\n volume={},\n number={},\n pages={1-6},\n abstract={In this paper, a high performance two stage smart battery charger has been presented for the Off-road and neighborhood electric vehicles. The proposed charger has been analyzed and its performance characteristics are presented. The charger eliminates both low and high frequency current ripple on the battery, thus maximizing battery life without penalizing the volume of the charger. Experimental and simulation results of a prototype unit converting universal AC input to 58 V DC at 650 W, achieving a peak efficiency of 93.2% at 240 Vin are given to verify the proof of concept, and analytical work reported in this paper.},\n keywords={Batteries;Power generation;Harmonic analysis;Resonant frequency;Inductors;Capacitors;Prototypes},\n doi={10.1109/ITEC.2012.6243489},\n ISSN={},\n month={June},}\n\n In this paper, a high performance two stage smart battery charger has been presented for the Off-road and neighborhood electric vehicles. The proposed charger has been analyzed and its performance characteristics are presented. The charger eliminates both low and high frequency current ripple on the battery, thus maximizing battery life without penalizing the volume of the charger. Experimental and simulation results of a prototype unit converting universal AC input to 58 V DC at 650 W, achieving a peak efficiency of 93.2% at 240 Vin are given to verify the proof of concept, and analytical work reported in this paper.\n
\n\n\n\n \n\n \n \n Gautam, D., Musavi, F., Edington, M., Eberle, W., & Dunford, W.\n\n\n \n \n \n \n A zero voltage switching full-bridge DC-DC converter for an on-board PHEV battery charger.\n \n \n \n\n\n \n\n\n\n In 2012 IEEE Transportation Electrification Conference and Expo (ITEC), pages 1-6, June 2012. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6243491,\n author={Gautam, Deepak and Musavi, Fariborz and Edington, Murray and Eberle, Wilson and Dunford, William},\n booktitle={2012 IEEE Transportation Electrification Conference and Expo (ITEC)}, \n title={A zero voltage switching full-bridge DC-DC converter for an on-board PHEV battery charger}, \n year={2012},\n volume={},\n number={},\n pages={1-6},\n abstract={In this paper, a detailed mode analysis and design procedure is presented for 3.3 kW zero voltage switching full-bridge dc-dc converter operating in continuous conduction mode. The target application for the work is an on-board charger for a plug-in hybrid electric vehicle (PHEV). A PHEV battery charger consists of an ac-dc front end power factor correction circuit (PFC), followed by a dc-dc converter. For this application the design objective is to achieve high efficiency, in order to minimize the charger size, charging time and the amount and cost of electricity drawn from the utility. This paper presents a new detailed state of operation analysis of the dc-dc converter, a detailed design procedure, simulation and experimental results. The prototype achieves a peak efficiency of 96% at a full load of 3.3 kW at 400V output with a 400V input and a switching frequency of 200 kHz.},\n keywords={Inductors;Zero voltage switching;MOSFETs;Batteries;Capacitance;Current transformers;Rectifiers},\n doi={10.1109/ITEC.2012.6243491},\n ISSN={},\n month={June},}\n\n In this paper, a detailed mode analysis and design procedure is presented for 3.3 kW zero voltage switching full-bridge dc-dc converter operating in continuous conduction mode. The target application for the work is an on-board charger for a plug-in hybrid electric vehicle (PHEV). A PHEV battery charger consists of an ac-dc front end power factor correction circuit (PFC), followed by a dc-dc converter. For this application the design objective is to achieve high efficiency, in order to minimize the charger size, charging time and the amount and cost of electricity drawn from the utility. This paper presents a new detailed state of operation analysis of the dc-dc converter, a detailed design procedure, simulation and experimental results. The prototype achieves a peak efficiency of 96% at a full load of 3.3 kW at 400V output with a 400V input and a switching frequency of 200 kHz.\n
\n\n\n\n \n\n \n \n Gautam, D. S., Musavi, F., Edington, M., Eberle, W., & Dunford, W. G.\n\n\n \n \n \n \n An Automotive Onboard 3.3-kW Battery Charger for PHEV Application.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Vehicular Technology, 61(8): 3466-3474. Oct 2012.\n \n\n\n\n
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\n\n\n@ARTICLE{6248733,\n author={Gautam, Deepak S. and Musavi, Fariborz and Edington, Murray and Eberle, Wilson and Dunford, William G.},\n journal={IEEE Transactions on Vehicular Technology}, \n title={An Automotive Onboard 3.3-kW Battery Charger for PHEV Application}, \n year={2012},\n volume={61},\n number={8},\n pages={3466-3474},\n abstract={An onboard charger is responsible for charging the battery pack in a plug-in hybrid electric vehicle (PHEV). In this paper, a 3.3-kW two-stage battery charger design is presented for a PHEV application. The objective of the design is to achieve high efficiency, which is critical to minimize the charger size, charging time, and the amount and cost of electricity drawn from the utility. The operation of the charger power converter configuration is provided in addition to a detailed design procedure. The mechanical packaging design and key experimental results are provided to verify the suitability of the proposed charger power architecture.},\n keywords={Inductors;Batteries;Zero voltage switching;Capacitors;Rectifiers;Switching frequency;Capacitance;AC–DC power converters;batteries;dc–dc power converters;energy conservation;energy storage;power conversion},\n doi={10.1109/TVT.2012.2210259},\n ISSN={1939-9359},\n month={Oct},}\n\n An onboard charger is responsible for charging the battery pack in a plug-in hybrid electric vehicle (PHEV). In this paper, a 3.3-kW two-stage battery charger design is presented for a PHEV application. The objective of the design is to achieve high efficiency, which is critical to minimize the charger size, charging time, and the amount and cost of electricity drawn from the utility. The operation of the charger power converter configuration is provided in addition to a detailed design procedure. The mechanical packaging design and key experimental results are provided to verify the suitability of the proposed charger power architecture.\n
\n\n\n\n \n\n \n \n Therrien, F., Wang, L., & Jatskevich, J.\n\n\n \n \n \n \n Explicit and implicit representation of saturation for induction machines modelling in state-variable transient simulators.\n \n \n \n\n\n \n\n\n\n In 2012 25th IEEE Canadian Conference on Electrical and Computer Engineering (CCECE), pages 1-4, April 2012. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6334995,\n author={Therrien, Francis and Wang, Liwei and Jatskevich, Juri},\n booktitle={2012 25th IEEE Canadian Conference on Electrical and Computer Engineering (CCECE)}, \n title={Explicit and implicit representation of saturation for induction machines modelling in state-variable transient simulators}, \n year={2012},\n volume={},\n number={},\n pages={1-4},\n abstract={Classical low-order qd saturable induction machine models are available as built-in component models in commonly used state-variable-based transient simulation packages/toolboxes. This paper investigates the implementation of the main flux saturation in symmetrical squirrel-cage induction machines using the so-called flux correction (FC) method, wherein implicit (with algebraic loop) and explicit (without algebraic loop) implementations are possible. The presented computer studies demonstrate accuracy and efficiency of several commonly used low-order models and approaches. The explicit FC method is proposed as a very effective and accurate way of representing the effects of saturation even at large time steps, which is a very desirable property.},\n keywords={Abstracts;Indexes;Saturation magnetization;Argon;Manuals;Induction machines;modeling;saturation;state-variable approach;transient simulation},\n doi={10.1109/CCECE.2012.6334995},\n ISSN={0840-7789},\n month={April},}\n\n Classical low-order qd saturable induction machine models are available as built-in component models in commonly used state-variable-based transient simulation packages/toolboxes. This paper investigates the implementation of the main flux saturation in symmetrical squirrel-cage induction machines using the so-called flux correction (FC) method, wherein implicit (with algebraic loop) and explicit (without algebraic loop) implementations are possible. The presented computer studies demonstrate accuracy and efficiency of several commonly used low-order models and approaches. The explicit FC method is proposed as a very effective and accurate way of representing the effects of saturation even at large time steps, which is a very desirable property.\n
\n\n\n\n \n\n \n \n Gautam, D., Musavi, F., Edington, M., Eberle, W., & Dunford, W. G.\n\n\n \n \n \n \n An interleaved ZVS full-bridge DC-DC converter with capacitive output filter for a PHEV charger.\n \n \n \n\n\n \n\n\n\n In 2012 IEEE Energy Conversion Congress and Exposition (ECCE), pages 2827-2832, Sep. 2012. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6342527,\n author={Gautam, Deepak and Musavi, Fariborz and Edington, Murray and Eberle, Wilson and Dunford, William G.},\n booktitle={2012 IEEE Energy Conversion Congress and Exposition (ECCE)}, \n title={An interleaved ZVS full-bridge DC-DC converter with capacitive output filter for a PHEV charger}, \n year={2012},\n volume={},\n number={},\n pages={2827-2832},\n abstract={In this paper, an interleaved zero voltage switching full-bridge dc-dc converter with trailing edge pulse width modulation and capacitive output filter is presented. The interleaved dc-dc converter operates efficiently, shares equal output power and uniformly distributes thermal losses among the individual cells. In comparison to a benchmark interleaved full-bridge with LC output filter, the proposed converter reduces the input and output filtering requirements and also reduces the reverse recovery losses in the secondary rectifier diodes. Simulation and experimental results are presented for a prototype unit converting 400 V from the input dc link to an output voltage range of 200 V to 450 V dc at 3300 W with a peak efficiency of 95.7%.},\n keywords={Zero voltage switching;Benchmark testing;Pulse width modulation;Rectifiers;Inductors;Power generation;Batteries},\n doi={10.1109/ECCE.2012.6342527},\n ISSN={2329-3748},\n month={Sep.},}\n\n In this paper, an interleaved zero voltage switching full-bridge dc-dc converter with trailing edge pulse width modulation and capacitive output filter is presented. The interleaved dc-dc converter operates efficiently, shares equal output power and uniformly distributes thermal losses among the individual cells. In comparison to a benchmark interleaved full-bridge with LC output filter, the proposed converter reduces the input and output filtering requirements and also reduces the reverse recovery losses in the secondary rectifier diodes. Simulation and experimental results are presented for a prototype unit converting 400 V from the input dc link to an output voltage range of 200 V to 450 V dc at 3300 W with a peak efficiency of 95.7%.\n
\n\n\n\n \n\n \n \n Musavi, F., Edington, M., & Eberle, W.\n\n\n \n \n \n \n Wireless power transfer: A survey of EV battery charging technologies.\n \n \n \n\n\n \n\n\n\n In 2012 IEEE Energy Conversion Congress and Exposition (ECCE), pages 1804-1810, Sep. 2012. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6342593,\n author={Musavi, Fariborz and Edington, Murray and Eberle, Wilson},\n booktitle={2012 IEEE Energy Conversion Congress and Exposition (ECCE)}, \n title={Wireless power transfer: A survey of EV battery charging technologies}, \n year={2012},\n volume={},\n number={},\n pages={1804-1810},\n abstract={In this paper, a comprehensive review of existing technological solutions for wireless power transfer used in electric vehicle battery chargers is given. The concept of each solution is thoroughly reviewed and the feasibility is evaluated considering the present limitations in power electronics technology, cost and consumer acceptance. In addition, the challenges and advantages of each technology are discussed. Finally a thorough comparison is made and a proposed mixed conductive/wireless charging system solution is suggested to solve the inherent existing problems.},\n keywords={Wireless communication;Batteries;Vehicles;Resonant frequency;Couplings;Coils;Transmitters},\n doi={10.1109/ECCE.2012.6342593},\n ISSN={2329-3748},\n month={Sep.},}\n\n In this paper, a comprehensive review of existing technological solutions for wireless power transfer used in electric vehicle battery chargers is given. The concept of each solution is thoroughly reviewed and the feasibility is evaluated considering the present limitations in power electronics technology, cost and consumer acceptance. In addition, the challenges and advantages of each technology are discussed. Finally a thorough comparison is made and a proposed mixed conductive/wireless charging system solution is suggested to solve the inherent existing problems.\n
\n\n\n\n \n\n \n \n Wang, L., & Jatskevich, J.\n\n\n \n \n \n \n Magnetically-saturable voltage-behind-reactance synchronous machine model for EMTP-type solution.\n \n \n \n\n\n \n\n\n\n In 2012 IEEE Power and Energy Society General Meeting, pages 1-1, July 2012. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6344670,\n author={Wang, Liwei and Jatskevich, Juri},\n booktitle={2012 IEEE Power and Energy Society General Meeting}, \n title={Magnetically-saturable voltage-behind-reactance synchronous machine model for EMTP-type solution}, \n year={2012},\n volume={},\n number={},\n pages={1-1},\n abstract={Summary form only given: A so-called voltage-behind-reactance (VBR) machine model has recently been proposed for the electro-magnetic transient programs (EMTP) as an advantageous alternative to the conventional qd and phase-domain models. This paper extends the previous research and proposes a magnetically saturable VBR synchronous machine model for EMTP-type solutions. The proposed saturable VBR model utilizes the saliency factor approach to represent main-flux saturation for the salient-pole synchronous machines with the qd axes static and dynamic cross saturation included. An efficient piecewise-linear method is used for representing the nonlinear saturation characteristic within the discretized EMTP solution. Case studies verify that the new model maintains the improved numerical accuracy in steady state and transients even with large time step.},\n keywords={Synchronous machines;Saturation magnetization;Transient analysis;EMTP;Numerical models;Accuracy;Steady-state},\n doi={10.1109/PESGM.2012.6344670},\n ISSN={1944-9925},\n month={July},}\n\n Summary form only given: A so-called voltage-behind-reactance (VBR) machine model has recently been proposed for the electro-magnetic transient programs (EMTP) as an advantageous alternative to the conventional qd and phase-domain models. This paper extends the previous research and proposes a magnetically saturable VBR synchronous machine model for EMTP-type solutions. The proposed saturable VBR model utilizes the saliency factor approach to represent main-flux saturation for the salient-pole synchronous machines with the qd axes static and dynamic cross saturation included. An efficient piecewise-linear method is used for representing the nonlinear saturation characteristic within the discretized EMTP solution. Case studies verify that the new model maintains the improved numerical accuracy in steady state and transients even with large time step.\n
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\n\n \n \n 2011\n \n \n (6)\n \n \n
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\n \n \n\n \n \n Wang, L., & Jatskevich, J.\n\n\n \n \n \n \n Magnetically-Saturable Voltage-Behind-Reactance Synchronous Machine Model for EMTP-Type Solution.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Systems, 26(4): 2355-2363. Nov 2011.\n \n\n\n\n
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\n\n\n@ARTICLE{5720278,\n author={Wang, Liwei and Jatskevich, Juri},\n journal={IEEE Transactions on Power Systems}, \n title={Magnetically-Saturable Voltage-Behind-Reactance Synchronous Machine Model for EMTP-Type Solution}, \n year={2011},\n volume={26},\n number={4},\n pages={2355-2363},\n abstract={A so-called voltage-behind-reactance (VBR) machine model has recently been proposed for the electro-magnetic transient programs (EMTP) as an advantageous alternative to the conventional qd and phase-domain models. This paper extends the previous research and proposes a magnetically saturable VBR synchronous machine model for EMTP-type solutions. The proposed saturable VBR model utilizes the saliency factor approach to represent main-flux saturation for the salient-pole synchronous machines with the qd axes static and dynamic cross saturation included. An efficient piecewise-linear method is used for representing the nonlinear saturation characteristic within the discretized EMTP solution. Case studies verify that the new model maintains the improved numerical accuracy in steady state and transients even with large time step.},\n keywords={Mathematical model;Saturation magnetization;Synchronous machines;Numerical models;EMTP;Electro-magnetic transient programs (EMTP);magnetic saturation;phase-domain model;synchronous machine modeling;voltage-behind-reactance model},\n doi={10.1109/TPWRS.2011.2107755},\n ISSN={1558-0679},\n month={Nov},}\n\n A so-called voltage-behind-reactance (VBR) machine model has recently been proposed for the electro-magnetic transient programs (EMTP) as an advantageous alternative to the conventional qd and phase-domain models. This paper extends the previous research and proposes a magnetically saturable VBR synchronous machine model for EMTP-type solutions. The proposed saturable VBR model utilizes the saliency factor approach to represent main-flux saturation for the salient-pole synchronous machines with the qd axes static and dynamic cross saturation included. An efficient piecewise-linear method is used for representing the nonlinear saturation characteristic within the discretized EMTP solution. Case studies verify that the new model maintains the improved numerical accuracy in steady state and transients even with large time step.\n
\n\n\n\n \n\n \n \n Musavi, F., Eberle, W., & Dunford, W. G.\n\n\n \n \n \n \n A phase shifted semi-bridgeless boost power factor corrected converter for plug in hybrid electric vehicle battery chargers.\n \n \n \n\n\n \n\n\n\n In 2011 Twenty-Sixth Annual IEEE Applied Power Electronics Conference and Exposition (APEC), pages 821-828, March 2011. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{5744690,\n author={Musavi, Fariborz and Eberle, Wilson and Dunford, William G.},\n booktitle={2011 Twenty-Sixth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)}, \n title={A phase shifted semi-bridgeless boost power factor corrected converter for plug in hybrid electric vehicle battery chargers}, \n year={2011},\n volume={},\n number={},\n pages={821-828},\n abstract={In this paper, a phase shifted semi-bridgeless boost power factor corrected converter is proposed for plug in hybrid electric vehicle battery chargers. The converter features high efficiency at light loads and low lines, which is critical to minimize the charger size, charging time and the amount and cost of electricity drawn from the utility; the component count, which reduces the charger cost; and reduced EMI. The converter is ideally suited for automotive level I residential charging applications. A detailed converter description and steady state operation analysis of this converter is presented. Experimental results of a prototype boost converter, converting universal AC input voltage to 400 V DC at 3.4 kW are given and the results are compared to an interleaved boost converter to verify the proof of concept, and analytical work reported. The results show a power factor greater than 0.99 from 750 W to 3.4 kW, THD less than 5% from half load to full load and a peak efficiency of 98.6 % at 240 V input and 1000 W load.},\n keywords={Converters;Topology;Semiconductor diodes;Inductors;Batteries;Bridge circuits;Rectifiers},\n doi={10.1109/APEC.2011.5744690},\n ISSN={1048-2334},\n month={March},}\n\n In this paper, a phase shifted semi-bridgeless boost power factor corrected converter is proposed for plug in hybrid electric vehicle battery chargers. The converter features high efficiency at light loads and low lines, which is critical to minimize the charger size, charging time and the amount and cost of electricity drawn from the utility; the component count, which reduces the charger cost; and reduced EMI. The converter is ideally suited for automotive level I residential charging applications. A detailed converter description and steady state operation analysis of this converter is presented. Experimental results of a prototype boost converter, converting universal AC input voltage to 400 V DC at 3.4 kW are given and the results are compared to an interleaved boost converter to verify the proof of concept, and analytical work reported. The results show a power factor greater than 0.99 from 750 W to 3.4 kW, THD less than 5% from half load to full load and a peak efficiency of 98.6 % at 240 V input and 1000 W load.\n
\n\n\n\n \n\n \n \n Musavi, F., Eberle, W., & Dunford, W. G.\n\n\n \n \n \n \n A High-Performance Single-Phase Bridgeless Interleaved PFC Converter for Plug-in Hybrid Electric Vehicle Battery Chargers.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Industry Applications, 47(4): 1833-1843. July 2011.\n \n\n\n\n
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\n\n\n@ARTICLE{5771100,\n author={Musavi, Fariborz and Eberle, Wilson and Dunford, William G.},\n journal={IEEE Transactions on Industry Applications}, \n title={A High-Performance Single-Phase Bridgeless Interleaved PFC Converter for Plug-in Hybrid Electric Vehicle Battery Chargers}, \n year={2011},\n volume={47},\n number={4},\n pages={1833-1843},\n abstract={In this paper, a new front end ac-dc bridgeless interleaved power factor correction topology is proposed for level II plug-in hybrid electric vehicle (PHEV) battery charging. The topology can achieve high efficiency, which is critical for minimizing the charger size, PHEV charging time and the amount and cost of electricity drawn from the utility. In addition, a detailed analytical model for this topology is presented, enabling the calculation of the converter power losses and efficiency. Experimental and simulation results are included for a prototype boost converter converting universal ac input voltage (85-265 V) to 400 V dc output at up to 3.4 kW load. The experimental results demonstrate a power factor greater than 0.99 from 750 W to 3.4 kW, THD less than 5% from half load to full load and a peak efficiency of 98.9% at 70 kHz switching frequency, 265 V input and 1.2 kW load.},\n keywords={Topology;Inductors;Semiconductor diodes;Bridge circuits;Batteries;Steady-state;Electromagnetic interference;AC–DC power converters;boost converter;bridgeless power factor correction (PFC);interleaved PFC;plug-in hybrid electric vehicle (PHEV) charger},\n doi={10.1109/TIA.2011.2156753},\n ISSN={1939-9367},\n month={July},}\n\n In this paper, a new front end ac-dc bridgeless interleaved power factor correction topology is proposed for level II plug-in hybrid electric vehicle (PHEV) battery charging. The topology can achieve high efficiency, which is critical for minimizing the charger size, PHEV charging time and the amount and cost of electricity drawn from the utility. In addition, a detailed analytical model for this topology is presented, enabling the calculation of the converter power losses and efficiency. Experimental and simulation results are included for a prototype boost converter converting universal ac input voltage (85-265 V) to 400 V dc output at up to 3.4 kW load. The experimental results demonstrate a power factor greater than 0.99 from 750 W to 3.4 kW, THD less than 5% from half load to full load and a peak efficiency of 98.9% at 70 kHz switching frequency, 265 V input and 1.2 kW load.\n
\n\n\n\n \n\n \n \n Gautam, D., Musavi, F., Edington, M., Eberle, W., & Dunford, W. G.\n\n\n \n \n \n \n An automotive on-board 3.3 kW battery charger for PHEV application.\n \n \n \n\n\n \n\n\n\n In 2011 IEEE Vehicle Power and Propulsion Conference, pages 1-6, Sep. 2011. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6043192,\n author={Gautam, Deepak and Musavi, Fariborz and Edington, Murray and Eberle, Wilson and Dunford, William G.},\n booktitle={2011 IEEE Vehicle Power and Propulsion Conference}, \n title={An automotive on-board 3.3 kW battery charger for PHEV application}, \n year={2011},\n volume={},\n number={},\n pages={1-6},\n abstract={An on-board charger is responsible for charging the battery pack in a plug-in hybrid electric vehicle (PHEV). In this paper, a 3.3kW two stage battery charger design is presented for a PHEV application. The objective of the design is to achieve high efficiency, which is critical to minimize the charger size, charging time and the amount and cost of electricity drawn from the utility. The operation of the charger power converter configuration is provided in addition to a detailed design procedure. The mechanical packaging design and key experimental results are provided to verify the suitability of the proposed charger power architecture.},\n keywords={Inductors;Batteries;Switches;Power generation;Zero voltage switching;Rectifiers;Capacitance},\n doi={10.1109/VPPC.2011.6043192},\n ISSN={1938-8756},\n month={Sep.},}\n\n An on-board charger is responsible for charging the battery pack in a plug-in hybrid electric vehicle (PHEV). In this paper, a 3.3kW two stage battery charger design is presented for a PHEV application. The objective of the design is to achieve high efficiency, which is critical to minimize the charger size, charging time and the amount and cost of electricity drawn from the utility. The operation of the charger power converter configuration is provided in addition to a detailed design procedure. The mechanical packaging design and key experimental results are provided to verify the suitability of the proposed charger power architecture.\n
\n\n\n\n \n\n \n \n Musavi, F., Edington, M., Eberle, W., & Dunford, W. G.\n\n\n \n \n \n \n Energy efficiency in plug-in hybrid electric vehicle chargers: Evaluation and comparison of front end AC-DC topologies.\n \n \n \n\n\n \n\n\n\n In 2011 IEEE Energy Conversion Congress and Exposition, pages 273-280, Sep. 2011. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6063780,\n author={Musavi, Fariborz and Edington, Murray and Eberle, Wilson and Dunford, William G.},\n booktitle={2011 IEEE Energy Conversion Congress and Exposition}, \n title={Energy efficiency in plug-in hybrid electric vehicle chargers: Evaluation and comparison of front end AC-DC topologies}, \n year={2011},\n volume={},\n number={},\n pages={273-280},\n abstract={As a key component of a plug-in hybrid electric vehicle (PHEV) charger system, the front-end ac-dc converter must achieve high efficiency and power density. This paper presents a topology survey evaluating topologies for use in front end ac-dc converters for PHEV battery chargers. The topology survey is focused on several boost power factor corrected converters, which offer high efficiency, high power factor, high density and low cost. Experimental results are presented and interpreted for five prototype converters, converting universal ac input voltage to 400 V dc. The results demonstrate that the phase shifted semi-bridgeless PFC boost converter is ideally suited for automotive level I residential charging applications in North America, where the typical supply is limited to 120 V and 1.44 kVA. For automotive level II residential charging applications in North America and Europe the bridgeless interleaved PFC boost converter is an ideal topology candidate for typical supplies of 120 V and 240 V, with power levels of 3.3 kW, 5 kW and 6.6 kW.},\n keywords={Topology;Prototypes;Batteries;Power generation;Inductors;Semiconductor diodes;Bridge circuits},\n doi={10.1109/ECCE.2011.6063780},\n ISSN={2329-3748},\n month={Sep.},}\n\n As a key component of a plug-in hybrid electric vehicle (PHEV) charger system, the front-end ac-dc converter must achieve high efficiency and power density. This paper presents a topology survey evaluating topologies for use in front end ac-dc converters for PHEV battery chargers. The topology survey is focused on several boost power factor corrected converters, which offer high efficiency, high power factor, high density and low cost. Experimental results are presented and interpreted for five prototype converters, converting universal ac input voltage to 400 V dc. The results demonstrate that the phase shifted semi-bridgeless PFC boost converter is ideally suited for automotive level I residential charging applications in North America, where the typical supply is limited to 120 V and 1.44 kVA. For automotive level II residential charging applications in North America and Europe the bridgeless interleaved PFC boost converter is an ideal topology candidate for typical supplies of 120 V and 240 V, with power levels of 3.3 kW, 5 kW and 6.6 kW.\n
\n\n\n\n \n\n \n \n Musavi, F., Edington, M., Eberle, W., & Dunford, W. G.\n\n\n \n \n \n \n The effect of ripple steering on control loop stability for a CCM PFC boost converter.\n \n \n \n\n\n \n\n\n\n In 2011 IEEE Energy Conversion Congress and Exposition, pages 3193-3199, Sep. 2011. \n \n\n\n\n
\n\n\n\n \n\n \n \n doi\n \n \n\n \n link\n \n \n\n bibtex\n \n\n \n \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n \n \n \n \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{6064199,\n author={Musavi, Fariborz and Edington, Murray and Eberle, Wilson and Dunford, William G.},\n booktitle={2011 IEEE Energy Conversion Congress and Exposition}, \n title={The effect of ripple steering on control loop stability for a CCM PFC boost converter}, \n year={2011},\n volume={},\n number={},\n pages={3193-3199},\n abstract={In this paper, an average switch model approach to the power stage modeling, feedback compensation and dynamic analysis of PFC boost converters with coupled magnetic filter is presented. The model is expressed by derivation of power stage transfer functions for a conventional boost converter, and then followed by the power stage transfer functions for a PFC boost converter with coupled magnetic filter. Experimental and simulation results of a prototype boost converter converting universal AC input voltage to 400 V DC at 1.8 kW are given to verify the proof of concept, and analytical work reported. The experimental results demonstrate that the model can correctly predict the steady-state and large signal dynamic behavior of a CCM PFC boost converter with coupled magnetic filter.},\n keywords={Inductors;Transfer functions;Integrated circuit modeling;Magnetic separation;Switches;Capacitors;Equivalent circuits},\n doi={10.1109/ECCE.2011.6064199},\n ISSN={2329-3748},\n month={Sep.},}\n\n In this paper, an average switch model approach to the power stage modeling, feedback compensation and dynamic analysis of PFC boost converters with coupled magnetic filter is presented. The model is expressed by derivation of power stage transfer functions for a conventional boost converter, and then followed by the power stage transfer functions for a PFC boost converter with coupled magnetic filter. Experimental and simulation results of a prototype boost converter converting universal AC input voltage to 400 V DC at 1.8 kW are given to verify the proof of concept, and analytical work reported. The experimental results demonstrate that the model can correctly predict the steady-state and large signal dynamic behavior of a CCM PFC boost converter with coupled magnetic filter.\n
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\n\n \n \n 2010\n \n \n (8)\n \n \n
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\n \n \n\n \n \n Wang, L., & Jatskevich, J.\n\n\n \n \n \n \n Including Magnetic Saturation in Voltage-Behind-Reactance Induction Machine Model for EMTP-Type Solution.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Systems, 25(2): 975-987. May 2010.\n \n\n\n\n
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\n\n\n@ARTICLE{5340625,\n author={Wang, Liwei and Jatskevich, Juri},\n journal={IEEE Transactions on Power Systems}, \n title={Including Magnetic Saturation in Voltage-Behind-Reactance Induction Machine Model for EMTP-Type Solution}, \n year={2010},\n volume={25},\n number={2},\n pages={975-987},\n abstract={A voltage-behind-reactance (VBR) machine model has been recently proposed for the electro-magnetic transient programs (EMTP)-type simulation programs. The VBR model greatly improves numerical accuracy and efficiency compared with the traditional qd and phase-domain (PD) models. This paper extends the previous research and presents an approach to include magnetic saturation into the VBR induction machine model. The presented method takes into account the qd axes static and dynamic cross saturation, whereas the nonlinear magnetic characteristic is represented using a piecewise-linear method that is suitable for the EMTP solution approach. Case studies verify the new saturable VBR model and show that it has improved numerical stability and accuracy even at large time steps.},\n keywords={Saturation magnetization;Voltage;Induction machines;Magnetic flux;Power system modeling;EMTP;Piecewise linear techniques;Power system transients;Nonlinear magnetics;Magnetic materials;Electro-magnetic transient programs (EMTP);induction machine;magnetic saturation;piecewise-linear approximation;voltage-behind-reactance model},\n doi={10.1109/TPWRS.2009.2032659},\n ISSN={1558-0679},\n month={May},}\n\n A voltage-behind-reactance (VBR) machine model has been recently proposed for the electro-magnetic transient programs (EMTP)-type simulation programs. The VBR model greatly improves numerical accuracy and efficiency compared with the traditional qd and phase-domain (PD) models. This paper extends the previous research and presents an approach to include magnetic saturation into the VBR induction machine model. The presented method takes into account the qd axes static and dynamic cross saturation, whereas the nonlinear magnetic characteristic is represented using a piecewise-linear method that is suitable for the EMTP solution approach. Case studies verify the new saturable VBR model and show that it has improved numerical stability and accuracy even at large time steps.\n
\n\n\n\n \n\n \n \n Wang, L., & Jatskevich, J.\n\n\n \n \n \n \n Approximate Voltage-Behind-Reactance Induction Machine Model for Efficient Interface With EMTP Network Solution.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Systems, 25(2): 1016-1031. May 2010.\n \n\n\n\n
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\n\n\n@ARTICLE{5340684,\n author={Wang, Liwei and Jatskevich, Juri},\n journal={IEEE Transactions on Power Systems}, \n title={Approximate Voltage-Behind-Reactance Induction Machine Model for Efficient Interface With EMTP Network Solution}, \n year={2010},\n volume={25},\n number={2},\n pages={1016-1031},\n abstract={A so-called voltage-behind-reactance (VBR) induction machine model has recently been proposed for the Electro-Magnetic Transient Program (EMTP) solution as an advantageous alternative to the traditional qd and phase-domain (PD) models. This paper focuses on achieving an efficient interface of the machine models with the EMTP network. It is shown first that a discretized PD model can be formulated to have a constant machine conductance submatrix, which is a very desirable numerical property that allows avoiding the re-factorization of the network conductance matrix at every time step. Furthermore, an approximate voltage-behind-reactance (AVBR) model is proposed where the rotor-speed-dependent coefficients are neglected, thus leading to a similar constant machine conductance submatrix and efficient interface. Case studies demonstrate that the new AVBR model represents a significant improvement in terms of numerical accuracy and efficiency over other established models used in EMTP.},\n keywords={Voltage;Induction machines;EMTP;PSCAD;Power system modeling;Predictive models;Power system transients;EMTDC;Nonlinear equations;Power engineering and energy;Approximate voltage-behind-reactance model;constant conductance matrix;Electro-Magnetic Transient Program (EMTP);G matrix;induction machine;phase-domain model;voltage-behind-reactance model},\n doi={10.1109/TPWRS.2009.2034526},\n ISSN={1558-0679},\n month={May},}\n\n A so-called voltage-behind-reactance (VBR) induction machine model has recently been proposed for the Electro-Magnetic Transient Program (EMTP) solution as an advantageous alternative to the traditional qd and phase-domain (PD) models. This paper focuses on achieving an efficient interface of the machine models with the EMTP network. It is shown first that a discretized PD model can be formulated to have a constant machine conductance submatrix, which is a very desirable numerical property that allows avoiding the re-factorization of the network conductance matrix at every time step. Furthermore, an approximate voltage-behind-reactance (AVBR) model is proposed where the rotor-speed-dependent coefficients are neglected, thus leading to a similar constant machine conductance submatrix and efficient interface. Case studies demonstrate that the new AVBR model represents a significant improvement in terms of numerical accuracy and efficiency over other established models used in EMTP.\n
\n\n\n\n \n\n \n \n Wang, L., Jatskevich, J., Dinavahi, V., Dommel, H. W., Martinez, J. A., Strunz, K., Rioual, M., Chang, G. W., & Iravani, R.\n\n\n \n \n \n \n Methods of Interfacing Rotating Machine Models in Transient Simulation Programs.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Delivery, 25(2): 891-903. April 2010.\n \n\n\n\n
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\n\n\n@ARTICLE{5411963,\n author={Wang, L. and Jatskevich, J. and Dinavahi, V. and Dommel, H. W. and Martinez, J. A. and Strunz, K. and Rioual, M. and Chang, G. W. and Iravani, R.},\n journal={IEEE Transactions on Power Delivery}, \n title={Methods of Interfacing Rotating Machine Models in Transient Simulation Programs}, \n year={2010},\n volume={25},\n number={2},\n pages={891-903},\n abstract={The electromagnetic transient programs (EMTP-like tools) are based on the nodal (or modified nodal) equations that enable an efficient numerical solution and, subsequently, fast time-domain simulations. The state-variable-based simulation programs, such as Simulink, are also used for studying the dynamics of electrical systems. Both the offline and real-time versions of these two types of simulation tools are widely used by the researchers and engineers in industry and academia to study the transient phenomena and dynamics in power systems with rotating electrical machines. This paper provides a summary of the interfacing techniques that are utilized to integrate the general-purpose models of electrical machines with the rest of the power system network for these studies. The interfacing methods are broadly classified as indirect and direct approaches. The paper also describes the numerical properties as well as limitations imposed by the interfacing of the commonly used machine models that should be considered when selecting the simulation parameters and assessing the final results.},\n keywords={Rotating machines;Power system dynamics;Power system simulation;Power system transients;Power system modeling;Electromagnetic transients;EMTP;Equations;Time domain analysis;Real time systems;Electrical machines;electromagnetic transients;Electromagnetic Transients Program (EMTP);interfacing techniques;simulation;state-variable approach},\n doi={10.1109/TPWRD.2009.2039809},\n ISSN={1937-4208},\n month={April},}\n\n The electromagnetic transient programs (EMTP-like tools) are based on the nodal (or modified nodal) equations that enable an efficient numerical solution and, subsequently, fast time-domain simulations. The state-variable-based simulation programs, such as Simulink, are also used for studying the dynamics of electrical systems. Both the offline and real-time versions of these two types of simulation tools are widely used by the researchers and engineers in industry and academia to study the transient phenomena and dynamics in power systems with rotating electrical machines. This paper provides a summary of the interfacing techniques that are utilized to integrate the general-purpose models of electrical machines with the rest of the power system network for these studies. The interfacing methods are broadly classified as indirect and direct approaches. The paper also describes the numerical properties as well as limitations imposed by the interfacing of the commonly used machine models that should be considered when selecting the simulation parameters and assessing the final results.\n
\n\n\n\n \n\n \n \n Wang, L., Ngai-Man Ho, C., Canales, F., & Jatskevich, J.\n\n\n \n \n \n \n High-Frequency Modeling of the Long-Cable-Fed Induction Motor Drive System Using TLM Approach for Predicting Overvoltage Transients.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Electronics, 25(10): 2653-2664. Oct 2010.\n \n\n\n\n
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\n\n\n@ARTICLE{5439836,\n author={Wang, Liwei and Ngai-Man Ho, Carl and Canales, Francisco and Jatskevich, Juri},\n journal={IEEE Transactions on Power Electronics}, \n title={High-Frequency Modeling of the Long-Cable-Fed Induction Motor Drive System Using TLM Approach for Predicting Overvoltage Transients}, \n year={2010},\n volume={25},\n number={10},\n pages={2653-2664},\n abstract={Induction motor drive systems fed with cables are widely used in many industrial applications. Accurate prediction of motor terminal overvoltage, caused by impedance mismatch between the long cable and the motor, plays an important role for motor dielectric insulation and optimal design of dv/dt filters. In this paper, a novel modeling methodology for the investigation of long-cable-fed induction motor drive overvoltage is proposed. An improved high-frequency motor equivalent circuit model is developed to represent the motor high-frequency behavior for the time- and frequency-domain analyses. The motor equivalent circuit parameters for the differential mode (DM) and common mode (CM) are extracted based on the measurements. A high-frequency cable model based on improved high-order multiple-$\\pi$ sections is proposed. The cable model parameters are identified from the DM impedances in open circuit (OC) and short circuit (SC). To obtain a computationally efficient solution that could potentially be integrated with the motor drive controller, the system equations are discretized and solved using transmission-line modeling (TLM) approach. The proposed methodology is verified on an experimental 2.2-kW ABB motor drive benchmark system. The motor overvoltage transients predicted by the proposed model is in excellent agreement with the experimental results and represents a significant improvement compared with the conventional models.},\n keywords={Predictive models;Induction motor drives;Voltage control;Cables;Power system transients;Impedance;Delta modulation;Circuits;Motor drives;Dielectrics;High-frequency modeling;impedance measurement;induction motor drives;long cable;overvoltage transients;transmission-line modeling (TLM)},\n doi={10.1109/TPEL.2010.2047027},\n ISSN={1941-0107},\n month={Oct},}\n\n Induction motor drive systems fed with cables are widely used in many industrial applications. Accurate prediction of motor terminal overvoltage, caused by impedance mismatch between the long cable and the motor, plays an important role for motor dielectric insulation and optimal design of dv/dt filters. In this paper, a novel modeling methodology for the investigation of long-cable-fed induction motor drive overvoltage is proposed. An improved high-frequency motor equivalent circuit model is developed to represent the motor high-frequency behavior for the time- and frequency-domain analyses. The motor equivalent circuit parameters for the differential mode (DM) and common mode (CM) are extracted based on the measurements. A high-frequency cable model based on improved high-order multiple-$π$ sections is proposed. The cable model parameters are identified from the DM impedances in open circuit (OC) and short circuit (SC). To obtain a computationally efficient solution that could potentially be integrated with the motor drive controller, the system equations are discretized and solved using transmission-line modeling (TLM) approach. The proposed methodology is verified on an experimental 2.2-kW ABB motor drive benchmark system. The motor overvoltage transients predicted by the proposed model is in excellent agreement with the experimental results and represents a significant improvement compared with the conventional models.\n
\n\n\n\n \n\n \n \n Wang, L., & Jatskevich, J.\n\n\n \n \n \n \n Including magnetic saturation in voltage-behind-reactance induction machine model for EMTP-type solution.\n \n \n \n\n\n \n\n\n\n In IEEE PES General Meeting, pages 1-1, July 2010. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{5590195,\n author={Wang, Liwei and Jatskevich, Juri},\n booktitle={IEEE PES General Meeting}, \n title={Including magnetic saturation in voltage-behind-reactance induction machine model for EMTP-type solution}, \n year={2010},\n volume={},\n number={},\n pages={1-1},\n abstract={Summary form only given. A voltage-behind-reactance (VBR) machine model has been recently proposed for the EMTP-type simulation programs. The VBR model greatly improves numerical accuracy and efficiency compared with the traditional qd and phase-domain (PD) models. This paper extends the previous research and presents an approach to include magnetic saturation into the VBR induction machine model. The presented method takes into account the qd axes static and dynamic cross saturation, whereas the nonlinear magnetic characteristic is represented using a piecewise-linear method that is suitable for the EMTP solution approach. Case studies verify the new saturable VBR model and show that it has improved numerical stability and accuracy even at large time steps.},\n keywords={Numerical models;Induction machines;Saturation magnetization;Accuracy;EMTP;Nonlinear magnetics;Numerical stability},\n doi={10.1109/PES.2010.5590195},\n ISSN={1944-9925},\n month={July},}\n\n Summary form only given. A voltage-behind-reactance (VBR) machine model has been recently proposed for the EMTP-type simulation programs. The VBR model greatly improves numerical accuracy and efficiency compared with the traditional qd and phase-domain (PD) models. This paper extends the previous research and presents an approach to include magnetic saturation into the VBR induction machine model. The presented method takes into account the qd axes static and dynamic cross saturation, whereas the nonlinear magnetic characteristic is represented using a piecewise-linear method that is suitable for the EMTP solution approach. Case studies verify the new saturable VBR model and show that it has improved numerical stability and accuracy even at large time steps.\n
\n\n\n\n \n\n \n \n Musavi, F., Eberle, W., & Dunford, W. G.\n\n\n \n \n \n \n A high-performance single-phase AC-DC power factor corrected boost converter for plug in hybrid electric vehicle battery chargers.\n \n \n \n\n\n \n\n\n\n In 2010 IEEE Energy Conversion Congress and Exposition, pages 3588-3595, Sep. 2010. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{5617709,\n author={Musavi, Fariborz and Eberle, Wilson and Dunford, William G.},\n booktitle={2010 IEEE Energy Conversion Congress and Exposition}, \n title={A high-performance single-phase AC-DC power factor corrected boost converter for plug in hybrid electric vehicle battery chargers}, \n year={2010},\n volume={},\n number={},\n pages={3588-3595},\n abstract={In this paper, several conventional plug in hybrid electric vehicle charger front end AC-DC converter topologies are investigated and a new bridgeless interleaved PFC converter is proposed to improve the efficiency and performance. Experimental and simulation results of a prototype boost converter converting universal AC input voltage to 400 V DC at 3.4 kW are given to verify the proof of concept, and analytical work reported in this paper.},\n keywords={Converters;Topology;Inductors;Semiconductor diodes;Bridge circuits;Steady-state;Plugs;Bridgeless PFC;Interleaved PFC;PFC boost converter;PHEV charger},\n doi={10.1109/ECCE.2010.5617709},\n ISSN={2329-3748},\n month={Sep.},}\n\n In this paper, several conventional plug in hybrid electric vehicle charger front end AC-DC converter topologies are investigated and a new bridgeless interleaved PFC converter is proposed to improve the efficiency and performance. Experimental and simulation results of a prototype boost converter converting universal AC input voltage to 400 V DC at 3.4 kW are given to verify the proof of concept, and analytical work reported in this paper.\n
\n\n\n\n \n\n \n \n Wang, L., Ho, C. N., Canales, F., & Jatskevich, J.\n\n\n \n \n \n \n High-frequency cable and motor modeling of long-cable-fed induction motor drive systems.\n \n \n \n\n\n \n\n\n\n In 2010 IEEE Energy Conversion Congress and Exposition, pages 846-852, Sep. 2010. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{5617906,\n author={Wang, Liwei and Ho, Carl N.M. and Canales, Francisco and Jatskevich, Juri},\n booktitle={2010 IEEE Energy Conversion Congress and Exposition}, \n title={High-frequency cable and motor modeling of long-cable-fed induction motor drive systems}, \n year={2010},\n volume={},\n number={},\n pages={846-852},\n abstract={This paper proposes a novel modeling methodology for the investigation of long-cable-fed induction motor drive overvoltage. A high-frequency cable model based on improved high-order multiple-π sections is proposed. The cable model parameters are identified from the DM impedances in open circuit (OC) and short circuit (SC). An improved high-frequency motor equivalent circuit model is developed to represent the motor high-frequency behavior for the time- and frequency-domain analyses. The motor equivalent-circuit parameters for the differential mode (DM) and common mode (CM) are extracted based on the measurements. The proposed modeling methodology is verified on an experimental 2.2 kW ABB motor drive benchmark system. The motor overvoltage transients predicted by the proposed model is in excellent agreement with the experimental results and represents a significant improvement compared with the conventional models.},\n keywords={Induction motors;Power cables;Integrated circuit modeling;Voltage control;Impedance measurement;Delta modulation;Predictive models;Cable modeling;high-frequency modeling;impedance measurement;induction motor drives;long cable;overvoltage transients},\n doi={10.1109/ECCE.2010.5617906},\n ISSN={2329-3748},\n month={Sep.},}\n\n This paper proposes a novel modeling methodology for the investigation of long-cable-fed induction motor drive overvoltage. A high-frequency cable model based on improved high-order multiple-π sections is proposed. The cable model parameters are identified from the DM impedances in open circuit (OC) and short circuit (SC). An improved high-frequency motor equivalent circuit model is developed to represent the motor high-frequency behavior for the time- and frequency-domain analyses. The motor equivalent-circuit parameters for the differential mode (DM) and common mode (CM) are extracted based on the measurements. The proposed modeling methodology is verified on an experimental 2.2 kW ABB motor drive benchmark system. The motor overvoltage transients predicted by the proposed model is in excellent agreement with the experimental results and represents a significant improvement compared with the conventional models.\n
\n\n\n\n \n\n \n \n Musavi, F., Eberle, W., & Dunford, W. G.\n\n\n \n \n \n \n Efficiency evaluation of single-phase solutions for AC-DC PFC boost converters for plug-in-hybrid electric vehicle battery chargers.\n \n \n \n\n\n \n\n\n\n In 2010 IEEE Vehicle Power and Propulsion Conference, pages 1-6, Sep. 2010. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{5729187,\n author={Musavi, Fariborz and Eberle, Wilson and Dunford, Wiliam G.},\n booktitle={2010 IEEE Vehicle Power and Propulsion Conference}, \n title={Efficiency evaluation of single-phase solutions for AC-DC PFC boost converters for plug-in-hybrid electric vehicle battery chargers}, \n year={2010},\n volume={},\n number={},\n pages={1-6},\n abstract={In this paper, the bridgeless interleaved boost topology is proposed for plug-in hybrid electric vehicle and electric vehicle battery chargers to achieve high efficiency, which is critical to minimize the charger size, charging time and the amount and cost of electricity drawn from the utility. An analytical model for this topology is developed, enabling the calculation of power losses and efficiency. Experimental and simulation results of prototype units converting the universal AC input voltage to 400 V DC at 3.4 kW are given to verify the proof of concept, and analytical work reported in this paper.},\n keywords={Converters;Topology;Semiconductor diodes;Bridge circuits;Power generation;Inductors;FETs;Boost Converter;Single phase PFC;Interleaved PFC;Bridgeless PFC;PHEV Charger},\n doi={10.1109/VPPC.2010.5729187},\n ISSN={1938-8756},\n month={Sep.},}\n\n\n In this paper, the bridgeless interleaved boost topology is proposed for plug-in hybrid electric vehicle and electric vehicle battery chargers to achieve high efficiency, which is critical to minimize the charger size, charging time and the amount and cost of electricity drawn from the utility. An analytical model for this topology is developed, enabling the calculation of power losses and efficiency. Experimental and simulation results of prototype units converting the universal AC input voltage to 400 V DC at 3.4 kW are given to verify the proof of concept, and analytical work reported in this paper.\n
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\n \n \n\n \n \n Eberle, W., Zhang, Z., Liu, Y., & Sen, P. C.\n\n\n \n \n \n \n A Practical Switching Loss Model for Buck Voltage Regulators.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Electronics, 24(3): 700-713. March 2009.\n \n\n\n\n
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\n\n\n@ARTICLE{4757277,\n author={Eberle, Wilson and Zhang, Zhiliang and Liu, Yan-Fei and Sen, Paresh C.},\n journal={IEEE Transactions on Power Electronics}, \n title={A Practical Switching Loss Model for Buck Voltage Regulators}, \n year={2009},\n volume={24},\n number={3},\n pages={700-713},\n abstract={In this paper, a review of switching loss mechanisms for synchronous buck voltage regulators (VRs) is presented. Following the review, a new simple and accurate analytical switching loss model is proposed for synchronous buck VRs. The model includes the impact of common source inductance and switch parasitic inductances on switching loss. The proposed model uses simple equations to calculate the rise and fall times and piecewise linear approximations of the high-side MOSFET voltage and current waveforms to allow quick and accurate calculation of switching loss in a synchronous buck VR. A simulation program with integrated circuit emphasis (Spice) simulations are used to demonstrate the accuracy of the voltage source driver model operating in a 1-MHz synchronous buck VR at 12-V input, 1.3-V output. Switching loss was estimated with the proposed model and compared to Spice measurements. Experimental results are presented to demonstrate the accuracy of the proposed model.},\n keywords={Switching loss;Voltage;Regulators;Switches;Integrated circuit modeling;Virtual reality;Analytical models;Inductance;Equations;Piecewise linear approximation;DC–DC power conversion;modeling;MOSFETs},\n doi={10.1109/TPEL.2008.2007845},\n ISSN={1941-0107},\n month={March},}\n\n In this paper, a review of switching loss mechanisms for synchronous buck voltage regulators (VRs) is presented. Following the review, a new simple and accurate analytical switching loss model is proposed for synchronous buck VRs. The model includes the impact of common source inductance and switch parasitic inductances on switching loss. The proposed model uses simple equations to calculate the rise and fall times and piecewise linear approximations of the high-side MOSFET voltage and current waveforms to allow quick and accurate calculation of switching loss in a synchronous buck VR. A simulation program with integrated circuit emphasis (Spice) simulations are used to demonstrate the accuracy of the voltage source driver model operating in a 1-MHz synchronous buck VR at 12-V input, 1.3-V output. Switching loss was estimated with the proposed model and compared to Spice measurements. Experimental results are presented to demonstrate the accuracy of the proposed model.\n
\n\n\n\n \n\n \n \n Zhang, Z., Eberle, W., Liu, Y., & Sen, P. C.\n\n\n \n \n \n \n A Nonisolated ZVS Asymmetrical Buck Voltage Regulator Module With Direct Energy Transfer.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Industrial Electronics, 56(8): 3096-3105. Aug 2009.\n \n\n\n\n
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\n\n\n@ARTICLE{4957107,\n author={Zhang, Zhiliang and Eberle, Wilson and Liu, Yan-Fei and Sen, Paresh C.},\n journal={IEEE Transactions on Industrial Electronics}, \n title={A Nonisolated ZVS Asymmetrical Buck Voltage Regulator Module With Direct Energy Transfer}, \n year={2009},\n volume={56},\n number={8},\n pages={3096-3105},\n abstract={This paper presents a new nonisolated asymmetrical buck voltage regulator module. A transformer is used to extend the extremely low duty cycle of a conventional buck converter. Turn-off losses can be significantly reduced due to the extension of duty cycle, and there are no turn-on losses owing to the zero-voltage turn-on condition. At the same time, the voltage stress over the synchronous rectifier MOSFETs is also reduced. Therefore, the reverse-recovery losses of the body diode can be reduced. Furthermore, the MOSFETs with lower voltage rating and lower RDS(on) can be used to reduce the conduction losses. In order to reduce the turn-off losses above the switching frequency of 1 MHz further, a new current-source driver is also proposed, which is suitable to this new topology. A 12-V input prototype with the switching frequency of 1 MHz was implemented. Simulation and experimental results verify the functionality and benefits of the proposed topology.},\n keywords={Zero voltage switching;Regulators;Energy exchange;MOSFETs;Switching frequency;Topology;Buck converters;Stress;Rectifiers;Diodes;Buck converter;current-source driver (CSD);synchronous rectifier (SR);voltage regulator module (VRM);zero-voltage switching (ZVS)},\n doi={10.1109/TIE.2009.2023102},\n ISSN={1557-9948},\n month={Aug},}\n\n This paper presents a new nonisolated asymmetrical buck voltage regulator module. A transformer is used to extend the extremely low duty cycle of a conventional buck converter. Turn-off losses can be significantly reduced due to the extension of duty cycle, and there are no turn-on losses owing to the zero-voltage turn-on condition. At the same time, the voltage stress over the synchronous rectifier MOSFETs is also reduced. Therefore, the reverse-recovery losses of the body diode can be reduced. Furthermore, the MOSFETs with lower voltage rating and lower RDS(on) can be used to reduce the conduction losses. In order to reduce the turn-off losses above the switching frequency of 1 MHz further, a new current-source driver is also proposed, which is suitable to this new topology. A 12-V input prototype with the switching frequency of 1 MHz was implemented. Simulation and experimental results verify the functionality and benefits of the proposed topology.\n
\n\n\n\n \n\n \n \n Wang, L., & Jatskevich, J.\n\n\n \n \n \n \n A voltage-behind-reactance induction machine model for the EMTP-Type solution.\n \n \n \n\n\n \n\n\n\n In 2009 IEEE Power & Energy Society General Meeting, pages 1-1, July 2009. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{5275842,\n author={Wang, Liwei and Jatskevich, Juri},\n booktitle={2009 IEEE Power & Energy Society General Meeting}, \n title={A voltage-behind-reactance induction machine model for the EMTP-Type solution}, \n year={2009},\n volume={},\n number={},\n pages={1-1},\n abstract={Recently, there has been renewed interest in modeling of electrical machines for the EMTP-type programs, with the goal of improving the machine-network interface. In this paper, we present a new voltage-behind-reactance induction machine model for the EMTP-type solution and power system transients. In the proposed model, the stator circuit is represented in phase coordinates and the rotor subsystem is expressed in arbitrary reference frame. Similar to the recently proposed synchronous-machine voltage-behind-reactance model and the established phase-domain model, simultaneous solution of the machine-network electrical variables is achieved. Efficient numerical implementation of the proposed model is presented, in which one time-step requires as little as 108 flops, taking 1.6 mirco-second of CPU time. Case studies of induction machine start-up transients demonstrate that the proposed model is more accurate and efficient than several existing EMTP machine models.},\n keywords={Voltage;Induction machines;Power system modeling;Power system transients;Stators;Circuits;EMTP},\n doi={10.1109/PES.2009.5275842},\n ISSN={1932-5517},\n month={July},}\n\n Recently, there has been renewed interest in modeling of electrical machines for the EMTP-type programs, with the goal of improving the machine-network interface. In this paper, we present a new voltage-behind-reactance induction machine model for the EMTP-type solution and power system transients. In the proposed model, the stator circuit is represented in phase coordinates and the rotor subsystem is expressed in arbitrary reference frame. Similar to the recently proposed synchronous-machine voltage-behind-reactance model and the established phase-domain model, simultaneous solution of the machine-network electrical variables is achieved. Efficient numerical implementation of the proposed model is presented, in which one time-step requires as little as 108 flops, taking 1.6 mirco-second of CPU time. Case studies of induction machine start-up transients demonstrate that the proposed model is more accurate and efficient than several existing EMTP machine models.\n
\n\n\n\n \n\n \n \n Fu, J., Zhang, Z., Eberle, W., Liu, Y., & Sen, P.\n\n\n \n \n \n \n A high efficiency current source driver with negative gate voltage for buck voltage regulators.\n \n \n \n\n\n \n\n\n\n In 2009 IEEE Energy Conversion Congress and Exposition, pages 1663-1670, Sep. 2009. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{5316231,\n author={Fu, Jizhen and Zhang, Zhiliang and Eberle, Wilson and Liu, Yan-Fei and Sen, P.C.},\n booktitle={2009 IEEE Energy Conversion Congress and Exposition}, \n title={A high efficiency current source driver with negative gate voltage for buck voltage regulators}, \n year={2009},\n volume={},\n number={},\n pages={1663-1670},\n abstract={In this paper a novel current source driver (CSD) for power MOSFETs is proposed. The proposed CSD alleviates the gate current diversion problem of the CSDs in previous work by clamping the gate voltage to a negative value. Therefore, the proposed driver is able to turn off the MOSFET much faster with a higher effective gate current. The idea presented in this paper can also be extended to other CSDs to improve the efficiency further at high output currents. The experimental results verify the benefits of the proposed CSD. For buck converter with 12 V input at 1 MHz, the proposed driver improves the efficiency from 80.5% using the previous CSD to 82.5% (an improvement of 2%) at 1.2 V/30 A, and at 1.3 V/30 A output, from 82.5% to 83.9% (an improvement of 1.4%).},\n keywords={Voltage;Regulators;MOSFETs;Switching loss;Driver circuits;Buck converters;Power engineering and energy;Switching frequency;Inductance;Bonding;Voltage Regulators (VRs);Buck Converter;Current Source Driver (CSD);Current Diversion Problem;Negative Gate Voltage},\n doi={10.1109/ECCE.2009.5316231},\n ISSN={2329-3748},\n month={Sep.},}\n\n In this paper a novel current source driver (CSD) for power MOSFETs is proposed. The proposed CSD alleviates the gate current diversion problem of the CSDs in previous work by clamping the gate voltage to a negative value. Therefore, the proposed driver is able to turn off the MOSFET much faster with a higher effective gate current. The idea presented in this paper can also be extended to other CSDs to improve the efficiency further at high output currents. The experimental results verify the benefits of the proposed CSD. For buck converter with 12 V input at 1 MHz, the proposed driver improves the efficiency from 80.5% using the previous CSD to 82.5% (an improvement of 2%) at 1.2 V/30 A, and at 1.3 V/30 A output, from 82.5% to 83.9% (an improvement of 1.4%).\n
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\n \n \n\n \n \n Ye, S., Eberle, W., & Liu, Y.\n\n\n \n \n \n \n A Novel Non-Isolated Full Bridge Topology for VRM Applications.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Electronics, 23(1): 427-437. Jan 2008.\n \n\n\n\n
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\n\n\n@ARTICLE{4403897,\n author={Ye, Sheng and Eberle, Wilson and Liu, Yan-Fei},\n journal={IEEE Transactions on Power Electronics}, \n title={A Novel Non-Isolated Full Bridge Topology for VRM Applications}, \n year={2008},\n volume={23},\n number={1},\n pages={427-437},\n abstract={ In this paper, a new non-isolated full bridge (NFB) topology is introduced to solve the narrow duty cycle and hard switching problems of the Buck converter in low output voltage, high output current applications. In comparison to the Buck converter, it operates at a significantly wider duty cycle and can achieve zero voltage switching for the high side MOSFETs. The NFB significantly reduces the input peak current and transfers a portion of the primary side energy directly to the load thereby reducing the stress on the synchronous rectifiers and filter inductors. Using self-driven synchronous rectifiers, the body diode conduction loss is reduced since no dead time is required between the primary side MOSFETs and the synchronous rectifiers. Given these significant advantages, the NFB can achieve higher efficiency than a two and three phase interleaved Buck at the same power level. The efficiency gain enables the NFB to operate at a high switching frequency thereby enabling smaller output inductors to be used to achieve improved dynamic performance. },\n keywords={Topology;Feedback amplifiers;Rectifiers;Prototypes;Bridge circuits;Buck converters;MOSFETs;Inductors;Switching frequency;Low voltage;Full bridge (FB);non-isolated full bridge (NFB);phase shifted FB;voltage regulation module (VRM)},\n doi={10.1109/TPEL.2007.911848},\n ISSN={1941-0107},\n month={Jan},}\n\n In this paper, a new non-isolated full bridge (NFB) topology is introduced to solve the narrow duty cycle and hard switching problems of the Buck converter in low output voltage, high output current applications. In comparison to the Buck converter, it operates at a significantly wider duty cycle and can achieve zero voltage switching for the high side MOSFETs. The NFB significantly reduces the input peak current and transfers a portion of the primary side energy directly to the load thereby reducing the stress on the synchronous rectifiers and filter inductors. Using self-driven synchronous rectifiers, the body diode conduction loss is reduced since no dead time is required between the primary side MOSFETs and the synchronous rectifiers. Given these significant advantages, the NFB can achieve higher efficiency than a two and three phase interleaved Buck at the same power level. The efficiency gain enables the NFB to operate at a high switching frequency thereby enabling smaller output inductors to be used to achieve improved dynamic performance. \n
\n\n\n\n \n\n \n \n Zhang, Z., Eberle, W., Yang, Z., Liu, Y., & Sen, P. C.\n\n\n \n \n \n \n Optimal Design of Resonant Gate Driver for Buck Converter Based on a New Analytical Loss Model.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Electronics, 23(2): 653-666. March 2008.\n \n\n\n\n
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\n\n\n@ARTICLE{4451708,\n author={Zhang, Zhiliang and Eberle, Wilson and Yang, Zhihua and Liu, Yan-Fei and Sen, Paresh C.},\n journal={IEEE Transactions on Power Electronics}, \n title={Optimal Design of Resonant Gate Driver for Buck Converter Based on a New Analytical Loss Model}, \n year={2008},\n volume={23},\n number={2},\n pages={653-666},\n abstract={In this paper, the advantages of a new resonant driver are verified thoroughly by the analytical analysis, simulation and experimental results. A new accurate analytical loss model of the power metal oxide semiconductor field effect transistor driven by a current-source resonant gate driver is developed. Closed-formed analytical equations are derived to investigate the switching characteristics due to the parasitic inductance. The modeling and simulation results prove that compared to a voltage driver, a current-source resonant driver significantly reduces the propagation impact of the common source inductance during the switching transition at high (>1 MHz) switching frequency, which leads to a significant reduction of the switching transition time and the switching loss. Based on the proposed loss model, a general method to optimize the new resonant driver is proposed and employed in the development of a 12 V synchronous buck voltage regulator (VR) prototype at 1 MHz switching frequency. The level-shift circuit and digital implementation of complex programmable logic device (CPLD) are also presented. The analytical modeling matches the simulation results and experimental results well. Through the optimal design, a significant efficiency improvement is achieved. At 1.5 V output, the resonant driver improves the VR efficiency from 82.7% using a conventional driver to 86.6% at 20 A, and from 76.9% using a conventional driver to 83.6% at 30 A. More importantly, compared with other state of the art VR approaches, the new resonant driver is promising from the standpoints of both performance and cost-effectiveness.},\n keywords={Resonance;Buck converters;Analytical models;Driver circuits;Virtual reality;Inductance;Voltage;Switching frequency;FETs;Equations;Resonant gate driver;switching loss model;voltage regulator (VR)},\n doi={10.1109/TPEL.2007.915615},\n ISSN={1941-0107},\n month={March},}\n\n In this paper, the advantages of a new resonant driver are verified thoroughly by the analytical analysis, simulation and experimental results. A new accurate analytical loss model of the power metal oxide semiconductor field effect transistor driven by a current-source resonant gate driver is developed. Closed-formed analytical equations are derived to investigate the switching characteristics due to the parasitic inductance. The modeling and simulation results prove that compared to a voltage driver, a current-source resonant driver significantly reduces the propagation impact of the common source inductance during the switching transition at high (>1 MHz) switching frequency, which leads to a significant reduction of the switching transition time and the switching loss. Based on the proposed loss model, a general method to optimize the new resonant driver is proposed and employed in the development of a 12 V synchronous buck voltage regulator (VR) prototype at 1 MHz switching frequency. The level-shift circuit and digital implementation of complex programmable logic device (CPLD) are also presented. The analytical modeling matches the simulation results and experimental results well. Through the optimal design, a significant efficiency improvement is achieved. At 1.5 V output, the resonant driver improves the VR efficiency from 82.7% using a conventional driver to 86.6% at 20 A, and from 76.9% using a conventional driver to 83.6% at 30 A. More importantly, compared with other state of the art VR approaches, the new resonant driver is promising from the standpoints of both performance and cost-effectiveness.\n
\n\n\n\n \n\n \n \n Eberle, W., Zhang, Z., Liu, Y., & Sen, P. C.\n\n\n \n \n \n \n A Current Source Gate Driver Achieving Switching Loss Savings and Gate Energy Recovery at 1-MHz.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Electronics, 23(2): 678-691. March 2008.\n \n\n\n\n
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\n\n\n@ARTICLE{4455453,\n author={Eberle, Wilson and Zhang, Zhiliang and Liu, Yan-Fei and Sen, Paresh C.},\n journal={IEEE Transactions on Power Electronics}, \n title={A Current Source Gate Driver Achieving Switching Loss Savings and Gate Energy Recovery at 1-MHz}, \n year={2008},\n volume={23},\n number={2},\n pages={678-691},\n abstract={ In this paper, a new current source gate drive circuit is proposed for power MOSFETs. The proposed circuit achieves quick turn on and turn off transition times to reduce switching loss and conduction loss in power MOSFETs. In addition, it can recover a portion of the CV$^{2}$ gate energy normally dissipated in a conventional driver. The circuit consists of four controlled switches and a small inductor (typically 100 nH or less). The current through the inductor is discontinuous in order to minimize circulating current conduction loss. This also allows the driver to operate effectively over a wide range of duty cycles with constant peak current—a significant advantage for many applications since turn on and turn off times do not vary with the operating point. Experimental results are presented for the proposed driver operating in a boost converter at 1 MHz, 5 V input, 10 V/5 A output. At 5 V gate drive, a 2.9% efficiency improvement is achieved representing a loss savings of 24.8% in comparison to a conventional driver. },\n keywords={Switching loss;MOSFETs;Driver circuits;Zero voltage switching;Switches;Inductors;FETs;Switching frequency;Snubbers;Capacitors;Metal oxide semiconductor field effect transistor (MOSFET);root mean square (RMS);zero voltage switching (ZVS)},\n doi={10.1109/TPEL.2007.915769},\n ISSN={1941-0107},\n month={March},}\n\n In this paper, a new current source gate drive circuit is proposed for power MOSFETs. The proposed circuit achieves quick turn on and turn off transition times to reduce switching loss and conduction loss in power MOSFETs. In addition, it can recover a portion of the CV$^{2}$ gate energy normally dissipated in a conventional driver. The circuit consists of four controlled switches and a small inductor (typically 100 nH or less). The current through the inductor is discontinuous in order to minimize circulating current conduction loss. This also allows the driver to operate effectively over a wide range of duty cycles with constant peak current—a significant advantage for many applications since turn on and turn off times do not vary with the operating point. Experimental results are presented for the proposed driver operating in a boost converter at 1 MHz, 5 V input, 10 V/5 A output. At 5 V gate drive, a 2.9% efficiency improvement is achieved representing a loss savings of 24.8% in comparison to a conventional driver. \n
\n\n\n\n \n\n \n \n Eberle, W., Liu, Y., & Sen, P. C.\n\n\n \n \n \n \n A New Resonant Gate-Drive Circuit With Efficient Energy Recovery and Low Conduction Loss.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Industrial Electronics, 55(5): 2213-2221. May 2008.\n \n\n\n\n
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\n\n\n@ARTICLE{4455587,\n author={Eberle, Wilson and Liu, Yan-Fei and Sen, Paresh C.},\n journal={IEEE Transactions on Industrial Electronics}, \n title={A New Resonant Gate-Drive Circuit With Efficient Energy Recovery and Low Conduction Loss}, \n year={2008},\n volume={55},\n number={5},\n pages={2213-2221},\n abstract={In this paper, a new resonant gate-drive circuit is proposed to recover a portion of the power-MOSFET-gate energy that is typically dissipated in high-frequency converters. The proposed circuit consists of four control switches and a small resonant inductance. The current through the resonant inductance is discontinuous in order to minimize circulating-current conduction loss that is present in other methods. The proposed circuit also achieves quick turn-on and turn-off transition times to reduce switching and conduction losses in power MOSFETs. An analysis, a design procedure, and experimental results are presented for the proposed circuit. Experimental results demonstrate that the proposed driver can recover 51% of the gate energy at 5-V gate-drive voltage.},\n keywords={Resonance;RLC circuits;Driver circuits;MOSFETs;Switches;Inductors;Voltage;Switching frequency;Switching circuits;Inductance;Gate drive;gate-energy recovery;gate loss;MOSFET gate drive;MOSFET gate driver;resonant gate drive;resonant gate driver;gate drive;resonant gate drive;resonant gate driver;MOSFET gate drive;MOSFET gate driver;gate energy recovery;gate loss;current source drive},\n doi={10.1109/TIE.2008.918636},\n ISSN={1557-9948},\n month={May},}\n\n In this paper, a new resonant gate-drive circuit is proposed to recover a portion of the power-MOSFET-gate energy that is typically dissipated in high-frequency converters. The proposed circuit consists of four control switches and a small resonant inductance. The current through the resonant inductance is discontinuous in order to minimize circulating-current conduction loss that is present in other methods. The proposed circuit also achieves quick turn-on and turn-off transition times to reduce switching and conduction losses in power MOSFETs. An analysis, a design procedure, and experimental results are presented for the proposed circuit. Experimental results demonstrate that the proposed driver can recover 51% of the gate energy at 5-V gate-drive voltage.\n
\n\n\n\n \n\n \n \n Wang, L., Jatskevich, J., & Pekarek, S. D.\n\n\n \n \n \n \n Modeling of Induction Machines Using a Voltage-Behind-Reactance Formulation.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Energy Conversion, 23(2): 382-392. June 2008.\n \n\n\n\n
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\n\n\n@ARTICLE{4505399,\n author={Wang, Liwei and Jatskevich, Juri and Pekarek, Steven D.},\n journal={IEEE Transactions on Energy Conversion}, \n title={Modeling of Induction Machines Using a Voltage-Behind-Reactance Formulation}, \n year={2008},\n volume={23},\n number={2},\n pages={382-392},\n abstract={Over the past several years, there has been renewed interest in modeling electrical machines using phase (abc) variables. This paper considers modeling induction machines using phase variables in a voltage-behind-reactance (VBR) formulation. Specifically, three VBR models are proposed wherein the rotor electrical subsystem is modeled using flux linkages as state variables expressed in the qd reference frame. The stator electrical dynamics are represented in abc phase coordinates that enable direct interface of the machine model to an external network. Such a direct interface is advantageous when the machine is fed from a power electronic converter and/or when the modeling is carried out using circuit-based simulators. Computer studies of an induction machine demonstrate that the proposed VBR models achieve a 740% improvement in computational efficiency as compared with the traditional coupled-circuit phase-domain model.},\n keywords={Induction machines;Voltage;Circuit simulation;Equations;Power system modeling;Stators;Power electronics;Computational modeling;Coupling circuits;Magnetic circuits;Coupled-circuit (CC) model;dynamic simulation;induction machine;qd model;voltage-behind-reactance (VBR) model},\n doi={10.1109/TEC.2008.918601},\n ISSN={1558-0059},\n month={June},}\n\n Over the past several years, there has been renewed interest in modeling electrical machines using phase (abc) variables. This paper considers modeling induction machines using phase variables in a voltage-behind-reactance (VBR) formulation. Specifically, three VBR models are proposed wherein the rotor electrical subsystem is modeled using flux linkages as state variables expressed in the qd reference frame. The stator electrical dynamics are represented in abc phase coordinates that enable direct interface of the machine model to an external network. Such a direct interface is advantageous when the machine is fed from a power electronic converter and/or when the modeling is carried out using circuit-based simulators. Computer studies of an induction machine demonstrate that the proposed VBR models achieve a 740% improvement in computational efficiency as compared with the traditional coupled-circuit phase-domain model.\n
\n\n\n\n \n\n \n \n Eberle, W., Zhang, Z., Liu, Y., & Sen, P. C.\n\n\n \n \n \n \n A Simple Analytical Switching Loss Model for Buck Voltage Regulators.\n \n \n \n\n\n \n\n\n\n In 2008 Twenty-Third Annual IEEE Applied Power Electronics Conference and Exposition, pages 36-42, Feb 2008. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{4522697,\n author={Eberle, Wilson and Zhiliang Zhang and Yan-Fei Liu and Sen, P. C.},\n booktitle={2008 Twenty-Third Annual IEEE Applied Power Electronics Conference and Exposition}, \n title={A Simple Analytical Switching Loss Model for Buck Voltage Regulators}, \n year={2008},\n volume={},\n number={},\n pages={36-42},\n abstract={In this paper, a simple and accurate analytical switching loss model is proposed for high frequency synchronous buck voltage regulators. The proposed model uses simple equations to calculate the rise and fall times and uses piecewise linear approximations of the high side MOSFET voltage and current waveforms to allow quick and accurate calculation of switching loss in a synchronous buck voltage regulator. Effects of the common source inductance and other circuit parasitic inductances are included. Spice simulations are used to demonstrate the accuracy of the voltage source driver model operating in a 1 MHz synchronous buck voltage regulator at 12 V input, 1.3 V output. Switching loss was estimated with the proposed model and measured with Spice for load current ranging from 10-30 A, common source inductance ranging from 250-1000 pH, voltage driver supply ranging from 6-12 V.},\n keywords={Switching loss;Analytical models;Voltage;Regulators;Frequency;Equations;Piecewise linear approximation;MOSFET circuits;Inductance;Circuit simulation},\n doi={10.1109/APEC.2008.4522697},\n ISSN={1048-2334},\n month={Feb},}\n\n In this paper, a simple and accurate analytical switching loss model is proposed for high frequency synchronous buck voltage regulators. The proposed model uses simple equations to calculate the rise and fall times and uses piecewise linear approximations of the high side MOSFET voltage and current waveforms to allow quick and accurate calculation of switching loss in a synchronous buck voltage regulator. Effects of the common source inductance and other circuit parasitic inductances are included. Spice simulations are used to demonstrate the accuracy of the voltage source driver model operating in a 1 MHz synchronous buck voltage regulator at 12 V input, 1.3 V output. Switching loss was estimated with the proposed model and measured with Spice for load current ranging from 10-30 A, common source inductance ranging from 250-1000 pH, voltage driver supply ranging from 6-12 V.\n
\n\n\n\n \n\n \n \n Zhang, Z., Eberle, W., Liu, Y., & Sen, P. C.\n\n\n \n \n \n \n A New Current-Source Gate Driver for a Buck Voltage Regulator.\n \n \n \n\n\n \n\n\n\n In 2008 Twenty-Third Annual IEEE Applied Power Electronics Conference and Exposition, pages 1433-1439, Feb 2008. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{4522912,\n author={Zhiliang Zhang and Eberle, Wilson and Yan-Fei Liu and Sen, P. C.},\n booktitle={2008 Twenty-Third Annual IEEE Applied Power Electronics Conference and Exposition}, \n title={A New Current-Source Gate Driver for a Buck Voltage Regulator}, \n year={2008},\n volume={},\n number={},\n pages={1433-1439},\n abstract={A new current-source gate drive circuit is proposed for a synchronous buck voltage regulator (VR). The proposed driver can drive two MOSFETs independently with different drive currents for optimal design. Furthermore, the new drive circuit can achieve 1) significant switching loss reduction; 2) gate energy recovery; 3) reduced body diode losses and reverse recovery losses; 4) ZVS of all the drive switches. The improved driver using integrated inductors is also presented for a buck VR to reduce the number of magnetic cores and the core loss. The experimental results prove that a significant efficiency improvement has been achieved. At 1.5V output, the new driver improves the efficiency from 84% using a conventional driver to 87.3% (an improvement of 3.3%) at 20 A, and at 30 A, from 79.4% to 82.8% (an improvement of 3.4%). Overall, the new driver approach is very attractive from the standpoints of both performance and cost-effectiveness.},\n keywords={Regulators;Driver circuits;Virtual reality;MOSFETs;Switching loss;Diodes;Zero voltage switching;Switching circuits;Switches;Inductors},\n doi={10.1109/APEC.2008.4522912},\n ISSN={1048-2334},\n month={Feb},}\n\n A new current-source gate drive circuit is proposed for a synchronous buck voltage regulator (VR). The proposed driver can drive two MOSFETs independently with different drive currents for optimal design. Furthermore, the new drive circuit can achieve 1) significant switching loss reduction; 2) gate energy recovery; 3) reduced body diode losses and reverse recovery losses; 4) ZVS of all the drive switches. The improved driver using integrated inductors is also presented for a buck VR to reduce the number of magnetic cores and the core loss. The experimental results prove that a significant efficiency improvement has been achieved. At 1.5V output, the new driver improves the efficiency from 84% using a conventional driver to 87.3% (an improvement of 3.3%) at 20 A, and at 30 A, from 79.4% to 82.8% (an improvement of 3.4%). Overall, the new driver approach is very attractive from the standpoints of both performance and cost-effectiveness.\n
\n\n\n\n \n\n \n \n Wang, L., Jatskevich, J., Wang, C., & Li, P.\n\n\n \n \n \n \n A Voltage-Behind-Reactance Induction Machine Model for the EMTP-Type Solution.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Systems, 23(3): 1226-1238. Aug 2008.\n \n\n\n\n
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\n\n\n@ARTICLE{4547450,\n author={Wang, Liwei and Jatskevich, Juri and Wang, Chengshan and Li, Peng},\n journal={IEEE Transactions on Power Systems}, \n title={A Voltage-Behind-Reactance Induction Machine Model for the EMTP-Type Solution}, \n year={2008},\n volume={23},\n number={3},\n pages={1226-1238},\n abstract={Recently, there has been renewed interest in modeling of electrical machines for the electro-magnetic transient program (EMTP)-type programs, with the goal of improving the machine- network interface. In this paper, we present a new voltage-behind- reactance induction machine model for the EMTP-type solution and power system transients. In the proposed model, the stator circuit is represented in abc phase coordinates and the rotor subsystem is expressed in qd arbitrary reference frame. Similar to the recently proposed synchronous-machine voltage-behind-reactance model and the established phase-domain model, simultaneous solution of the machine-network electrical variables is achieved. Efficient numerical implementation of the proposed model is presented, in which one time-step requires as little as 108 flops, taking 1.6 mus of CPU time. Case studies of induction machine start-up transients demonstrate that the proposed model is more accurate and efficient than several existing EMTP machine models.},\n keywords={Voltage;Induction machines;EMTP;Power system modeling;Power system transients;Circuits;PSCAD;EMTDC;Stators;Induction generators;Electro-Magnetic Transient Program (EMTP);induction machine;phase-domain model;voltage-behind- reactance model},\n doi={10.1109/TPWRS.2008.926423},\n ISSN={1558-0679},\n month={Aug},}\n\n\n Recently, there has been renewed interest in modeling of electrical machines for the electro-magnetic transient program (EMTP)-type programs, with the goal of improving the machine- network interface. In this paper, we present a new voltage-behind- reactance induction machine model for the EMTP-type solution and power system transients. In the proposed model, the stator circuit is represented in abc phase coordinates and the rotor subsystem is expressed in qd arbitrary reference frame. Similar to the recently proposed synchronous-machine voltage-behind-reactance model and the established phase-domain model, simultaneous solution of the machine-network electrical variables is achieved. Efficient numerical implementation of the proposed model is presented, in which one time-step requires as little as 108 flops, taking 1.6 mus of CPU time. Case studies of induction machine start-up transients demonstrate that the proposed model is more accurate and efficient than several existing EMTP machine models.\n
\n\n\n\n \n\n \n \n Zhang, Z., Eberle, W., Liu, Y., & Sen, P. C.\n\n\n \n \n \n \n A novel non-isolated ZVS asymmetrical buck converter for 12 V voltage regulators.\n \n \n \n\n\n \n\n\n\n In 2008 IEEE Power Electronics Specialists Conference, pages 974-978, June 2008. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{4592056,\n author={Zhang, Zhiliang and Eberle, Wilson and Liu, Yan-Fei and Sen, Paresh C.},\n booktitle={2008 IEEE Power Electronics Specialists Conference}, \n title={A novel non-isolated ZVS asymmetrical buck converter for 12 V voltage regulators}, \n year={2008},\n volume={},\n number={},\n pages={974-978},\n abstract={This paper presents a new non-isolated asymmetrical buck converter. The transformer is used to extend the extremely low duty-cycle of a conventional buck converter. The turn-off loss can be significantly reduced due to the extension of duty-cycle and there is no turn-on loss owing to zero-voltage turn-on condition. At the same time, the voltage stress over the synchronous rectifier (SR) MOSFETs is also reduced. Therefore, the reverse recovery losses of the body diode can also be reduced. Furthermore, MOSFETs with the lower voltage rating and lower Rds(on) can be used to reduce the conduction loss further. To further reduce the turn-off loss above the switching frequency of 1MHz, current-source gate driver can be also applied to this topology. A prototype at switching frequency of 1MHz was implemented and the preliminary experimental results verify the functionality of the new circuit.},\n keywords={MOSFETs;Strontium;Voltage control;Zero voltage switching;Logic gates;Converters;Inductance},\n doi={10.1109/PESC.2008.4592056},\n ISSN={2377-6617},\n month={June},}\n\n This paper presents a new non-isolated asymmetrical buck converter. The transformer is used to extend the extremely low duty-cycle of a conventional buck converter. The turn-off loss can be significantly reduced due to the extension of duty-cycle and there is no turn-on loss owing to zero-voltage turn-on condition. At the same time, the voltage stress over the synchronous rectifier (SR) MOSFETs is also reduced. Therefore, the reverse recovery losses of the body diode can also be reduced. Furthermore, MOSFETs with the lower voltage rating and lower Rds(on) can be used to reduce the conduction loss further. To further reduce the turn-off loss above the switching frequency of 1MHz, current-source gate driver can be also applied to this topology. A prototype at switching frequency of 1MHz was implemented and the preliminary experimental results verify the functionality of the new circuit.\n
\n\n\n\n \n\n \n \n Zhang, Z., Eberle, W., Lin, P., Liu, Y., & Sen, P. C.\n\n\n \n \n \n \n A new hybrid gate drive scheme for high frequency buck voltage regulators.\n \n \n \n\n\n \n\n\n\n In 2008 IEEE Power Electronics Specialists Conference, pages 2498-2504, June 2008. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{4592316,\n author={Zhang, Zhiliang and Eberle, Wilson and Lin, Ping and Liu, Yan-Fei and Sen, Paresh C.},\n booktitle={2008 IEEE Power Electronics Specialists Conference}, \n title={A new hybrid gate drive scheme for high frequency buck voltage regulators}, \n year={2008},\n volume={},\n number={},\n pages={2498-2504},\n abstract={This paper presents a new hybrid drive scheme for a synchronous buck voltage regulator (VR). The proposed current-source driver is used to drive the control MOSFET to achieve fast switching speed and reduce the switching loss significantly due to the parasitic inductance in addition to gate energy recovery. Conventional voltage driver is used for synchronous rectifier (SR) MOSFET for its simplicity and good immunity and alleviation of dv/dt effect. The experimental results prove the advantages of the new drive scheme and a significant efficiency improvement has been achieved. At 1.3 V output, the new driver improves the efficiency from 82.8% using a conventional driver to 85.6% (an improvement of 2.8%) at 20 A, and at 25 A, from 80.5% to 83.0% (an improvement of 2.5%). The new drive can also be integrated into a standard drive integrated circuit (IC) and replace the conventional voltage drive IC directly. Overall, the new driver scheme is very promising from the standpoints of both performance and cost- effectiveness.},\n keywords={Logic gates;Driver circuits;MOSFET circuits;Inductors;Strontium;Switches;Switching loss},\n doi={10.1109/PESC.2008.4592316},\n ISSN={2377-6617},\n month={June},}\n\n This paper presents a new hybrid drive scheme for a synchronous buck voltage regulator (VR). The proposed current-source driver is used to drive the control MOSFET to achieve fast switching speed and reduce the switching loss significantly due to the parasitic inductance in addition to gate energy recovery. Conventional voltage driver is used for synchronous rectifier (SR) MOSFET for its simplicity and good immunity and alleviation of dv/dt effect. The experimental results prove the advantages of the new drive scheme and a significant efficiency improvement has been achieved. At 1.3 V output, the new driver improves the efficiency from 82.8% using a conventional driver to 85.6% (an improvement of 2.8%) at 20 A, and at 25 A, from 80.5% to 83.0% (an improvement of 2.5%). The new drive can also be integrated into a standard drive integrated circuit (IC) and replace the conventional voltage drive IC directly. Overall, the new driver scheme is very promising from the standpoints of both performance and cost- effectiveness.\n
\n\n\n\n \n\n \n \n Eberle, W., Zhang, Z., Liu, Y., & Sen, P.\n\n\n \n \n \n \n A simple switching loss model for buck voltage regulators with current source drive.\n \n \n \n\n\n \n\n\n\n In 2008 IEEE Power Electronics Specialists Conference, pages 3780-3786, June 2008. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{4592544,\n author={Eberle, Wilson and Zhiliang Zhang and Yan-Fei Liu and Sen, Paresh},\n booktitle={2008 IEEE Power Electronics Specialists Conference}, \n title={A simple switching loss model for buck voltage regulators with current source drive}, \n year={2008},\n volume={},\n number={},\n pages={3780-3786},\n abstract={A review of switching loss mechanisms for synchronous buck voltage regulators is presented. Following the review, a new simple analytical switching loss model is proposed for voltage regulators with current source drive. The model includes the impact of common source inductance and parasitic inductance on switching loss. It uses simple equations to calculate the rise and fall times and piecewise linear approximations of the MOSFET voltage and current waveforms to allow quick and accurate calculation of switching loss. Spice is used to demonstrate the accuracy of the model operating in a 1MHz synchronous buck voltage regulator at 12V input, 1.3V output. Experimental results are presented to demonstrate the accuracy of the proposed model.},\n keywords={MOSFET circuits;Switching loss;Logic gates;Inductance;Integrated circuit modeling;Voltage control;Switches},\n doi={10.1109/PESC.2008.4592544},\n ISSN={2377-6617},\n month={June},}\n\n A review of switching loss mechanisms for synchronous buck voltage regulators is presented. Following the review, a new simple analytical switching loss model is proposed for voltage regulators with current source drive. The model includes the impact of common source inductance and parasitic inductance on switching loss. It uses simple equations to calculate the rise and fall times and piecewise linear approximations of the MOSFET voltage and current waveforms to allow quick and accurate calculation of switching loss. Spice is used to demonstrate the accuracy of the model operating in a 1MHz synchronous buck voltage regulator at 12V input, 1.3V output. Experimental results are presented to demonstrate the accuracy of the proposed model.\n
\n\n\n\n \n\n \n \n Zhang, Z., Eberle, W., Lin, P., Liu, Y., & Sen, P. C.\n\n\n \n \n \n \n A 1-MHz High-Efficiency 12-V Buck Voltage Regulator With a New Current-Source Gate Driver.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Electronics, 23(6): 2817-2827. Nov 2008.\n \n\n\n\n
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\n\n\n@ARTICLE{4671081,\n author={Zhang, Zhiliang and Eberle, Wilson and Lin, Ping and Liu, Yan-Fei and Sen, Paresh C.},\n journal={IEEE Transactions on Power Electronics}, \n title={A 1-MHz High-Efficiency 12-V Buck Voltage Regulator With a New Current-Source Gate Driver}, \n year={2008},\n volume={23},\n number={6},\n pages={2817-2827},\n abstract={ This paper proposes a new current-source gate drive circuit for a synchronous buck converter. The proposed driver can drive two MOSFETs independently with different drive currents for optimal design. For the control MOSFET, the optimal design involves a tradeoff between switching loss reduction and drive circuit loss; while for the synchronous-rectifier MOSFET, the optimal design involves a tradeoff between body diode conduction loss and drive circuit loss. Furthermore, the new drive circuit can achieve: 1) significant switching loss reduction; 2) gate energy recovery and high gate drive voltage to reduce $R_{{\\bf DS}({\\bf ON})}$ conduction losses; 3) reduced conduction loss and reverse recovery loss of the body diode; and 4) zero-voltage switching of all the drive switches. The improved driver using integrated inductors is presented with multiphase buck voltage regulators (VRs) to reduce the number of magnetic cores and the core loss. The experimental results prove that a significant efficiency improvement has been achieved. At $ \\hbox{1.5-V}$ output, the new driver improves the efficiency from 84% using a conventional driver to 87.3% at 20 A, and at 30 A, from 79.4% to 82.8%. Overall, the new driver approach is attractive from the standpoints of both performance and cost-effectiveness. },\n keywords={Regulators;MOSFETs;Driver circuits;Switching loss;Diodes;Zero voltage switching;Buck converters;Optimal control;Switching circuits;Switches;Current–source gate driver;microprocessor;power MOSFET;resonant gate driver;voltage regulator (VR);Current--source gate driver;microprocessor;power MOSFET;resonant gate driver;voltage regulator (VR)},\n doi={10.1109/TPEL.2008.2005387},\n ISSN={1941-0107},\n month={Nov},}\n\n This paper proposes a new current-source gate drive circuit for a synchronous buck converter. The proposed driver can drive two MOSFETs independently with different drive currents for optimal design. For the control MOSFET, the optimal design involves a tradeoff between switching loss reduction and drive circuit loss; while for the synchronous-rectifier MOSFET, the optimal design involves a tradeoff between body diode conduction loss and drive circuit loss. Furthermore, the new drive circuit can achieve: 1) significant switching loss reduction; 2) gate energy recovery and high gate drive voltage to reduce $R_{{\\bf DS}({\\bf ON})}$ conduction losses; 3) reduced conduction loss and reverse recovery loss of the body diode; and 4) zero-voltage switching of all the drive switches. The improved driver using integrated inductors is presented with multiphase buck voltage regulators (VRs) to reduce the number of magnetic cores and the core loss. The experimental results prove that a significant efficiency improvement has been achieved. At $ \\hbox{1.5-V}$ output, the new driver improves the efficiency from 84% using a conventional driver to 87.3% at 20 A, and at 30 A, from 79.4% to 82.8%. Overall, the new driver approach is attractive from the standpoints of both performance and cost-effectiveness. \n
\n\n\n\n \n\n \n \n Wang, L., Chiniforoosh, S., & Jatskevich, J.\n\n\n \n \n \n \n Simulation and analysis of starting transients in rotor-chopper-controlled doubly-fed induction motors.\n \n \n \n\n\n \n\n\n\n In 2008 IEEE Canada Electric Power Conference, pages 1-6, Oct 2008. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{4763329,\n author={Wang, Liwei and Chiniforoosh, Sina and Jatskevich, Juri},\n booktitle={2008 IEEE Canada Electric Power Conference}, \n title={Simulation and analysis of starting transients in rotor-chopper-controlled doubly-fed induction motors}, \n year={2008},\n volume={},\n number={},\n pages={1-6},\n abstract={The direct starting of induction motors may cause various problems such as high inrush currents, voltage dips and harmonics. There have been numerous methods proposed to mitigate these stresses that are imposed on the power grid. This paper considers a starting method based on external rotor resistance control scheme that is used with wound-rotor induction machines. The so-called rotor-chopper-controlled topology is used to start an induction machine with maximum torque. The Automated state model generation (ASMG) algorithm is used to implement detailed switching model of the system in MATLAB/Simulink. Computer studies of a typical high power induction machine demonstrate that the machine start-up currents and the total energy consumption are significantly reduced while the induced electromagnetic torque is greatly increased with the rotor chopper controller applied.},\n keywords={Transient analysis;Analytical models;Rotors;Induction motors;Induction machines;Mathematical model;Power system modeling;Surges;Voltage fluctuations;Stress;Dynamic simulation;wound-rotor induction machine;maximal torque;rotor chopper control;starting transient},\n doi={10.1109/EPC.2008.4763329},\n ISSN={},\n month={Oct},}\n\n The direct starting of induction motors may cause various problems such as high inrush currents, voltage dips and harmonics. There have been numerous methods proposed to mitigate these stresses that are imposed on the power grid. This paper considers a starting method based on external rotor resistance control scheme that is used with wound-rotor induction machines. The so-called rotor-chopper-controlled topology is used to start an induction machine with maximum torque. The Automated state model generation (ASMG) algorithm is used to implement detailed switching model of the system in MATLAB/Simulink. Computer studies of a typical high power induction machine demonstrate that the machine start-up currents and the total energy consumption are significantly reduced while the induced electromagnetic torque is greatly increased with the rotor chopper controller applied.\n
\n\n\n\n \n\n \n \n Chiniforoosh, S., Vargas, L. M., Wang, L., & Jatskevich, J.\n\n\n \n \n \n \n Online characterization procedure for induction machines using start-up and loading transients.\n \n \n \n\n\n \n\n\n\n In 2008 IEEE Canada Electric Power Conference, pages 1-5, Oct 2008. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{4763364,\n author={Chiniforoosh, Sina and Vargas, Leon Max and Wang, Liwei and Jatskevich, Juri},\n booktitle={2008 IEEE Canada Electric Power Conference}, \n title={Online characterization procedure for induction machines using start-up and loading transients}, \n year={2008},\n volume={},\n number={},\n pages={1-5},\n abstract={Recently, a modified equivalent circuit has been proposed for the induction machine model where a single branch rotor resistance is changing as a function of speed to better predict the low-frequency deep-rotor-bar effect. This paper presents an online parameter identification procedure based on capturing the start-up transient and loading of the motor. The proposed procedure is simple and carried out on-the-fly while switching on the machine to the nominal voltage. A 3-phase off-the-shelf induction machine is fully characterized using the proposed procedure. Experimental results and simulation studies demonstrate the effectiveness of the characterization procedure and the resulting model.},\n keywords={Induction machines;Voltage;Predictive models;Testing;Packaging machines;Torque;Parameter estimation;Magnetic circuits;Coupling circuits;Manufacturing;Deep-rotor-bar effect;Induction machine;online characterization;start-up transients},\n doi={10.1109/EPC.2008.4763364},\n ISSN={},\n month={Oct},}\n\n Recently, a modified equivalent circuit has been proposed for the induction machine model where a single branch rotor resistance is changing as a function of speed to better predict the low-frequency deep-rotor-bar effect. This paper presents an online parameter identification procedure based on capturing the start-up transient and loading of the motor. The proposed procedure is simple and carried out on-the-fly while switching on the machine to the nominal voltage. A 3-phase off-the-shelf induction machine is fully characterized using the proposed procedure. Experimental results and simulation studies demonstrate the effectiveness of the characterization procedure and the resulting model.\n
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\n \n \n\n \n \n Ye, S., Eberle, W., & Liu, Y.\n\n\n \n \n \n \n A Novel Non-Isolated Full Bridge Topology for VRM Applications.\n \n \n \n\n\n \n\n\n\n In APEC 07 - Twenty-Second Annual IEEE Applied Power Electronics Conference and Exposition, pages 134-140, Feb 2007. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{4195710,\n author={Ye, Sheng and Eberle, Wilson and Liu, Yan-Fei},\n booktitle={APEC 07 - Twenty-Second Annual IEEE Applied Power Electronics Conference and Exposition}, \n title={A Novel Non-Isolated Full Bridge Topology for VRM Applications}, \n year={2007},\n volume={},\n number={},\n pages={134-140},\n abstract={In this paper a new topology is introduced to solve the narrow duty cycle and hard switching problems of the interleaved Buck converter voltage regulator module. The new topology is called the non-isolated full bridge (NFB). In comparison to the interleaved Buck converter, it operates with a significantly wider duty cycle and can achieve zero voltage switching at turn on for the high side MOSFETs. The NFB can significantly reduce the input peak current and transfers a portion of the primary side energy directly to the load thereby reducing the stress on the synchronous rectifiers and filter inductors. Experimental results and analysis demonstrate that the new non-isolated full bridge can significantly improve the performance of a VRM.},\n keywords={Topology;Bridge circuits;Buck converters;Feedback amplifiers;Regulators;Zero voltage switching;MOSFETs;Stress;Rectifiers;Filters},\n doi={10.1109/APEX.2007.357506},\n ISSN={1048-2334},\n month={Feb},}\n\n In this paper a new topology is introduced to solve the narrow duty cycle and hard switching problems of the interleaved Buck converter voltage regulator module. The new topology is called the non-isolated full bridge (NFB). In comparison to the interleaved Buck converter, it operates with a significantly wider duty cycle and can achieve zero voltage switching at turn on for the high side MOSFETs. The NFB can significantly reduce the input peak current and transfers a portion of the primary side energy directly to the load thereby reducing the stress on the synchronous rectifiers and filter inductors. Experimental results and analysis demonstrate that the new non-isolated full bridge can significantly improve the performance of a VRM.\n
\n\n\n\n \n\n \n \n Wang, L., Jatskevich, J., Ozog, N., & Davoudi, A.\n\n\n \n \n \n \n A Simple Explicit Method of Representing Magnetic Saturation of Salient-Pole Synchronous Machines in Both Rotor Axes Using Matlab-Simulink.\n \n \n \n\n\n \n\n\n\n In 2007 Canadian Conference on Electrical and Computer Engineering, pages 256-259, April 2007. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{4232729,\n author={Wang, Liwei and Jatskevich, Juri and Ozog, Nathan and Davoudi, Ali},\n booktitle={2007 Canadian Conference on Electrical and Computer Engineering}, \n title={A Simple Explicit Method of Representing Magnetic Saturation of Salient-Pole Synchronous Machines in Both Rotor Axes Using Matlab-Simulink}, \n year={2007},\n volume={},\n number={},\n pages={256-259},\n abstract={This paper presents a new flux-correction method to represent magnetic saturation in classical qd machine model. By introducing new variables and reforming the saturation functions explicitly, the iterative solution of nonlinear equations is avoided. Compared with existing methods, which utilize the saturated mutual inductances in the machine state equations, the proposed method is simple and does not require calculation of the derivatives of the saturated mutual inductances. The accuracy and efficiency of the proposed method is demonstrated on a typical salient-pole synchronous-machine.},\n keywords={Saturation magnetization;Synchronous machines;Computer languages;Mathematical model;Magnetic flux;Couplings;Nonlinear equations;Magnetic analysis;Rotating machines;Packaging machines},\n doi={10.1109/CCECE.2007.70},\n ISSN={0840-7789},\n month={April},}\n\n This paper presents a new flux-correction method to represent magnetic saturation in classical qd machine model. By introducing new variables and reforming the saturation functions explicitly, the iterative solution of nonlinear equations is avoided. Compared with existing methods, which utilize the saturated mutual inductances in the machine state equations, the proposed method is simple and does not require calculation of the derivatives of the saturated mutual inductances. The accuracy and efficiency of the proposed method is demonstrated on a typical salient-pole synchronous-machine.\n
\n\n\n\n \n\n \n \n Wang, L., & Jatskevich, J.\n\n\n \n \n \n \n A Voltage-Behind-Reactance Synchronous Machine Model for the EMTP-Type Solution.\n \n \n \n\n\n \n\n\n\n In 2007 IEEE Power Engineering Society General Meeting, pages 1-1, June 2007. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{4275293,\n author={Wang, Liwei and Jatskevich, Juri},\n booktitle={2007 IEEE Power Engineering Society General Meeting}, \n title={A Voltage-Behind-Reactance Synchronous Machine Model for the EMTP-Type Solution}, \n year={2007},\n volume={},\n number={},\n pages={1-1},\n abstract={Summary form only given. A full-order, voltage-behind-reactance synchronous machine model has recently been proposed in the literature. This paper extends the voltage-behind-reactance formulation for the EMTP-type solution, in which the rotor subsystem is expressed in q-d coordinates and the stator subsystem is expressed in abc phase coordinates. The model interface with the nodal-analysis network solution is non-iterative and simultaneous. An example of a single-machine, infinite-bus system shows that the proposed model is more accurate and efficient than several existing EMTP machine models.},\n keywords={Voltage;Synchronous machines;Stators;EMTP},\n doi={10.1109/PES.2007.385684},\n ISSN={1932-5517},\n month={June},}\n\n Summary form only given. A full-order, voltage-behind-reactance synchronous machine model has recently been proposed in the literature. This paper extends the voltage-behind-reactance formulation for the EMTP-type solution, in which the rotor subsystem is expressed in q-d coordinates and the stator subsystem is expressed in abc phase coordinates. The model interface with the nodal-analysis network solution is non-iterative and simultaneous. An example of a single-machine, infinite-bus system shows that the proposed model is more accurate and efficient than several existing EMTP machine models.\n
\n\n\n\n \n\n \n \n Han, Y., Eberle, W., & Liu, Y.\n\n\n \n \n \n \n A Practical Copper Loss Measurement Method for the Planar Transformer in High-Frequency Switching Converters.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Industrial Electronics, 54(4): 2276-2287. Aug 2007.\n \n\n\n\n
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\n\n\n@ARTICLE{4278023,\n author={Han, Yongtao and Eberle, Wilson and Liu, Yan-Fei},\n journal={IEEE Transactions on Industrial Electronics}, \n title={A Practical Copper Loss Measurement Method for the Planar Transformer in High-Frequency Switching Converters}, \n year={2007},\n volume={54},\n number={4},\n pages={2276-2287},\n abstract={In this paper, a new and practical measurement method is proposed to characterize the planar transformer copper loss operating in a high-frequency switching mode power supply (SMPS). The scheme is easy to set up, and it provides an equivalent winding alternating current resistance, which is the result of all the field effects on the transformer windings to achieve more accurate copper loss characterization. A detailed error analysis for the proposed copper loss measurement method is conducted. The analysis results can provide useful guidelines on the SMPS transformer copper loss measurement scheme design. Measurement results on the copper loss of a planar transformer in a high-frequency dc/dc converter are presented. In order to verify the measurement results, a time-domain finite-element analysis transient solver is adopted to analyze the transformer copper loss. Good matching between the simulation and measurement results is achieved.},\n keywords={Copper;Loss measurement;Switching converters;Electrical resistance measurement;Switched-mode power supply;Transient analysis;Power measurement;Windings;Error analysis;Guidelines;Copper loss;finite-element analysis (FEA);planar transformer;pulsewidth modulation (PWM);switching mode power supply (SMPS);winding ac resistance},\n doi={10.1109/TIE.2007.899877},\n ISSN={1557-9948},\n month={Aug},}\n\n In this paper, a new and practical measurement method is proposed to characterize the planar transformer copper loss operating in a high-frequency switching mode power supply (SMPS). The scheme is easy to set up, and it provides an equivalent winding alternating current resistance, which is the result of all the field effects on the transformer windings to achieve more accurate copper loss characterization. A detailed error analysis for the proposed copper loss measurement method is conducted. The analysis results can provide useful guidelines on the SMPS transformer copper loss measurement scheme design. Measurement results on the copper loss of a planar transformer in a high-frequency dc/dc converter are presented. In order to verify the measurement results, a time-domain finite-element analysis transient solver is adopted to analyze the transformer copper loss. Good matching between the simulation and measurement results is achieved.\n
\n\n\n\n \n\n \n \n Wang, L., Jatskevich, J., & Dommel, H. W.\n\n\n \n \n \n \n Re-examination of Synchronous Machine Modeling Techniques for Electromagnetic Transient Simulations.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Systems, 22(3): 1221-1230. Aug 2007.\n \n\n\n\n
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\n\n\n@ARTICLE{4282061,\n author={Wang, Liwei and Jatskevich, Juri and Dommel, Hermann W.},\n journal={IEEE Transactions on Power Systems}, \n title={Re-examination of Synchronous Machine Modeling Techniques for Electromagnetic Transient Simulations}, \n year={2007},\n volume={22},\n number={3},\n pages={1221-1230},\n abstract={This paper re-examines the three synchronous machine modeling techniques used for electromagnetic transient simulations, namely, the qd model, phase-domain model, and voltage-behind-reactance model. Contrary to the claims made in several recent publications, these models are all equivalent in the continuous-time domain, as their corresponding differential equations can be algebraically derived from each other. Computer studies of a single-machine infinite-bus system demonstrate that all of these models can be used for unsymmetrical operation of power systems. The conversion of machine parameters is also discussed and is shown to have some impact on simulation accuracy, which is acceptable for most cases. When the models are discretized and interfaced with an EMTP-type network solution, the voltage-behind-reactance model is shown to be the most accurate due to its advanced structure.},\n keywords={Synchronous machines;Electromagnetic modeling;Power system modeling;Voltage;Power system simulation;Power system transients;EMTP;Magnetic circuits;Coupling circuits;Equations;Electromagnetic Transient Programs (EMTP);phase-domain model;synchronous machine;unbalanced fault;voltage-behind-reactance model},\n doi={10.1109/TPWRS.2007.901308},\n ISSN={1558-0679},\n month={Aug},}\n\n This paper re-examines the three synchronous machine modeling techniques used for electromagnetic transient simulations, namely, the qd model, phase-domain model, and voltage-behind-reactance model. Contrary to the claims made in several recent publications, these models are all equivalent in the continuous-time domain, as their corresponding differential equations can be algebraically derived from each other. Computer studies of a single-machine infinite-bus system demonstrate that all of these models can be used for unsymmetrical operation of power systems. The conversion of machine parameters is also discussed and is shown to have some impact on simulation accuracy, which is acceptable for most cases. When the models are discretized and interfaced with an EMTP-type network solution, the voltage-behind-reactance model is shown to be the most accurate due to its advanced structure.\n
\n\n\n\n \n\n \n \n Eberle, W., Zhang, Z., Liu, Y., & Sen, P.\n\n\n \n \n \n \n A High Efficiency Synchronous Buck VRM with Current Source Gate Driver.\n \n \n \n\n\n \n\n\n\n In 2007 IEEE Power Electronics Specialists Conference, pages 21-27, June 2007. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{4341954,\n author={Eberle, Wilson and Zhang, Zhiliang and Liu, Yan-Fei and Sen, P.C.},\n booktitle={2007 IEEE Power Electronics Specialists Conference}, \n title={A High Efficiency Synchronous Buck VRM with Current Source Gate Driver}, \n year={2007},\n volume={},\n number={},\n pages={21-27},\n abstract={In this paper, a new current source gate drive circuit is proposed for high efficiency synchronous buck VRMs. The proposed circuit achieves quick turn-on and turn-off transition times to reduce switching loss and conduction loss in power MOSFETS. The driver circuit consists of two sets of four control switches and two very small inductors (typically 50nH-300nH each at 1MHz). It drives both the control MOSFET and synchronous MOSFET in synchronous buck VRMs. An analysis, design procedure, optimization procedure and experimental results are presented for the proposed circuit. Experimental results demonstrate an efficiency of 86.6% at 15A load and 81.9% at 30A load for 12V input and 1.3V output at 1MHz.},\n keywords={MOSFETs;Driver circuits;Switching loss;Inductance;Switches;Voltage;Switching frequency;RLC circuits;Inductors;Buck converters},\n doi={10.1109/PESC.2007.4341954},\n ISSN={2377-6617},\n month={June},}\n\n In this paper, a new current source gate drive circuit is proposed for high efficiency synchronous buck VRMs. The proposed circuit achieves quick turn-on and turn-off transition times to reduce switching loss and conduction loss in power MOSFETS. The driver circuit consists of two sets of four control switches and two very small inductors (typically 50nH-300nH each at 1MHz). It drives both the control MOSFET and synchronous MOSFET in synchronous buck VRMs. An analysis, design procedure, optimization procedure and experimental results are presented for the proposed circuit. Experimental results demonstrate an efficiency of 86.6% at 15A load and 81.9% at 30A load for 12V input and 1.3V output at 1MHz.\n
\n\n\n\n \n\n \n \n Zhang, Z., Eberle, W., Yang, Z., Liu, Y., & Sen, P. C.\n\n\n \n \n \n \n Optimal Design of Current Source Gate Driver for a Buck Voltage Regulator Based on a New Analytical Loss Model.\n \n \n \n\n\n \n\n\n\n In 2007 IEEE Power Electronics Specialists Conference, pages 1556-1562, June 2007. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{4342227,\n author={Zhang, Zhiliang and Eberle, Wilson and Yang, Zhihua and Liu, Yan-Fei and Sen, Paresh C.},\n booktitle={2007 IEEE Power Electronics Specialists Conference}, \n title={Optimal Design of Current Source Gate Driver for a Buck Voltage Regulator Based on a New Analytical Loss Model}, \n year={2007},\n volume={},\n number={},\n pages={1556-1562},\n abstract={The superior advantages of a new current-source resonant driver are verified thoroughly by the analytical analysis, simulation and experimental results. A new accurate analytical loss model of the power MOSFET driven by a current-source resonant gate driver is developed. Closed-formed analytical equations are derived to investigate the switching characteristics due to the parasitic inductance. The modeling and simulation results prove that compared to a voltage driver, a current-source resonant driver significantly reduces the propagation impact of the common source inductance during the switching transition at very high switching frequency, which leads to a significant reduction of the switching transition time and the switching loss. Based on the proposed loss model, a general method to optimize the new resonant driver is proposed and employed in the development of a 12V synchronous buck voltage regulator (VR) prototype at 1MHz switching frequency. The level-shift circuit and digital implementation of complex programmable logic device (CPLD) are also presented. The analytical modeling matches the simulation results and experimental results very well. Through the optimal design, a significant efficiency improvement is achieved. More importantly, compared to other state of the art VR approaches, the current-source driver is very promising from the standpoints of both performance and cost-effectiveness.},\n keywords={Voltage;Regulators;Analytical models;Resonance;Inductance;Switching frequency;Driver circuits;Virtual reality;MOSFET circuits;Power MOSFET},\n doi={10.1109/PESC.2007.4342227},\n ISSN={2377-6617},\n month={June},}\n\n The superior advantages of a new current-source resonant driver are verified thoroughly by the analytical analysis, simulation and experimental results. A new accurate analytical loss model of the power MOSFET driven by a current-source resonant gate driver is developed. Closed-formed analytical equations are derived to investigate the switching characteristics due to the parasitic inductance. The modeling and simulation results prove that compared to a voltage driver, a current-source resonant driver significantly reduces the propagation impact of the common source inductance during the switching transition at very high switching frequency, which leads to a significant reduction of the switching transition time and the switching loss. Based on the proposed loss model, a general method to optimize the new resonant driver is proposed and employed in the development of a 12V synchronous buck voltage regulator (VR) prototype at 1MHz switching frequency. The level-shift circuit and digital implementation of complex programmable logic device (CPLD) are also presented. The analytical modeling matches the simulation results and experimental results very well. Through the optimal design, a significant efficiency improvement is achieved. More importantly, compared to other state of the art VR approaches, the current-source driver is very promising from the standpoints of both performance and cost-effectiveness.\n
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\n \n \n\n \n \n Eberle, W., Sen, P., & Liu, Y.\n\n\n \n \n \n \n A novel high performance resonant gate drive circuit with low circulating current.\n \n \n \n\n\n \n\n\n\n In Twenty-First Annual IEEE Applied Power Electronics Conference and Exposition, 2006. APEC '06., pages 7 pp.-, March 2006. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{1620558,\n author={Eberle, W. and Sen, P.C. and Yan-Fei Liu},\n booktitle={Twenty-First Annual IEEE Applied Power Electronics Conference and Exposition, 2006. APEC '06.}, \n title={A novel high performance resonant gate drive circuit with low circulating current}, \n year={2006},\n volume={},\n number={},\n pages={7 pp.-},\n abstract={In this paper, a new resonant gate drive circuit is proposed for power MOSFETs. The proposed circuit can recover a portion of the CV/sup 2/ gate energy and it achieves quick turn on and turn off transition times to reduce switching loss and conduction loss in power MOSFETs. The circuit consists of four control switches and a small resonant inductance. The current through the resonant inductance is discontinuous in order to minimize circulating current conduction loss present in other methods. An analysis, design procedure, loss analysis, simulation results and experimental results are presented for the proposed circuit.},\n keywords={Resonance;RLC circuits;MOSFETs;Inductance;Switching loss;Switching circuits;Switches;Design methodology;Analytical models;Circuit simulation},\n doi={10.1109/APEC.2006.1620558},\n ISSN={1048-2334},\n month={March},}\n\n In this paper, a new resonant gate drive circuit is proposed for power MOSFETs. The proposed circuit can recover a portion of the CV/sup 2/ gate energy and it achieves quick turn on and turn off transition times to reduce switching loss and conduction loss in power MOSFETs. The circuit consists of four control switches and a small resonant inductance. The current through the resonant inductance is discontinuous in order to minimize circulating current conduction loss present in other methods. An analysis, design procedure, loss analysis, simulation results and experimental results are presented for the proposed circuit.\n
\n\n\n\n \n\n \n \n Feng, G., Eberle, W., & Liu, Y.\n\n\n \n \n \n \n A digital control algorithm for DC-DC converters under input voltage changes.\n \n \n \n\n\n \n\n\n\n In Twenty-First Annual IEEE Applied Power Electronics Conference and Exposition, 2006. APEC '06., pages 7 pp.-, March 2006. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{1620727,\n author={Guang Feng and Eberle, W. and Yan-Fei Liu},\n booktitle={Twenty-First Annual IEEE Applied Power Electronics Conference and Exposition, 2006. APEC '06.}, \n title={A digital control algorithm for DC-DC converters under input voltage changes}, \n year={2006},\n volume={},\n number={},\n pages={7 pp.-},\n abstract={In this paper, a new optimal two-switching cycle compensation algorithm is proposed to achieve optimal transient performance for DC-DC converters under an input voltage change. Using the principle of capacitor charge balance, the proposed algorithm predicts the optimized two-switching cycle duty cycle series to drive the output voltage back to the steady state when the input voltage changes. Experiments are performed in a 2.5 V, 10 A, synchronous buck converter to verify the effectiveness of the proposed algorithm. The results show that using the proposed algorithm, good dynamic performance, including as small overshoot/undershoot and short recovery time is achieved.},\n keywords={Digital control;DC-DC power converters;Capacitors;Steady-state;Buck converters;Prediction algorithms;Voltage control;Control systems;Optimal control;Field programmable gate arrays},\n doi={10.1109/APEC.2006.1620727},\n ISSN={1048-2334},\n month={March},}\n\n In this paper, a new optimal two-switching cycle compensation algorithm is proposed to achieve optimal transient performance for DC-DC converters under an input voltage change. Using the principle of capacitor charge balance, the proposed algorithm predicts the optimized two-switching cycle duty cycle series to drive the output voltage back to the steady state when the input voltage changes. Experiments are performed in a 2.5 V, 10 A, synchronous buck converter to verify the effectiveness of the proposed algorithm. The results show that using the proposed algorithm, good dynamic performance, including as small overshoot/undershoot and short recovery time is achieved.\n
\n\n\n\n \n\n \n \n Wang, L., & Jatskevich, J.\n\n\n \n \n \n \n A Voltage-Behind-Reactance Synchronous Machine Model for the EMTP-Type Solution.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Systems, 21(4): 1539-1549. Nov 2006.\n \n\n\n\n
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\n\n\n@ARTICLE{1717554,\n author={Wang, L. and Jatskevich, J.},\n journal={IEEE Transactions on Power Systems}, \n title={A Voltage-Behind-Reactance Synchronous Machine Model for the EMTP-Type Solution}, \n year={2006},\n volume={21},\n number={4},\n pages={1539-1549},\n abstract={A full-order, voltage-behind-reactance synchronous machine model has recently been proposed in the literature. This paper extends the voltage-behind-reactance formulation for the electromagnetic transient program (EMTP)-type solution, in which the rotor subsystem is expressed in qd coordinates and the stator subsystem is expressed in abc phase coordinates. The model interface with the nodal-analysis network solution is non-iterative and simultaneous. An example of a single-machine, infinite-bus system shows that the proposed model is more accurate and efficient than several existing EMTP machine models},\n keywords={Voltage;Synchronous machines;Power system modeling;EMTP;Electromagnetic modeling;Stators;Electromagnetic transients;Equivalent circuits;Power system simulation;Stability;Computational techniques;electromagnetic transient program (EMTP);phase-domain (PD) model;synchronous machine;voltage-behind-reactance (VBR) model},\n doi={10.1109/TPWRS.2006.883670},\n ISSN={1558-0679},\n month={Nov},}\n\n\n A full-order, voltage-behind-reactance synchronous machine model has recently been proposed in the literature. This paper extends the voltage-behind-reactance formulation for the electromagnetic transient program (EMTP)-type solution, in which the rotor subsystem is expressed in qd coordinates and the stator subsystem is expressed in abc phase coordinates. The model interface with the nodal-analysis network solution is non-iterative and simultaneous. An example of a single-machine, infinite-bus system shows that the proposed model is more accurate and efficient than several existing EMTP machine models\n
\n\n\n\n \n\n \n \n Eberle, W., Liu, Y., & Sen, P.\n\n\n \n \n \n \n A Simple Large Signal Model for Isolated DC-DC Converters.\n \n \n \n\n\n \n\n\n\n In 2006 Canadian Conference on Electrical and Computer Engineering, pages 883-886, May 2006. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{4055015,\n author={Eberle, Wilson and Liu, Yan-fei and Sen, P.c.},\n booktitle={2006 Canadian Conference on Electrical and Computer Engineering}, \n title={A Simple Large Signal Model for Isolated DC-DC Converters}, \n year={2006},\n volume={},\n number={},\n pages={883-886},\n abstract={In this paper, a large signal model for isolated DC-DC converters is proposed. The model is applicable to both current and voltage mode control. The model has the principle advantage that it is simple to derive-it takes the same form as the switching converter that it is derived from. In the model, the MOSFET switches are replaced by dependent current and voltage sources equal to the average current through the switch, or average voltage across the switch. The active switch and its corresponding synchronous rectifier are replaced by dependent average current sources. In multiple switch topologies, the additional switches are replaced by dependent average voltage sources. Implementation of the model is very simple since no mathematical derivations are required. The only change to the circuit is the replacement of the switches by their dependent sources. The model is simple to implement in circuit simulation software packages such as SPICE. Once implemented, small signal and large signal behaviour can be obtained through simulation. The model is verified experimentally for the small signal and large signal cases using a prototype of the asymmetrical half-bridge topology operating at 48 V input, and 5 V at 6 A load and a 400 kHz switching frequency. Good agreement is obtained between the simulation and experimental results validating the model},\n keywords={DC-DC power converters;Switches;Circuit topology;Circuit simulation;Voltage control;Switching converters;MOSFET circuits;Rectifiers;Mathematical model;Switching circuits;Modeling;current mode control;converters},\n doi={10.1109/CCECE.2006.277754},\n ISSN={0840-7789},\n month={May},}\n\n In this paper, a large signal model for isolated DC-DC converters is proposed. The model is applicable to both current and voltage mode control. The model has the principle advantage that it is simple to derive-it takes the same form as the switching converter that it is derived from. In the model, the MOSFET switches are replaced by dependent current and voltage sources equal to the average current through the switch, or average voltage across the switch. The active switch and its corresponding synchronous rectifier are replaced by dependent average current sources. In multiple switch topologies, the additional switches are replaced by dependent average voltage sources. Implementation of the model is very simple since no mathematical derivations are required. The only change to the circuit is the replacement of the switches by their dependent sources. The model is simple to implement in circuit simulation software packages such as SPICE. Once implemented, small signal and large signal behaviour can be obtained through simulation. The model is verified experimentally for the small signal and large signal cases using a prototype of the asymmetrical half-bridge topology operating at 48 V input, and 5 V at 6 A load and a 400 kHz switching frequency. Good agreement is obtained between the simulation and experimental results validating the model\n
\n\n\n\n \n\n \n \n Eberle, W., Liu, Y., & Sen, P.\n\n\n \n \n \n \n A Resonant Gate Drive Circuit with Reduced MOSFET Switching and Gate Losses.\n \n \n \n\n\n \n\n\n\n In IECON 2006 - 32nd Annual Conference on IEEE Industrial Electronics, pages 1745-1750, Nov 2006. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{4153536,\n author={Eberle, Wilson and Liu, Yan-Fei and Sen, P.C.},\n booktitle={IECON 2006 - 32nd Annual Conference on IEEE Industrial Electronics}, \n title={A Resonant Gate Drive Circuit with Reduced MOSFET Switching and Gate Losses}, \n year={2006},\n volume={},\n number={},\n pages={1745-1750},\n abstract={In this paper, a new resonant gate drive circuit is proposed for power MOSFETs. The proposed circuit achieves quick turn on and turn off transition times to reduce switching loss and conduction loss in power MOSFETS. In addition, it can recover a portion of the CV2 gate energy normally dissipated in a conventional driver. The circuit consists of four control switches and a small resonant inductance. The current through the resonant inductance is discontinuous in order to minimize circulating current conduction loss. Experimental results are presented for the proposed driver operating in a boost converter at 1 MHz. At 5 V gate drive, 4% efficiency improvement is achieved. At 12 V gate drive, 6.5% efficiency improvement is achieved},\n keywords={Resonance;RLC circuits;MOSFET circuits;Switching circuits;Switching loss;Driver circuits;Power MOSFET;Switches;Drives;Quadratic programming},\n doi={10.1109/IECON.2006.347843},\n ISSN={1553-572X},\n month={Nov},}\n\n In this paper, a new resonant gate drive circuit is proposed for power MOSFETs. The proposed circuit achieves quick turn on and turn off transition times to reduce switching loss and conduction loss in power MOSFETS. In addition, it can recover a portion of the CV2 gate energy normally dissipated in a conventional driver. The circuit consists of four control switches and a small resonant inductance. The current through the resonant inductance is discontinuous in order to minimize circulating current conduction loss. Experimental results are presented for the proposed driver operating in a boost converter at 1 MHz. At 5 V gate drive, 4% efficiency improvement is achieved. At 12 V gate drive, 6.5% efficiency improvement is achieved\n
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\n \n \n\n \n \n Eberle, W., Sen, P., & Liu, Y.\n\n\n \n \n \n \n A new resonant gate drive circuit with efficient energy recovery and low conduction loss.\n \n \n \n\n\n \n\n\n\n In 31st Annual Conference of IEEE Industrial Electronics Society, 2005. IECON 2005., pages 6 pp.-, Nov 2005. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{1568981,\n author={Eberle, W. and Sen, P.C. and Liu, Y.-F.},\n booktitle={31st Annual Conference of IEEE Industrial Electronics Society, 2005. IECON 2005.}, \n title={A new resonant gate drive circuit with efficient energy recovery and low conduction loss}, \n year={2005},\n volume={},\n number={},\n pages={6 pp.-},\n abstract={In this paper, a new resonant gate drive circuit is proposed. The proposed circuit consists of four control switches and a small resonant inductance. The current through the resonant inductance is discontinuous in order to minimize circulating current conduction loss present in other methods. The proposed circuit also achieves quick turn-on and turn-off transition times to reduce switching loss and conduction loss in power MOSFETS. An analysis, design procedure and simulation results are presented for the proposed circuit},\n keywords={Resonance;RLC circuits;MOSFETs;Inductors;Switches;Drives;Switching circuits;Switching frequency;Inductance;Switching loss},\n doi={10.1109/IECON.2005.1568981},\n ISSN={1553-572X},\n month={Nov},}\n\n\n In this paper, a new resonant gate drive circuit is proposed. The proposed circuit consists of four control switches and a small resonant inductance. The current through the resonant inductance is discontinuous in order to minimize circulating current conduction loss present in other methods. The proposed circuit also achieves quick turn-on and turn-off transition times to reduce switching loss and conduction loss in power MOSFETS. An analysis, design procedure and simulation results are presented for the proposed circuit\n
\n\n\n\n \n\n \n \n Ye, S., Eberle, W., Yang, Z., & Liu, Y.\n\n\n \n \n \n \n A New Non-Isolated Full Bridge Topology for Low Voltage High Current VRM Applications.\n \n \n \n\n\n \n\n\n\n In 2005 IEEE 36th Power Electronics Specialists Conference, pages 389-393, June 2005. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{1581653,\n author={Sheng Ye and Eberle, W. and Zhihua Yang and Yan-Fei Liu},\n booktitle={2005 IEEE 36th Power Electronics Specialists Conference}, \n title={A New Non-Isolated Full Bridge Topology for Low Voltage High Current VRM Applications}, \n year={2005},\n volume={},\n number={},\n pages={389-393},\n abstract={In this paper a new non-isolated full bridge topology is introduced. The primary side of this topology is a full bridge; however, the input voltage ground of the conventional full bridge is connected directly to the positive point of the output and not connected to the input ground. In this arrangement, the input current flows directly to the load without going through the transformer. The secondary side rectifier stage is a current doubler. The primary side can operate in either phase shift soft switching mode or hard switching mode. The advantages of this topology, include soft switching and reduced conduction loss. A 1.41 by 1.41 inch power module has been built and tested to verify the analysis},\n keywords={Bridge circuits;Low voltage;Rectifiers;MOSFETs;Application software;Circuit topology;Switching loss;Switching frequency;Multichip modules;Circuit testing},\n doi={10.1109/PESC.2005.1581653},\n ISSN={2377-6617},\n month={June},}\n\n In this paper a new non-isolated full bridge topology is introduced. The primary side of this topology is a full bridge; however, the input voltage ground of the conventional full bridge is connected directly to the positive point of the output and not connected to the input ground. In this arrangement, the input current flows directly to the load without going through the transformer. The secondary side rectifier stage is a current doubler. The primary side can operate in either phase shift soft switching mode or hard switching mode. The advantages of this topology, include soft switching and reduced conduction loss. A 1.41 by 1.41 inch power module has been built and tested to verify the analysis\n
\n\n\n\n \n\n \n \n Feng, G., Eberle, W., & Liu, Y.\n\n\n \n \n \n \n A New Digital Control Algorithm to Achieve Optimal Dynamic Performance in DC-to-DC Converters.\n \n \n \n\n\n \n\n\n\n In 2005 IEEE 36th Power Electronics Specialists Conference, pages 2744-2749, June 2005. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{1582021,\n author={Feng, G. and Eberle, W. and Liu, Y.},\n booktitle={2005 IEEE 36th Power Electronics Specialists Conference}, \n title={A New Digital Control Algorithm to Achieve Optimal Dynamic Performance in DC-to-DC Converters}, \n year={2005},\n volume={},\n number={},\n pages={2744-2749},\n abstract={In this paper, a new optimal control algorithm is proposed to achieve the best possible dynamic performance for DC-to-DC converters under load changes and input voltage changes. Using the concept of capacitor charge balance, the proposed algorithm predicts the optimal transient response for a DC-to-DC converter during the large signal load current change, or input voltage change. The equations used to calculate the optimized transient time and the optimized duty cycle series are presented. By using the proposed algorithm, the best possible transient performance, including the smallest output voltage overshoot/undershoot and the shortest recovery time, is achieved. In addition, since the large signal dynamic response of power converters is successfully predicted, the large signal stability is guaranteed. Experimental results show that the proposed method produces much better dynamic performance than a conventional current mode PID controller},\n keywords={Digital control;DC-DC power converters;Voltage;Optimal control;Capacitors;Prediction algorithms;Transient response;Equations;Stability;Three-term control},\n doi={10.1109/PESC.2005.1582021},\n ISSN={2377-6617},\n month={June},}\n\n In this paper, a new optimal control algorithm is proposed to achieve the best possible dynamic performance for DC-to-DC converters under load changes and input voltage changes. Using the concept of capacitor charge balance, the proposed algorithm predicts the optimal transient response for a DC-to-DC converter during the large signal load current change, or input voltage change. The equations used to calculate the optimized transient time and the optimized duty cycle series are presented. By using the proposed algorithm, the best possible transient performance, including the smallest output voltage overshoot/undershoot and the shortest recovery time, is achieved. In addition, since the large signal dynamic response of power converters is successfully predicted, the large signal stability is guaranteed. Experimental results show that the proposed method produces much better dynamic performance than a conventional current mode PID controller\n
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\n \n \n\n \n \n Eberle, W., Han, Y., Liu, Y., & Ye, S.\n\n\n \n \n \n \n An overall study of the asymmetrical half-bridge with unbalanced transformer turns under current mode control.\n \n \n \n\n\n \n\n\n\n In Nineteenth Annual IEEE Applied Power Electronics Conference and Exposition, 2004. APEC '04., volume 2, pages 1083-1089 vol.2, Feb 2004. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{1295957,\n author={Eberle, W. and Yongtao Han and Yan-Fei Liu and Sheng Ye},\n booktitle={Nineteenth Annual IEEE Applied Power Electronics Conference and Exposition, 2004. APEC '04.}, \n title={An overall study of the asymmetrical half-bridge with unbalanced transformer turns under current mode control}, \n year={2004},\n volume={2},\n number={},\n pages={1083-1089 vol.2},\n abstract={An overall study of the asymmetrical half-bridge (AHB) with unbalanced transformer turns under current mode control is presented. An analysis is presented for the output filter, switch stress, and dynamics. In addition, key ideas of the AHB transformer design are presented. This is followed by a survey of the existing methods that the AHB uses to achieve zero voltage switching at turn-on, namely the series inductance method and the parallel inductance method. Following these, the auxiliary L-C-C circuit method is proposed for the AHB to further minimize switching loss. Experimental results are included for a 48 V/5 V prototype operating at 6 A load and 400 kHz.},\n keywords={Circuit faults;Voltage control;Zero voltage switching;Switches;Filters;Saturation magnetization;Stress;Topology;Inductance;Automatic control},\n doi={10.1109/APEC.2004.1295957},\n ISSN={},\n month={Feb},}\n\n An overall study of the asymmetrical half-bridge (AHB) with unbalanced transformer turns under current mode control is presented. An analysis is presented for the output filter, switch stress, and dynamics. In addition, key ideas of the AHB transformer design are presented. This is followed by a survey of the existing methods that the AHB uses to achieve zero voltage switching at turn-on, namely the series inductance method and the parallel inductance method. Following these, the auxiliary L-C-C circuit method is proposed for the AHB to further minimize switching loss. Experimental results are included for a 48 V/5 V prototype operating at 6 A load and 400 kHz.\n
\n\n\n\n \n\n \n \n Ye, S., Eberle, W., & Liu, Y.\n\n\n \n \n \n \n A novel EMI filter design method for switching power supplies.\n \n \n \n\n\n \n\n\n\n IEEE Transactions on Power Electronics, 19(6): 1668-1678. Nov 2004.\n \n\n\n\n
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\n\n\n@ARTICLE{1353360,\n author={Sheng Ye and Eberle, W. and Yan-Fei Liu},\n journal={IEEE Transactions on Power Electronics}, \n title={A novel EMI filter design method for switching power supplies}, \n year={2004},\n volume={19},\n number={6},\n pages={1668-1678},\n abstract={This work introduces an improved and simplified method to design electromagnetic interference (EMI) filters for both dc-dc and ac-dc switching power supplies. This method uses the practical approach of measuring the power supply noise spectrum and using the data to calculate the maximum possible magnitude and minimum possible magnitude of the differential mode and common mode noise impedances. The noise impedance magnitude information aids the design of the EMI filter. Phase information for the noise impedance is not required. In addition, information about the topology and control method of the power supply is not needed. This method solves the limitations of existing EMI filter design methods, which are either too complicated to use, or are based on ideal cases that neglect the noise impedance. The analysis and experimental results show that this method can guarantee that the required attenuation can be achieved, especially at low frequencies.},\n keywords={Electromagnetic interference;Design methodology;Power supplies;Impedance measurement;Power measurement;Noise measurement;Electromagnetic measurements;Information filtering;Information filters;Phase noise;Electromagnetic interference (EMI);EMI filter;noise impedance},\n doi={10.1109/TPEL.2004.836629},\n ISSN={1941-0107},\n month={Nov},}\n\n This work introduces an improved and simplified method to design electromagnetic interference (EMI) filters for both dc-dc and ac-dc switching power supplies. This method uses the practical approach of measuring the power supply noise spectrum and using the data to calculate the maximum possible magnitude and minimum possible magnitude of the differential mode and common mode noise impedances. The noise impedance magnitude information aids the design of the EMI filter. Phase information for the noise impedance is not required. In addition, information about the topology and control method of the power supply is not needed. This method solves the limitations of existing EMI filter design methods, which are either too complicated to use, or are based on ideal cases that neglect the noise impedance. The analysis and experimental results show that this method can guarantee that the required attenuation can be achieved, especially at low frequencies.\n
\n\n\n\n \n\n \n \n Han, Y., Eberle, W., & Liu, Y.\n\n\n \n \n \n \n New measurement methods to characterize transformer core loss and copper loss in high frequency switching mode power supplies.\n \n \n \n\n\n \n\n\n\n In 2004 IEEE 35th Annual Power Electronics Specialists Conference (IEEE Cat. No.04CH37551), volume 2, pages 1695-1701 Vol.2, June 2004. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{1355681,\n author={Yongtao Han and Eberle, W. and Yan-Fei Liu},\n booktitle={2004 IEEE 35th Annual Power Electronics Specialists Conference (IEEE Cat. No.04CH37551)}, \n title={New measurement methods to characterize transformer core loss and copper loss in high frequency switching mode power supplies}, \n year={2004},\n volume={2},\n number={},\n pages={1695-1701 Vol.2},\n abstract={New measurement methods to characterize transformer core loss and copper loss in high frequency switching mode power supplies are proposed. Experimental results for a planar transformer used in a DC/DC converter are presented. A time-domain finite element analysis transient solver is adopted to verify the measurement results. In addition, a detailed error analysis on each of the error sources of the proposed measurement methods is provided.},\n keywords={Power measurement;Frequency measurement;Loss measurement;Transformer cores;Copper;Power supplies;Transient analysis;DC-DC power converters;Time domain analysis;Finite element methods},\n doi={10.1109/PESC.2004.1355681},\n ISSN={0275-9306},\n month={June},}\n\n New measurement methods to characterize transformer core loss and copper loss in high frequency switching mode power supplies are proposed. Experimental results for a planar transformer used in a DC/DC converter are presented. A time-domain finite element analysis transient solver is adopted to verify the measurement results. In addition, a detailed error analysis on each of the error sources of the proposed measurement methods is provided.\n
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\n \n \n\n \n \n Eberle, W. A.\n\n\n \n \n \n \n Design, analysis, simulation and modeling of a soft-switching unbalanced asymmetrical half-bridge dc-dc converter.\n \n \n \n\n\n \n\n\n\n . 2003.\n \n\n\n\n
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\n\n\n\n@article{eberle2003design,\n title={Design, analysis, simulation and modeling of a soft-switching unbalanced asymmetrical half-bridge dc-dc converter},\n author={Eberle, Wilson AT},\n year={2003}\n}\n\n\n
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\n \n \n\n \n \n Eberle, W., & Liu, Y.\n\n\n \n \n \n \n A zero voltage switching asymmetrical half-bridge DC/DC converter with unbalanced secondary windings for improved bandwidth.\n \n \n \n\n\n \n\n\n\n In 2002 IEEE 33rd Annual IEEE Power Electronics Specialists Conference. Proceedings (Cat. No.02CH37289), volume 4, pages 1829-1834 vol.4, June 2002. \n \n\n\n\n
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\n\n\n@INPROCEEDINGS{1023076,\n author={Eberle, W. and Yan-Fei Liu},\n booktitle={2002 IEEE 33rd Annual IEEE Power Electronics Specialists Conference. Proceedings (Cat. No.02CH37289)}, \n title={A zero voltage switching asymmetrical half-bridge DC/DC converter with unbalanced secondary windings for improved bandwidth}, \n year={2002},\n volume={4},\n number={},\n pages={1829-1834 vol.4},\n abstract={This paper presents a modified PWM half-bridge DC/DC converter that can achieve zero voltage switching (ZVS) and can operate under current or voltage mode control. The proposed topology operates with complementary-control (asymmetrical duty cycle) and utilizes unbalanced transformer secondary windings and a low output inductance value to achieve an improved bandwidth and load transient response compared to the active clamp forward converter. Self-driven synchronous rectifiers are used to increase efficiency. The operation of the converter is discussed, along with a comparison to the balanced secondary topology and the active clamp forward converter. A method is presented to eliminate synchronous rectifier gate drive voltage stress caused by asymmetrically unbalanced gate drive waveforms. In addition, an averaged switch large signal model is presented for the converter. Simulation results are presented for a converter operating at 400 kHz, with a 48 VDC nominal input and a 5 VDC/5 A output.},\n keywords={Zero voltage switching;DC-DC power converters;Topology;Clamps;Rectifiers;Switches;Pulse width modulation;Pulse width modulation converters;Voltage control;Inductance},\n doi={10.1109/PSEC.2002.1023076},\n ISSN={},\n month={June},}\n\n\n This paper presents a modified PWM half-bridge DC/DC converter that can achieve zero voltage switching (ZVS) and can operate under current or voltage mode control. The proposed topology operates with complementary-control (asymmetrical duty cycle) and utilizes unbalanced transformer secondary windings and a low output inductance value to achieve an improved bandwidth and load transient response compared to the active clamp forward converter. Self-driven synchronous rectifiers are used to increase efficiency. The operation of the converter is discussed, along with a comparison to the balanced secondary topology and the active clamp forward converter. A method is presented to eliminate synchronous rectifier gate drive voltage stress caused by asymmetrically unbalanced gate drive waveforms. In addition, an averaged switch large signal model is presented for the converter. Simulation results are presented for a converter operating at 400 kHz, with a 48 VDC nominal input and a 5 VDC/5 A output.\n
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