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\n  \n 2024\n \n \n (1)\n \n \n
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\n \n\n \n \n \n \n \n \n Cascade: CPU Fuzzing via Intricate Program Generation.\n \n \n \n \n\n\n \n Flavien Solt; Katharina Ceesay-Seitz; and Kaveh Razavi.\n\n\n \n\n\n\n In USENIX Security, August 2024. \n \n\n\n\n
\n\n\n\n \n \n \"Cascade:Paper\n  \n \n \n \"Cascade:URL\n  \n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n  \n \n 253 downloads\n \n \n\n \n \n \n \n \n \n \n\n  \n \n \n \n \n \n \n \n \n \n \n\n\n\n
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@inproceedings{solt_cascade_2024,\n\ttitle = {{Cascade: CPU Fuzzing via Intricate Program Generation}}, \n\turl = {Paper=https://comsec.ethz.ch/wp-content/files/cascade_sec24.pdf URL=https://comsec.ethz.ch/cascade},\n\tbooktitle = {{USENIX Security}},\n\tauthor = {Solt, Flavien and Ceesay-Seitz, Katharina and Razavi, Kaveh},\n\tmonth = aug,\n\tyear = {2024},\n\tkeywords = {dir\\_designsec, proj\\_lastbug, proj\\_promise, type\\_tier1}\n}\n\n
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\n  \n 2022\n \n \n (2)\n \n \n
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\n \n\n \n \n \n \n \n \n RemembERR: Leveraging Microprocessor Errata for Design Testing and Validation.\n \n \n \n \n\n\n \n Flavien Solt; Patrick Jattke; and Kaveh Razavi.\n\n\n \n\n\n\n In MICRO, October 2022. \n \n\n\n\n
\n\n\n\n \n \n \"RemembERR:Paper\n  \n \n \n \"RemembERR:URL\n  \n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n  \n \n 51 downloads\n \n \n\n \n \n \n \n \n \n \n\n  \n \n \n \n \n \n \n \n \n \n \n \n \n\n\n\n
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@inproceedings{solt_rememberr_2022,\n\ttitle = {{RemembERR: Leveraging Microprocessor Errata for Design Testing and Validation}},\n\turl = {Paper=https://comsec.ethz.ch/wp-content/files/rememberr_micro22.pdf URL=https://comsec.ethz.ch/research/hardware-design-security/rememberr},\n\tbooktitle = {{MICRO}},\n\tauthor = {Solt, Flavien and Jattke, Patrick and Razavi, Kaveh},\n\tmonth = oct,\n\tyear = {2022},\n\tkeywords = {dir\\_designsec, proj\\_lastbug, proj\\_promise, proj\\_nccr, type\\_tier1}\n}\n\n
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\n \n\n \n \n \n \n \n \n CellIFT: Leveraging Cells for Scalable and Precise Dynamic Information Flow Tracking in RTL.\n \n \n \n \n\n\n \n Flavien Solt; Ben Gras; and Kaveh Razavi.\n\n\n \n\n\n\n In USENIX Security, August 2022. \n Patent pending\n\n\n\n
\n\n\n\n \n \n \"CellIFT:Paper\n  \n \n \n \"CellIFT:URL\n  \n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n  \n \n 44 downloads\n \n \n\n \n \n \n \n \n \n \n\n  \n \n \n \n \n \n \n \n \n \n \n\n\n\n
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@inproceedings{solt_cellift_2022,\n\ttitle = {{CellIFT: Leveraging Cells for Scalable and Precise Dynamic Information Flow Tracking in RTL}},\n\turl = {Paper=https://comsec.ethz.ch/wp-content/files/cellift_sec22.pdf URL=https://comsec.ethz.ch/cellift},\n\tbooktitle = {{USENIX Security}},\n\tauthor = {Solt, Flavien and Gras, Ben and Razavi, Kaveh},\n\tnote = {Patent pending},\n\tmonth = aug,\n\tyear = {2022},\n\tkeywords = {dir\\_designsec, proj\\_lastbug, proj\\_promise, type\\_tier1}\n}\n\n
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