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\n  \n 2024\n \n \n (3)\n \n \n
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\n \n\n \n \n \n \n \n \n ZenHammer: Rowhammer Attacks on AMD Zen-based Platforms.\n \n \n \n \n\n\n \n Patrick Jattke; Max Wipfli; Flavien Solt; Michele Marazzi; Matej Bölcskei; and Kaveh Razavi.\n\n\n \n\n\n\n In USENIX Security, August 2024. \n \n\n\n\n
\n\n\n\n \n \n \"ZenHammer:Paper\n  \n \n \n \"ZenHammer:URL\n  \n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n  \n \n 65 downloads\n \n \n\n \n \n \n \n \n \n \n\n  \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n\n\n\n
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@inproceedings{jattke_zenhammer_2024,\n\ttitle = {{ZenHammer: Rowhammer Attacks on AMD Zen-based Platforms}}, \n\turl = {Paper=https://comsec.ethz.ch/wp-content/files/zenhammer_sec24.pdf URL=https://comsec.ethz.ch/zenhammer},\n\tbooktitle = {{USENIX Security}},\n\tauthor = {Jattke, Patrick and Wipfli, Max and Solt, Flavien and Marazzi, Michele and Bölcskei, Matej and Razavi, Kaveh},\n\tmonth = aug,\n\tyear = {2024},\n\tkeywords = {dir\\_dram, proj\\_mfs, proj\\_promise, proj\\_nccr, type\\_conf, type\\_tier1}\n}\n\n
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\n \n\n \n \n \n \n \n \n Cascade: CPU Fuzzing via Intricate Program Generation.\n \n \n \n \n\n\n \n Flavien Solt; Katharina Ceesay-Seitz; and Kaveh Razavi.\n\n\n \n\n\n\n In USENIX Security, August 2024. \n \n\n\n\n
\n\n\n\n \n \n \"Cascade:Paper\n  \n \n \n \"Cascade:URL\n  \n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n  \n \n 234 downloads\n \n \n\n \n \n \n \n \n \n \n\n  \n \n \n \n \n \n \n \n \n \n \n\n\n\n
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@inproceedings{solt_cascade_2024,\n\ttitle = {{Cascade: CPU Fuzzing via Intricate Program Generation}}, \n\turl = {Paper=https://comsec.ethz.ch/wp-content/files/cascade_sec24.pdf URL=https://comsec.ethz.ch/cascade},\n\tbooktitle = {{USENIX Security}},\n\tauthor = {Solt, Flavien and Ceesay-Seitz, Katharina and Razavi, Kaveh},\n\tmonth = aug,\n\tyear = {2024},\n\tkeywords = {dir\\_designsec, proj\\_lastbug, proj\\_promise, type\\_tier1}\n}\n\n
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\n \n\n \n \n \n \n \n HiFi-DRAM: Enabling High-fidelity DRAM Research by Uncovering Sense Amplifiers with IC Imaging.\n \n \n \n\n\n \n Michele Marazzi; Tristan Sachsenweger; Flavien Solt; Peng Zeng; Kubo Takashi; Maksym Yarema; and Kaveh Razavi.\n\n\n \n\n\n\n In ISCA, July 2024. \n \n\n\n\n
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@inproceedings{marazzi_hifidram_2024,\n\ttitle = {{HiFi-DRAM: Enabling High-fidelity DRAM Research by Uncovering Sense Amplifiers with IC Imaging}}, \n\tbooktitle = {{ISCA}},\n\tauthor = {Marazzi, Michele and Sachsenweger, Tristan and Solt, Flavien and Zeng, Peng and Takashi, Kubo and Yarema, Maksym and Razavi, Kaveh},\n\tmonth = jul,\n\tyear = {2024},\n\tkeywords = {dir\\_dram, proj\\_mfs, proj\\_promise, proj\\_nccr, type\\_conf, type\\_tier1}\n}\n\n
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\n  \n 2023\n \n \n (1)\n \n \n
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\n \n\n \n \n \n \n \n \n REGA: Scalable Rowhammer Mitigation with Refresh-Generating Activations.\n \n \n \n \n\n\n \n Michele Marazzi; Flavien Solt; Patrick Jattke; Kubo Takashi; and Kaveh Razavi.\n\n\n \n\n\n\n In S&P, May 2023. \n Patent pending\n\n\n\n
\n\n\n\n \n \n \"REGA:Paper\n  \n \n \n \"REGA:URL\n  \n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n  \n \n 112 downloads\n \n \n\n \n \n \n \n \n \n \n\n  \n \n \n \n \n \n \n \n \n \n \n \n \n \n \n\n\n\n
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@inproceedings{marazzi_rega_2023,\n\ttitle = {{REGA}: {Scalable} {Rowhammer} {Mitigation} with {Refresh-Generating} {Activations}},\n\turl = {Paper=https://comsec.ethz.ch/wp-content/files/rega_sp23.pdf URL=https://comsec.ethz.ch/research/dram/rega},\n\tbooktitle = {{S\\&P}},\n\tnote = {Patent pending},\n\tauthor = {Marazzi, Michele and Solt, Flavien and Jattke, Patrick and Takashi, Kubo and Razavi, Kaveh},\n\tmonth = may,\n\tyear = {2023},\n\tkeywords = {dir\\_dram, proj\\_mfs, proj\\_promise, proj\\_nccr, type\\_conf, type\\_tier1}\n}\n\n
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\n  \n 2022\n \n \n (3)\n \n \n
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\n \n\n \n \n \n \n \n \n RemembERR: Leveraging Microprocessor Errata for Design Testing and Validation.\n \n \n \n \n\n\n \n Flavien Solt; Patrick Jattke; and Kaveh Razavi.\n\n\n \n\n\n\n In MICRO, October 2022. \n \n\n\n\n
\n\n\n\n \n \n \"RemembERR:Paper\n  \n \n \n \"RemembERR:URL\n  \n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n  \n \n 47 downloads\n \n \n\n \n \n \n \n \n \n \n\n  \n \n \n \n \n \n \n \n \n \n \n \n \n\n\n\n
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@inproceedings{solt_rememberr_2022,\n\ttitle = {{RemembERR: Leveraging Microprocessor Errata for Design Testing and Validation}},\n\turl = {Paper=https://comsec.ethz.ch/wp-content/files/rememberr_micro22.pdf URL=https://comsec.ethz.ch/research/hardware-design-security/rememberr},\n\tbooktitle = {{MICRO}},\n\tauthor = {Solt, Flavien and Jattke, Patrick and Razavi, Kaveh},\n\tmonth = oct,\n\tyear = {2022},\n\tkeywords = {dir\\_designsec, proj\\_lastbug, proj\\_promise, proj\\_nccr, type\\_tier1}\n}\n\n
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\n \n\n \n \n \n \n \n \n CellIFT: Leveraging Cells for Scalable and Precise Dynamic Information Flow Tracking in RTL.\n \n \n \n \n\n\n \n Flavien Solt; Ben Gras; and Kaveh Razavi.\n\n\n \n\n\n\n In USENIX Security, August 2022. \n Patent pending\n\n\n\n
\n\n\n\n \n \n \"CellIFT:Paper\n  \n \n \n \"CellIFT:URL\n  \n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n  \n \n 36 downloads\n \n \n\n \n \n \n \n \n \n \n\n  \n \n \n \n \n \n \n \n \n \n \n\n\n\n
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@inproceedings{solt_cellift_2022,\n\ttitle = {{CellIFT: Leveraging Cells for Scalable and Precise Dynamic Information Flow Tracking in RTL}},\n\turl = {Paper=https://comsec.ethz.ch/wp-content/files/cellift_sec22.pdf URL=https://comsec.ethz.ch/cellift},\n\tbooktitle = {{USENIX Security}},\n\tauthor = {Solt, Flavien and Gras, Ben and Razavi, Kaveh},\n\tnote = {Patent pending},\n\tmonth = aug,\n\tyear = {2022},\n\tkeywords = {dir\\_designsec, proj\\_lastbug, proj\\_promise, type\\_tier1}\n}\n\n
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\n \n\n \n \n \n \n \n \n ProTRR: Principled yet Optimal In-DRAM Target Row Refresh.\n \n \n \n \n\n\n \n Michele Marazzi; Patrick Jattke; Flavien Solt; and Kaveh Razavi.\n\n\n \n\n\n\n In S&P, May 2022. \n Patent pending, ETH Spark Award Nomination, CSAW Europe finalist\n\n\n\n
\n\n\n\n \n \n \"ProTRR:Paper\n  \n \n \n \"ProTRR:URL\n  \n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n  \n \n 33 downloads\n \n \n\n \n \n \n \n \n \n \n\n  \n \n \n \n \n \n \n \n \n \n \n \n \n\n\n\n
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@inproceedings{marazzi_protrr_2022,\n\ttitle = {{ProTRR}: {Principled} yet {Optimal} {In-DRAM} {Target Row Refresh}},\n\turl = {Paper=https://comsec.ethz.ch/wp-content/files/protrr_sp22.pdf URL=https://comsec.ethz.ch/research/dram/protrr},\n\tbooktitle = {{S\\&P}},\n\tnote = {Patent pending, ETH Spark Award Nomination, CSAW Europe finalist},\n\tauthor = {Marazzi, Michele and Jattke, Patrick and Solt, Flavien and Razavi, Kaveh},\n\tmonth = may,\n\tyear = {2022},\n\tkeywords = {dir\\_dram, proj\\_mfs, proj\\_nccr, type\\_conf, type\\_tier1}\n}\n\n
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\n  \n 2020\n \n \n (2)\n \n \n
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\n \n\n \n \n \n \n \n Energy Efficient Heartbeat-Based MAC Protocol for WBAN Employing Body Coupled Communication.\n \n \n \n\n\n \n Flavien Solt; Robin Benarrouch; Guillaume Tochou; Olivér Facklam; Antoine Frappé; Andreia Cathelin; Andreas Kaiser; and Jan Rabaey.\n\n\n \n\n\n\n IEEE Access. October 2020.\n \n\n\n\n
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@article{solt_heartbeatenergy_2020,\n\ttitle = {{Energy} {Efficient} {Heartbeat-Based} {MAC} {Protocol} for {WBAN} {Employing} {Body} {Coupled} {Communication}},\n\tjournal = {{IEEE Access}},\n\tauthor = {Solt, Flavien and Benarrouch, Robin and Tochou, Guillaume and Facklam, Oliv\\'er and Frapp\\'e, Antoine and Cathelin, Andreia and Kaiser, Andreas and Rabaey, Jan},\n\tmonth = oct,\n\tyear = {2020},\n}\n\n
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\n \n\n \n \n \n \n \n Heartbeat-Based Synchronization Scheme for the Human Intranet: Modeling and Analysis.\n \n \n \n\n\n \n Robin Benarrouch; Ali Moin; Flavien Solt; Antoine Frappé; Andreia Cathelin; Andreas Kaiser; and Jan Rabaey.\n\n\n \n\n\n\n In ISCAS, October 2020. \n \n\n\n\n
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@inproceedings{benarrouch_heartbeatsync_2020,\n\ttitle = {{Heartbeat-Based} {Synchronization} {Scheme} for the {Human} {Intranet}: {Modeling} and {Analysis}},\n\tbooktitle = {{ISCAS}},\n\tauthor = {Benarrouch, Robin and Moin, Ali and Solt, Flavien and Frapp\\'e, Antoine and Cathelin, Andreia and Kaiser, Andreas and Rabaey, Jan},\n\tmonth = oct,\n\tyear = {2020},\n}\n\n\n
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