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\n  \n 2018\n \n \n (5)\n \n \n
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\n \n\n \n \n \n \n \n \n Applying Parallel Association Algorithms to Value Meal Design for a Chinese Fast Food Chain Restaurant.\n \n \n \n \n\n\n \n Chi-Bin Cheng, L. Y. H.; and Su, Y.\n\n\n \n\n\n\n In International Conference on Innovation and Management, Chiang Mai, Thailand, July 10-13, 2018., 2018. \n (best paper award)\n\n\n\n
\n\n\n\n \n \n \"ApplyingPaper\n  \n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n  \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{Hsieh2018ICIM,\r\n  title={Applying Parallel Association Algorithms to Value Meal Design for a Chinese Fast Food Chain Restaurant},\r\n  author={Chi-Bin Cheng, Liam Y. Hsieh, and Yu-Chung Su},\r\n  booktitle={International Conference on Innovation and Management, Chiang Mai, Thailand, July 10-13, 2018.},\r\n  year={2018},\r\n  ABSTRACT ={The case company of this study is a Chinese fast food chain restaurant. To enhance its operating efficiency, the company\\'s tactics are to encourage the expenditure by customer per transaction and to improve the service speed by serving more value meals (i.e. combo) to customers. The design of the company’s value meal is based on some fixed base items coupled with main dishes. To implement this operational policy, the company must confirm that the base items for value meals meet customer preferences, as well as appropriate prices. This study utilizes the POS data to find implicit information regarding customer preferences by the association analysis between individual items. Considering the fast growth of POS data in the future, we adopt Hadoop as the computing platform, and use parallel FP-Growth algorithm for association analysis. Two tasks are carried out based on the association analysis: 1) combining weather and POS data, the resulting association rules provide information regarding popular products under different weather information, and such information can be used for marketing designs; and 2) based on pair-wise support of items, the design of the value meal base is modeled as an optimization problem where the objective is to maximize the overall supports in a value meal base.},\r\n  url={https://sites.google.com/site/liamhsieh/2018ICIM_best_paper_award.pdf},\r\n  note ={(best paper award)}\r\n}\r\n\r\n
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\n The case company of this study is a Chinese fast food chain restaurant. To enhance its operating efficiency, the companyś tactics are to encourage the expenditure by customer per transaction and to improve the service speed by serving more value meals (i.e. combo) to customers. The design of the company’s value meal is based on some fixed base items coupled with main dishes. To implement this operational policy, the company must confirm that the base items for value meals meet customer preferences, as well as appropriate prices. This study utilizes the POS data to find implicit information regarding customer preferences by the association analysis between individual items. Considering the fast growth of POS data in the future, we adopt Hadoop as the computing platform, and use parallel FP-Growth algorithm for association analysis. Two tasks are carried out based on the association analysis: 1) combining weather and POS data, the resulting association rules provide information regarding popular products under different weather information, and such information can be used for marketing designs; and 2) based on pair-wise support of items, the design of the value meal base is modeled as an optimization problem where the objective is to maximize the overall supports in a value meal base.\n
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\n \n\n \n \n \n \n \n Campaign Planning for Multi-Purpose Batch Plants: A Case Study for Active Pharmaceutical Ingredient Production.\n \n \n \n\n\n \n Hsieh, L. Y.; Tahir, A.; Chang, K.; and Hsu, M.\n\n\n \n\n\n\n Journal of the American Chemical Society, (in preparation). 2018.\n \n\n\n\n
\n\n\n\n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@article{Hsieh2018IECR,\r\n  author = {Liam Y. Hsieh and Amna Tahir and Kuo-Hao Chang and Mao-Kai Hsu},\r\n  journal = {Journal of the American Chemical Society},\r\n  number = {in preparation},\r\n  pages = {},\r\n  title = {Campaign Planning for Multi-Purpose Batch Plants: A Case Study for Active Pharmaceutical Ingredient Production},\r\n  volume = {},\r\n%  publisher={Taylor \\& Francis},\r\n  year = {2018}\r\n%  note ={}\r\n}\r\n\r\n
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\n \n\n \n \n \n \n \n Cycle Time Reduction for a Multi-phase Semiconductor Wafer Fabrication Facility through Optimal Workload Balance.\n \n \n \n\n\n \n Tsung-Ju Hsieh, L. Y. H.\n\n\n \n\n\n\n International Journal of Advanced Manufacturing Technology, (in preparation). 2018.\n \n\n\n\n
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@article{Hsieh2018IJAMT,\r\n  author = {Tsung-Ju Hsieh, Liam Y. Hsieh},\r\n  journal = {International Journal of Advanced Manufacturing Technology},\r\n  number = {in preparation},\r\n  pages = {},\r\n  title = {Cycle Time Reduction for a Multi-phase Semiconductor Wafer Fabrication Facility through Optimal Workload Balance},\r\n  volume = {},\r\n%  publisher={Taylor \\& Francis},\r\n  year = {2018}\r\n%  note ={ for }\r\n}\r\n
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\n \n\n \n \n \n \n \n \n A Throughput Management System for Semiconductor Wafer Fabrication Facilities: Design, Systems and Implementation.\n \n \n \n \n\n\n \n Hsieh, L. Y.; and Hsieh, T.\n\n\n \n\n\n\n Processes, 6(2): 16. 2018.\n \n\n\n\n
\n\n\n\n \n \n \"APaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n  \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@Article{Hsieh2018Processes,\r\nAUTHOR = {Liam Y. Hsieh and Tsung-Ju Hsieh},\r\nTITLE = {A Throughput Management System for Semiconductor Wafer Fabrication Facilities: Design, Systems and Implementation},\r\nJOURNAL = {Processes},\r\nVOLUME = {6},\r\nYEAR = {2018},\r\nNUMBER = {2},\r\nPages = {16},\r\nURL = {http://www.mdpi.com/2227-9717/6/2/16},\r\nISSN = {2227-9717},\r\nABSTRACT = {Equipment throughput is one of the most critical parameters for production planning and scheduling, which is often derived by optimization techniques to achieve business goals. However, in semiconductor manufacturing, up-to-date and reliable equipment throughput is not easy to estimate and maintain because of the high complexity and extreme amount of data in the production systems. This article concerns the development and implementation of a throughput management system tailored for a semiconductor wafer fabrication plant (Fab). A brief overview of the semiconductor manufacturing and an introduction of the case Fab are presented first. Then, we focus on the system architecture and some concepts of crucial modules. This study also describes the project timescales and difficulties and discusses both tangible and intangible benefits from this project.},\r\nDOI = {10.3390/pr6020016}\r\n}\r\n
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\n Equipment throughput is one of the most critical parameters for production planning and scheduling, which is often derived by optimization techniques to achieve business goals. However, in semiconductor manufacturing, up-to-date and reliable equipment throughput is not easy to estimate and maintain because of the high complexity and extreme amount of data in the production systems. This article concerns the development and implementation of a throughput management system tailored for a semiconductor wafer fabrication plant (Fab). A brief overview of the semiconductor manufacturing and an introduction of the case Fab are presented first. Then, we focus on the system architecture and some concepts of crucial modules. This study also describes the project timescales and difficulties and discusses both tangible and intangible benefits from this project.\n
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\n \n\n \n \n \n \n \n Efficient Due Date Quoting and Production Scheduling for Integrated Circuit Packaging with Reentrant Processes.\n \n \n \n\n\n \n Hsieh, L. Y.; and Cheng, C.\n\n\n \n\n\n\n IEEE Transactions on Components, Packaging and Manufacturing Technology, 8(8): 1487-1495. 2018.\n \n\n\n\n
\n\n\n\n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n  \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@article{Hsieh2018IEEECPMT,\r\n  author = {Liam Y. Hsieh and Chi-Bin Cheng},\r\n  journal = {IEEE Transactions on Components, Packaging and Manufacturing Technology},\r\n  number = {8},\r\n  pages = {1487-1495},\r\n  title = {Efficient Due Date Quoting and Production Scheduling for Integrated Circuit Packaging with Reentrant Processes},\r\n  volume = {8},\r\n  publisher={IEEE},\r\n  ABSTRACT ={The advances in packaging technology in the past decade have overcome a few engineering limitations in integrated circuit (IC) manufacturing. This has greatly complicated the manufacturing process and created a huge challenge in the operations management of the semiconductor back-end production. In particular, the modern demand of lighter and smaller products expedites the multichip packaging technology, which requires reentrant processes and hence makes resource scheduling more difficult. Apart from the fact that IC packaging shares many key features with the semiconductor front-end production, the cycle time of back-end production is significantly shorter than that of the front-end production. Therefore, there is an urgent need of a rapid solution procedure to generate a reliable production schedule for IC packaging. To respond to customer requests efficiently, this paper models the production scheduling of IC packaging as an optimization model and formulates a hybrid genetic algorithm (GA) to solve the problem efficiently. The embedded structure of our model enables the decomposition of the original problems into many small-sized subproblems, which can be solved by available optimization solvers. These subproblems communicate via a master problem, which is solved by a GA to determine the due dates assigned to subproblems. The master and the subproblems are iteratively solved in turn to obtain a satisfactory solution. Computational experiments and an empirical study are performed to validate the efficiency and the feasibility of the proposed approach.},\r\n  year = {2018},\r\n  DOI={10.1109/TCPMT.2018.2847689},\r\n  %note ={}\r\n}\r\n\r\n%@inproceedings{Hsieh2017SII,\r\n%  title={A Dynamic Productivity Optimization Based on the System Integration in Manufacturing},\r\n%  author={Liam Y. Hsieh and Si Zhang and Chun-Hung Chen},\r\n%  booktitle={2017 IEEE/SICE International Symposium on System Integration},\r\n%  year={2017}\r\n%}\r\n\r\n
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\n The advances in packaging technology in the past decade have overcome a few engineering limitations in integrated circuit (IC) manufacturing. This has greatly complicated the manufacturing process and created a huge challenge in the operations management of the semiconductor back-end production. In particular, the modern demand of lighter and smaller products expedites the multichip packaging technology, which requires reentrant processes and hence makes resource scheduling more difficult. Apart from the fact that IC packaging shares many key features with the semiconductor front-end production, the cycle time of back-end production is significantly shorter than that of the front-end production. Therefore, there is an urgent need of a rapid solution procedure to generate a reliable production schedule for IC packaging. To respond to customer requests efficiently, this paper models the production scheduling of IC packaging as an optimization model and formulates a hybrid genetic algorithm (GA) to solve the problem efficiently. The embedded structure of our model enables the decomposition of the original problems into many small-sized subproblems, which can be solved by available optimization solvers. These subproblems communicate via a master problem, which is solved by a GA to determine the due dates assigned to subproblems. The master and the subproblems are iteratively solved in turn to obtain a satisfactory solution. Computational experiments and an empirical study are performed to validate the efficiency and the feasibility of the proposed approach.\n
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\n  \n 2017\n \n \n (3)\n \n \n
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\n \n\n \n \n \n \n \n Equipment Utilization Enhancement in Photolithography Area Through a Dynamic System Control Using Multi-Fidelity Simulation Optimization With Big Data Technique.\n \n \n \n\n\n \n Hsieh, L. Y.; Huang, E.; and Chen, C.\n\n\n \n\n\n\n IEEE Transactions on Semiconductor Manufacturing, 30(2): 166-175. 2017.\n \n\n\n\n
\n\n\n\n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n  \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
\n
@article{Hsieh2017IEEESM,\r\nauthor={Liam Y. Hsieh and Edward Huang and Chun-Hung Chen},\r\njournal={IEEE Transactions on Semiconductor Manufacturing},\r\ntitle={Equipment Utilization Enhancement in Photolithography Area Through a Dynamic System Control Using Multi-Fidelity Simulation Optimization With Big Data Technique},\r\nyear={2017},\r\nvolume={30},\r\nnumber={2},\r\npages={166-175},\r\nABSTRACT ={Photolithographic (Photo) plays a key role in semiconductor manufacturing because of its importance to advanced process shrinking. Even with a small improvement in its operational efficiency, the cost competitiveness in production can be enhanced as a result of the huge amount of share capital cost. However, it is difficult to stabilize the throughput rhythm of Fabs, while keeping a high equipment utilization for Photo. In the light of Industry 4.0 and big data, a huge potential of maintaining a desired system performance by (near) real-time dynamic system control is highly anticipated. But it also poses challenges to intelligently handling mass data acquisition and allocating computing resources. This research aims to maximize the equipment utilization in Photo by an efficient multi-model simulation optimization approach with big data techniques in the era of Industry 4.0. dynamic Photo configurator and abnormality detector are the two critical units in our proposed system framework; the former can make a quick decision to optimize the system configuration while receiving the adjustment request from the latter. The results from an empirical study show the practical viability of proposed approach that the capacity loss in Photo has been effectively improved.},\r\ndoi={10.1109/TSM.2017.2693259}\r\n}\r\n\r\n
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\n Photolithographic (Photo) plays a key role in semiconductor manufacturing because of its importance to advanced process shrinking. Even with a small improvement in its operational efficiency, the cost competitiveness in production can be enhanced as a result of the huge amount of share capital cost. However, it is difficult to stabilize the throughput rhythm of Fabs, while keeping a high equipment utilization for Photo. In the light of Industry 4.0 and big data, a huge potential of maintaining a desired system performance by (near) real-time dynamic system control is highly anticipated. But it also poses challenges to intelligently handling mass data acquisition and allocating computing resources. This research aims to maximize the equipment utilization in Photo by an efficient multi-model simulation optimization approach with big data techniques in the era of Industry 4.0. dynamic Photo configurator and abnormality detector are the two critical units in our proposed system framework; the former can make a quick decision to optimize the system configuration while receiving the adjustment request from the latter. The results from an empirical study show the practical viability of proposed approach that the capacity loss in Photo has been effectively improved.\n
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\n \n\n \n \n \n \n \n Optimal Parallel Machine Allocation Problem in IC Packaging Using IC-PSO: An Empirical Study.\n \n \n \n\n\n \n \n\n\n \n\n\n\n Asia-Pacific Journal of Operational Research, 34(6): 1750034. 2017.\n \n\n\n\n
\n\n\n\n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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\n \n\n \n \n \n \n \n Large-Scale Quantile-based Simulation Optimization Using Efficient Factor Screenings.\n \n \n \n\n\n \n Lu, Y.; Chang, K.; and Hsieh, L. Y.\n\n\n \n\n\n\n In 4th International Conference on Advances and Management Sciences, 2017. \n \n\n\n\n
\n\n\n\n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{Hsieh2017ICAMS,\r\n  title={Large-Scale Quantile-based Simulation Optimization Using Efficient Factor Screenings},\r\n  author={Ying-Hsuan Lu and Kuo-Hao Chang and Liam Y. Hsieh},\r\n  booktitle={4th International Conference on Advances and Management Sciences},\r\n  year={2017}\r\n}\r\n\r\n
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\n  \n 2016\n \n \n (4)\n \n \n
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\n \n\n \n \n \n \n \n Determination of Wafer Start Mix in Semiconductor Manufacturing During New Technology Ramp-Up: Model, Solution Method, and an Empirical Study.\n \n \n \n\n\n \n Chang, K.; and Hsieh, L. Y.\n\n\n \n\n\n\n IEEE Transactions on Systems, Man and Cybernetics: Systems, 46(2): 294-302. 2016.\n \n\n\n\n
\n\n\n\n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n  \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@article{Hsieh2016IEEESMC,\r\n  author = {Kuo-Hao Chang and Liam Y. Hsieh},\r\n  journal = {IEEE Transactions on Systems, Man and Cybernetics: Systems},\r\n  number = {2},\r\n  pages = {294-302},\r\n  title = {Determination of Wafer Start Mix in Semiconductor Manufacturing During New Technology Ramp-Up: Model, Solution Method, and an Empirical Study.},\r\n  doi = {10.1109/TSMC.2015.2426174},\r\n  volume = {46},\r\n  publisher={IEEE},\r\n  abstract={In semiconductor manufacturing, production ramp-up is a necessary phase before a new technology is introduced because it affects not only the time-to-market, but also the time-to-volume (the time to reach mass production). In production ramp-up, engineering lots are implemented in order to collect data for product and equipment qualification, and they are expected to achieve short cycle times (CTs) and high throughputs. On one hand, the increment of the amount of engineering lots will disrupt the smoothness of the manufacturing flow and cause work-in-process (WIP) bubbles. On the other hand, to ensure the feasibility of the production plan, some throughput and CT targets must be achieved. There is a need to determine an appropriate wafer start mix to strike a balance between the conflicting objectives. However, the complexity and stochasticity existing in the semiconductor manufacturing process makes it a very difficult task. This paper modeled the wafer start mix determination problem and proposed an efficient methodology, called progressive simulation optimization (PSO), based on the simulation metamodeling techniques to handle this problem. The goal was to find the optimal wafer start mix that enables maximum throughput of engineering lots, while satisfying the requirement of CT of normal lots (NL). A numerical study was conducted to evaluate the performance of the proposed PSO, and an empirical study based on real data was conducted to validate the viability of the proposed methodology in practice.},\r\n  year = {2016}\r\n}\r\n\r\n
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\n In semiconductor manufacturing, production ramp-up is a necessary phase before a new technology is introduced because it affects not only the time-to-market, but also the time-to-volume (the time to reach mass production). In production ramp-up, engineering lots are implemented in order to collect data for product and equipment qualification, and they are expected to achieve short cycle times (CTs) and high throughputs. On one hand, the increment of the amount of engineering lots will disrupt the smoothness of the manufacturing flow and cause work-in-process (WIP) bubbles. On the other hand, to ensure the feasibility of the production plan, some throughput and CT targets must be achieved. There is a need to determine an appropriate wafer start mix to strike a balance between the conflicting objectives. However, the complexity and stochasticity existing in the semiconductor manufacturing process makes it a very difficult task. This paper modeled the wafer start mix determination problem and proposed an efficient methodology, called progressive simulation optimization (PSO), based on the simulation metamodeling techniques to handle this problem. The goal was to find the optimal wafer start mix that enables maximum throughput of engineering lots, while satisfying the requirement of CT of normal lots (NL). A numerical study was conducted to evaluate the performance of the proposed PSO, and an empirical study based on real data was conducted to validate the viability of the proposed methodology in practice.\n
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\n \n\n \n \n \n \n \n Application of multi-fidelity simulation modelling to integrated circuit packaging.\n \n \n \n\n\n \n Hsieh, L. Y.; Huang, E.; Chen, C.; Zhang, S.; and Chang, K.\n\n\n \n\n\n\n International Journal of Simulation and Process Modelling, 11(3-4): 259-269. 2016.\n \n\n\n\n
\n\n\n\n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n  \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@article{Hsieh2016IJSPM,\r\n  title={Application of multi-fidelity simulation modelling to integrated circuit packaging},\r\n  author={Liam Y. Hsieh and Edward Huang and Chun-Hung Chen and Si Zhang and Kuo-Hao Chang},\r\n  journal={International Journal of Simulation and Process Modelling},\r\n  volume={11},\r\n  number={3-4},\r\n  pages={259-269},\r\n  year={2016},\r\n  doi={10.1504/IJSPM.2016.078525},\r\n  abstract={In semiconductor manufacturing, time-to-market is critical to maintain a competitive advantage through achieving customer satisfaction. Inefficient ways of utilising production resources will lead to a long cycle time. Therefore, machine allocation becomes an essential production decision in many practical manufacturing systems, especially for integrated circuit (IC) packaging. IC packaging is the process of encasing the finished die in a package in order to prevent corrosion and physical damage. Advanced IC packaging techniques add even more complexity into the production system, so reliable average cycle time of this complex system becomes difficult to obtain. We propose a new simulation optimisation framework with multi-fidelity models to study an IC packaging case of the machine allocation problem to pursue a minimum average cycle time. This framework consists of two methodologies: ordinal transformation (OT) and optimal sampling (OS). The OT first employs the low-fidelity model to fast observe all designs, and extracts insightful information from this model by transforming the original design space into an ordinal space. It follows that OS efficiently allocates the computing budget for searching the best design via high-fidelity simulations. An empirical study based on real data was conducted to validate the practical viability of the proposed framework.},\r\n  publisher={Inderscience Publishers (IEL)}\r\n}\r\n\r\n
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\n In semiconductor manufacturing, time-to-market is critical to maintain a competitive advantage through achieving customer satisfaction. Inefficient ways of utilising production resources will lead to a long cycle time. Therefore, machine allocation becomes an essential production decision in many practical manufacturing systems, especially for integrated circuit (IC) packaging. IC packaging is the process of encasing the finished die in a package in order to prevent corrosion and physical damage. Advanced IC packaging techniques add even more complexity into the production system, so reliable average cycle time of this complex system becomes difficult to obtain. We propose a new simulation optimisation framework with multi-fidelity models to study an IC packaging case of the machine allocation problem to pursue a minimum average cycle time. This framework consists of two methodologies: ordinal transformation (OT) and optimal sampling (OS). The OT first employs the low-fidelity model to fast observe all designs, and extracts insightful information from this model by transforming the original design space into an ordinal space. It follows that OS efficiently allocates the computing budget for searching the best design via high-fidelity simulations. An empirical study based on real data was conducted to validate the practical viability of the proposed framework.\n
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\n \n\n \n \n \n \n \n \n Simulation optimization in the era of Industrial 4.0 and the Industrial Internet.\n \n \n \n \n\n\n \n Xu, J.; Huang, E.; Hsieh, L.; Lee, L. H.; Jia, Q.; and Chen, C.\n\n\n \n\n\n\n Journal of Simulation, 10(4): 310-320. 2016.\n (best paper award)\n\n\n\n
\n\n\n\n \n \n \"SimulationPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n  \n \n abstract \n \n\n \n  \n \n 1 download\n \n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@article{Hsieh2016JOS,\r\n  title={Simulation optimization in the era of Industrial 4.0 and the Industrial Internet},\r\n  author={Jie Xu and Edward Huang and Liam Hsieh and Loo Hay Lee and Qing-Shan Jia and Chun-Hung Chen},\r\n  journal={Journal of Simulation},\r\n  volume={10},\r\n  number={4},\r\n  pages={310-320},\r\n  year={2016},\r\n  url={https://sites.google.com/site/liamhsieh/TocherMedal},\r\n  doi={10.1057/s41273-016-0037-6},\r\n  publisher={Palgrave Macmillan UK},\r\n  abstract={Simulation is an established tool for predicting and evaluating the performance of complex stochastic systems that are analytically intractable. Recent research in simulation optimization and explosive growth in computing power have made it feasible to use simulations to optimize the design and operations of systems directly. Concurrently, ubiquitous sensing, pervasive computing, and unprecedented systems interconnectivity have ushered in a new era of industrialization (the so-called Industrial 4.0/Industrial Internet). In this article, we argue that simulation optimization is a decision-making tool that can be applied to many scenarios to tremendous effect. By capitalizing on an unprecedented integration of sensing, computing, and control, simulation optimization provides the “smart brain” required to drastically improve the efficiency of industrial systems. We explore the potential of simulation optimization and discuss how simulation optimization can be applied, with an emphasis on the recent development of multi-fidelity/multi-scale simulation optimization.},\r\n  note ={(best paper award)}\r\n}\r\n\r\n
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\n Simulation is an established tool for predicting and evaluating the performance of complex stochastic systems that are analytically intractable. Recent research in simulation optimization and explosive growth in computing power have made it feasible to use simulations to optimize the design and operations of systems directly. Concurrently, ubiquitous sensing, pervasive computing, and unprecedented systems interconnectivity have ushered in a new era of industrialization (the so-called Industrial 4.0/Industrial Internet). In this article, we argue that simulation optimization is a decision-making tool that can be applied to many scenarios to tremendous effect. By capitalizing on an unprecedented integration of sensing, computing, and control, simulation optimization provides the “smart brain” required to drastically improve the efficiency of industrial systems. We explore the potential of simulation optimization and discuss how simulation optimization can be applied, with an emphasis on the recent development of multi-fidelity/multi-scale simulation optimization.\n
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\n \n\n \n \n \n \n \n Factor Screening Method for Quantile-based Performance Measure.\n \n \n \n\n\n \n Lu, Y.; Chang, K.; and Hsieh, L. Y.\n\n\n \n\n\n\n In Asia Pacific Industrial Engineering & Management Conference 2016, 2016. \n \n\n\n\n
\n\n\n\n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n  \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{Hsieh2016APIEMS,\r\n  title={Factor Screening Method for Quantile-based Performance Measure},\r\n  author={Ying-Hsuan Lu and Kuo-Hao Chang and Liam Y. Hsieh},\r\n  booktitle={Asia Pacific Industrial Engineering \\& Management Conference 2016},\r\n  abstract={Screening experiments are often used to identify the important factors affecting intended systems' response significantly. In the literature, factor screening approaches mostly adopted expectation as performance measures for stochastic simulation experiments. Nevertheless, even though a few alternatives were known to offer insightful perspectives for a more complete view of the statistical landscape, they were rarely discussed due to technical difficulties of developing methodologies. Quantile is an important alternative to the expectation for spatial data and applications of risk control, however, unlike the expectation, quantile lacks nice distributional properties so developing quantile-based applications would be a challenge. In this study, we propose a novel approach of factor screening for quantile-based performance measure. The proposed method is able to address large-scale problems based on statistical inference. Both Type I error and Power are considered to handle the risk with given conditions. A numerical study was conducted to evaluate the performance of the proposed methodology, and an empirical problem based on real data was solved to validate its practical viability.},\r\n  year={2016}\r\n}\r\n\r\n
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\n Screening experiments are often used to identify the important factors affecting intended systems' response significantly. In the literature, factor screening approaches mostly adopted expectation as performance measures for stochastic simulation experiments. Nevertheless, even though a few alternatives were known to offer insightful perspectives for a more complete view of the statistical landscape, they were rarely discussed due to technical difficulties of developing methodologies. Quantile is an important alternative to the expectation for spatial data and applications of risk control, however, unlike the expectation, quantile lacks nice distributional properties so developing quantile-based applications would be a challenge. In this study, we propose a novel approach of factor screening for quantile-based performance measure. The proposed method is able to address large-scale problems based on statistical inference. Both Type I error and Power are considered to handle the risk with given conditions. A numerical study was conducted to evaluate the performance of the proposed methodology, and an empirical problem based on real data was solved to validate its practical viability.\n
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\n  \n 2015\n \n \n (2)\n \n \n
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\n \n\n \n \n \n \n \n Solving an Order Promising and Scheduling Problem in Semiconductor Back-end Testing by Fuzzy Optimization and Genetic Algorithm.\n \n \n \n\n\n \n Hsieh, L. Y.; and Cheng, C.\n\n\n \n\n\n\n In 2015 International Symposium on Semiconductor Manufacturing Intelligence (ISMI2015), 2015. \n \n\n\n\n
\n\n\n\n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n  \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{Hsieh2015ISMI,\r\n  title={Solving an Order Promising and Scheduling Problem in Semiconductor Back-end Testing by Fuzzy\r\n  Optimization and Genetic Algorithm},\r\n  author={Liam Y. Hsieh and Chi-Bin Cheng},\r\n  abstract={A huge competition in the semiconductor market is in back-end testing and assembling. Recently, the requests from customers change frequently that lead to operation management becoming even harder. As a trade-off of capacity allocation, taking both order promising and production scheduling into account is not an easy task. In this study, an order promising and scheduling problem in semiconductor back-end testing is discussed and solved. The proposed methodology combines fuzzy optimization and a genetic algorithm to address this problem. A case example is conducted to validate the feasibility of the proposed method in a real setting, and to demonstrate how this method works.},\r\n  booktitle={2015 International Symposium on Semiconductor Manufacturing Intelligence (ISMI2015)},\r\n  year={2015}\r\n}\r\n\r\n
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\n A huge competition in the semiconductor market is in back-end testing and assembling. Recently, the requests from customers change frequently that lead to operation management becoming even harder. As a trade-off of capacity allocation, taking both order promising and production scheduling into account is not an easy task. In this study, an order promising and scheduling problem in semiconductor back-end testing is discussed and solved. The proposed methodology combines fuzzy optimization and a genetic algorithm to address this problem. A case example is conducted to validate the feasibility of the proposed method in a real setting, and to demonstrate how this method works.\n
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\n \n\n \n \n \n \n \n Optimal Parallel Machine Allocation in Integrated Circuit Assembly.\n \n \n \n\n\n \n Kao, W.; Hsieh, L. Y.; and Chang, K.\n\n\n \n\n\n\n In Proceedings of the Asia Pacific Industrial Engineering & Management Conference 2015 (APIEMS2015), 2015. \n \n\n\n\n
\n\n\n\n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{Hsieh2015APIEMS,\r\n  title={Optimal Parallel Machine Allocation in Integrated Circuit Assembly},\r\n  author={Wan-Ting Kao and Liam Y. Hsieh and Kuo-Hao Chang},\r\n  booktitle={Proceedings of the Asia Pacific Industrial Engineering \\& Management Conference 2015\r\n  (APIEMS2015)},\r\n  year={2015}\r\n}\r\n\r\n
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\n  \n 2014\n \n \n (3)\n \n \n
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\n \n\n \n \n \n \n \n Efficient development of cycle time response surfaces using progressive simulation metamodeling.\n \n \n \n\n\n \n Hsieh, L. Y.; Chang, K.; and Chien, C.\n\n\n \n\n\n\n International Journal of Production Research, 52(10): 3097-3109. 2014.\n \n\n\n\n
\n\n\n\n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n  \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@article{Hsieh2014IJPR,\r\n  title={Efficient development of cycle time response surfaces using progressive simulation\r\n  metamodeling},\r\n  author={Liam Y. Hsieh and Kuo-Hao Chang and Chen-Fu Chien},\r\n  journal={International Journal of Production Research},\r\n  volume={52},\r\n  number={10},\r\n  pages={3097-3109},\r\n  year={2014},\r\n  abstract={In semiconductor manufacturing, hot lots are to provide marketing and engineering with extra flexibility regarding delivery lead times, and in turn enhance its competitive advantages against other companies. On the other hand, hot lots are among major sources of disruption of the smoothness of the manufacturing flow. They can lead to a significant increase of cycle time of normal lots, and in turn result in delayed delivery times and serious service deteriorations. Due to the complex nature of semiconductor manufacturing, evaluating the impact of hot lots on the cycle time of normal lots presents major challenges. In this paper, we propose a methodology, called progressive simulation metamodelling (PSM), that allows for an efficient development of the response surface between the cycle time of normal lots and the percentage of hot lots in semiconductor manufacturing. The response surface generated by the proposed PSM is like an easy-to-use analytical model, but with the fidelity of simulation that takes into account all important manufacturing details. The specially-designed mechanisms, including identifying the critical region and sequentially adding design points in the critical region, further grants PSM computational advantages compared to the traditional response surface method. An empirical study conducted in collaboration with a semiconductor company validates the viability of PSM in real settings.},\r\n  doi={10.1080/00207543.2013.864055},\r\n  publisher={Taylor \\& Francis}\r\n}\r\n\r\n
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\n In semiconductor manufacturing, hot lots are to provide marketing and engineering with extra flexibility regarding delivery lead times, and in turn enhance its competitive advantages against other companies. On the other hand, hot lots are among major sources of disruption of the smoothness of the manufacturing flow. They can lead to a significant increase of cycle time of normal lots, and in turn result in delayed delivery times and serious service deteriorations. Due to the complex nature of semiconductor manufacturing, evaluating the impact of hot lots on the cycle time of normal lots presents major challenges. In this paper, we propose a methodology, called progressive simulation metamodelling (PSM), that allows for an efficient development of the response surface between the cycle time of normal lots and the percentage of hot lots in semiconductor manufacturing. The response surface generated by the proposed PSM is like an easy-to-use analytical model, but with the fidelity of simulation that takes into account all important manufacturing details. The specially-designed mechanisms, including identifying the critical region and sequentially adding design points in the critical region, further grants PSM computational advantages compared to the traditional response surface method. An empirical study conducted in collaboration with a semiconductor company validates the viability of PSM in real settings.\n
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\n \n\n \n \n \n \n \n Determining the Optimal Wafer Start Rate in Semiconductor Manufacturing during New Technology Ramp-up.\n \n \n \n\n\n \n Hsieh, L. Y.; and Chang, K.\n\n\n \n\n\n\n In The 15th Asia Pacific Industrial Engineering and Management Systems conference, Jeju, Korea, 2014. \n \n\n\n\n
\n\n\n\n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{Hsieh2014APIEMS,\r\n  title={Determining the Optimal Wafer Start Rate in Semiconductor Manufacturing during New Technology\r\n  Ramp-up},\r\n  author={Liam Y. Hsieh and Kuo-Hao Chang},\r\n  booktitle={The 15th Asia Pacific Industrial Engineering and Management Systems conference, Jeju,\r\n  Korea},\r\n  year={2014}\r\n}\r\n\r\n
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\n \n\n \n \n \n \n \n A Web-based Capacity Planning System for a Semiconductor Wafer Fabrication: Design and Implementation.\n \n \n \n\n\n \n Hsieh, L. Y.; Chang, K.; and Chien, C.\n\n\n \n\n\n\n In 2014 International Symposium on Semiconductor Manufacturing Intelligence (ISMI2014), 2014. \n \n\n\n\n
\n\n\n\n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n  \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{Hsieh2014ISMI,\r\n  title={A Web-based Capacity Planning System for a Semiconductor Wafer Fabrication: Design and\r\n  Implementation},\r\n  author={Liam Y. Hsieh and Kuo-Hao Chang and Chen-Fu Chien},\r\n  abstract={Capacity planning plays a key role of operations management in semiconductor manufacturing. In this article, we study long-term strategy planning for investment decisions and mid-term resource allocation planning for capacity allocation decisions. Multi-objective optimization is considered for designing a computer planning system to address these decisions, and the system architecture of the web-based capacity planning is developed. This system design has been successfully implemented for a semiconductor wafer fabrication in China.},\r\n  booktitle={2014 International Symposium on Semiconductor Manufacturing Intelligence (ISMI2014)},\r\n  year={2014}\r\n}\r\n\r\n
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\n Capacity planning plays a key role of operations management in semiconductor manufacturing. In this article, we study long-term strategy planning for investment decisions and mid-term resource allocation planning for capacity allocation decisions. Multi-objective optimization is considered for designing a computer planning system to address these decisions, and the system architecture of the web-based capacity planning is developed. This system design has been successfully implemented for a semiconductor wafer fabrication in China.\n
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\n  \n 2013\n \n \n (2)\n \n \n
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\n \n\n \n \n \n \n \n Yield improvement on in-mold decoration manufacturing through parameter optimization.\n \n \n \n\n\n \n Hsieh, L. Y.; and Chang, K.\n\n\n \n\n\n\n International Journal of Precision Engineering and Manufacturing, 14(10): 1823-1828. 2013.\n \n\n\n\n
\n\n\n\n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n  \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@article{Hsieh2013IJPEM,\r\n  title={Yield improvement on in-mold decoration manufacturing through parameter optimization},\r\n  author={Liam Y. Hsieh and Kuo-Hao Chang},\r\n  journal={International Journal of Precision Engineering and Manufacturing},\r\n  volume={14},\r\n  number={10},\r\n  pages={1823-1828},\r\n  doi={10.1007/s12541-013-0244-2},\r\n  abstract={In-Mold Decoration (IMD) is an efficient, durable and cost effective technique for printing, painting, and forming plastic decorations. However, a large number of parameters involved in IMD manufacturing process and the complex relationship between these parameters make the determination of the optimal parameter setting a challenging task. This paper proposes a systematic framework integrating Response Surface Methodology (RSM) and logistic regression to improve the yield of IMD manufacturing process. The integrated framework becomes easy to identify the optimal parameter setting, saving a great deal of time and money in the manufacturing process. On the empirical study in collaboration with IMD company, the proposed framework shows the significant result from 10\\% to 87.5\\%, validating the viability of the proposed framework in real settings.},\r\n  year={2013},\r\n  publisher={Springer}\r\n}\r\n\r\n
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\n In-Mold Decoration (IMD) is an efficient, durable and cost effective technique for printing, painting, and forming plastic decorations. However, a large number of parameters involved in IMD manufacturing process and the complex relationship between these parameters make the determination of the optimal parameter setting a challenging task. This paper proposes a systematic framework integrating Response Surface Methodology (RSM) and logistic regression to improve the yield of IMD manufacturing process. The integrated framework becomes easy to identify the optimal parameter setting, saving a great deal of time and money in the manufacturing process. On the empirical study in collaboration with IMD company, the proposed framework shows the significant result from 10% to 87.5%, validating the viability of the proposed framework in real settings.\n
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\n \n\n \n \n \n \n \n Determining Optimal Hot Lot Percentage in Semiconductor Wafer Fabrication.\n \n \n \n\n\n \n Hsieh, L. Y.; Chang, K.; and Chien, C.\n\n\n \n\n\n\n In Proceedings of 9th International Conference on Intelligent Manufacturing and Logistics Systems & 2013 International Symposium on Semiconductor Manufacturing Intelligence (IML2013&ISMI2013), 2013. \n \n\n\n\n
\n\n\n\n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{Hsieh2013ISMI,\r\n  title={Determining Optimal Hot Lot Percentage in Semiconductor Wafer Fabrication},\r\n  author={Liam Y. Hsieh and Kuo-Hao Chang and Chen-Fu Chien},\r\n  booktitle={Proceedings of 9th International Conference on Intelligent Manufacturing and Logistics\r\n  Systems \\& 2013 International Symposium on Semiconductor Manufacturing Intelligence\r\n  (IML2013\\&ISMI2013)},\r\n  year={2013}\r\n}\r\n\r\n
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\n  \n 2012\n \n \n (1)\n \n \n
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\n \n\n \n \n \n \n \n An Effective Scheduling and Dispatching Approach for Cycle Time Reduction in Semiconductor Manufacturing.\n \n \n \n\n\n \n Hsieh, L. Y.; Chang, K.; Chien, C.; and Yen, L.\n\n\n \n\n\n\n In International Conference on Innovative Design and Manufacturing 2012 (ICIDM 2012), 2012. \n \n\n\n\n
\n\n\n\n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n  \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{Hsieh2012ICIDM,\r\n  title={An Effective Scheduling and Dispatching Approach for Cycle Time Reduction in Semiconductor\r\n  Manufacturing},\r\n  abstract={In semiconductor manufacturing, Photolithography is one of the most influential stations to the overall product cycle time. In this paper, we propose an effective scheduling and dispatching (S&D) approach to improve the production efficiency in Photolithography. An empirical study was conducted to demonstrate the effectiveness of proposed S&D method. Results showed that the cycle time in Photolithography is significantly improved due to the proposed S&D approach. Compared to the current practice, the proposed S\\&D approach can reduce the mean cycle time by 7\\% and 10\\%},\r\n  author={Liam Y. Hsieh and Kuo-Hao Chang and Chen-Fu Chien and Li-Yuan Yen},\r\n  booktitle={International Conference on Innovative Design and Manufacturing 2012 (ICIDM 2012)},\r\n  year={2012}\r\n}\r\n\r\n
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\n In semiconductor manufacturing, Photolithography is one of the most influential stations to the overall product cycle time. In this paper, we propose an effective scheduling and dispatching (S&D) approach to improve the production efficiency in Photolithography. An empirical study was conducted to demonstrate the effectiveness of proposed S&D method. Results showed that the cycle time in Photolithography is significantly improved due to the proposed S&D approach. Compared to the current practice, the proposed S&D approach can reduce the mean cycle time by 7% and 10%\n
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\n  \n 2007\n \n \n (1)\n \n \n
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\n \n\n \n \n \n \n \n Performance Enhancement of Bayesian Learning: An Application involving the Bargaining Agent of an Online Bookstore.\n \n \n \n\n\n \n Cheng, C.; Chan, C. H.; and Hsieh, Y.\n\n\n \n\n\n\n Journal of the Chinese Institute of Industrial Engineers, 24(5): 388-396. 2007.\n \n\n\n\n
\n\n\n\n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n  \n \n abstract \n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@article{Hsieh2007JCIIE,\r\n  title={Performance Enhancement of Bayesian Learning: An Application involving the Bargaining Agent\r\n  of an Online Bookstore},\r\n  author={Chi-Bin Cheng and C-C Henry Chan and Yueh-Feng Hsieh},\r\n  journal={Journal of the Chinese Institute of Industrial Engineers},\r\n  volume={24},\r\n  number={5},\r\n  pages={388-396},\r\n  doi={10.1080/10170660709509054},\r\n  year={2007},\r\n  abstract={E-commerce agents with Bayesian learning were first proposed by Zeng and Sycara in their Bazaar automated bargaining system [18]. Many studies have directly applied or extended Bazaar to agent learning. In Bayesian learning, it is critical to construct the conditional probabilities for new events in order to obtain an accurate estimation of the posterior probability. The construction of such conditional probabilities requires domain knowledge of the target problem and an appropriate translation of this knowledge into a corresponding set of conditional probabilities. Unfortunately, such issues have either been ignored or over-simplified in previous studies. Accordingly, the present study aims to enhance the performance of Bayesian learning by developing a new formulation for the conditional probabilities during the learning process. An online used-textbook store is built and used as the basis for a series of experiments to evaluate the performance of the proposed approach. The experimental results demonstrate that the prediction accuracy of Bayesian learning using the proposed conditional probability formulation is superior to that of a previous approach that uses a simpler formulation of conditional probabilities.},\r\n  publisher={Taylor \\& Francis Group}\r\n}\r\n
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\n E-commerce agents with Bayesian learning were first proposed by Zeng and Sycara in their Bazaar automated bargaining system [18]. Many studies have directly applied or extended Bazaar to agent learning. In Bayesian learning, it is critical to construct the conditional probabilities for new events in order to obtain an accurate estimation of the posterior probability. The construction of such conditional probabilities requires domain knowledge of the target problem and an appropriate translation of this knowledge into a corresponding set of conditional probabilities. Unfortunately, such issues have either been ignored or over-simplified in previous studies. Accordingly, the present study aims to enhance the performance of Bayesian learning by developing a new formulation for the conditional probabilities during the learning process. An online used-textbook store is built and used as the basis for a series of experiments to evaluate the performance of the proposed approach. The experimental results demonstrate that the prediction accuracy of Bayesian learning using the proposed conditional probability formulation is superior to that of a previous approach that uses a simpler formulation of conditional probabilities.\n
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