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\n \n \n Fix it now\n

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\n  \n 2022\n \n \n (2)\n \n \n
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\n \n\n \n \n \n \n \n \n Stacked Ensemble Models Evaluation on DL Based SCA.\n \n \n \n \n\n\n \n Hoang, A.; Hanley, N.; Khalid, A.; Kundi, D.; and O'Neill, M.\n\n\n \n\n\n\n In van Sinderen, M.; Wijnhoven, F.; Hammoudi, S.; Samarati, P.; and di Vimercati, S. D. C., editor(s), E-Business and Telecommunications - 19th International Conference, ICSBT 2022, Lisbon, Portugal, July 14-16, 2022, and 19th International Conference, SECRYPT 2022, Lisbon, Portugal, July 11-13, 2022, Revised Selected Papers, volume 1849, of Communications in Computer and Information Science, pages 43–68, 2022. Springer\n \n\n\n\n
\n\n\n\n \n \n \"StackedPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/icsbt/HoangHKKO22,\n  author       = {Anh{-}Tuan Hoang and\n                  Neil Hanley and\n                  Ayesha Khalid and\n                  Dur{-}e{-}Shahwar Kundi and\n                  M{\\'{a}}ire O'Neill},\n  editor       = {Marten van Sinderen and\n                  Fons Wijnhoven and\n                  Slimane Hammoudi and\n                  Pierangela Samarati and\n                  Sabrina De Capitani di Vimercati},\n  title        = {Stacked Ensemble Models Evaluation on {DL} Based {SCA}},\n  booktitle    = {E-Business and Telecommunications - 19th International Conference,\n                  {ICSBT} 2022, Lisbon, Portugal, July 14-16, 2022, and 19th International\n                  Conference, {SECRYPT} 2022, Lisbon, Portugal, July 11-13, 2022, Revised\n                  Selected Papers},\n  series       = {Communications in Computer and Information Science},\n  volume       = {1849},\n  pages        = {43--68},\n  publisher    = {Springer},\n  year         = {2022},\n  url          = {https://doi.org/10.1007/978-3-031-45137-9\\_3},\n  doi          = {10.1007/978-3-031-45137-9\\_3},\n  timestamp    = {Wed, 31 Jan 2024 07:42:55 +0100},\n  biburl       = {https://dblp.org/rec/conf/icsbt/HoangHKKO22.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n Stacked Ensemble Model for Enhancing the DL based SCA.\n \n \n \n \n\n\n \n Hoang, A.; Hanley, N.; Khalid, A.; Kundi, D.; and O'Neill, M.\n\n\n \n\n\n\n In di Vimercati, S. D. C.; and Samarati, P., editor(s), Proceedings of the 19th International Conference on Security and Cryptography, SECRYPT 2022, Lisbon, Portugal, July 11-13, 2022, pages 59–68, 2022. SCITEPRESS\n \n\n\n\n
\n\n\n\n \n \n \"StackedPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/secrypt/HoangHKKO22,\n  author       = {Anh{-}Tuan Hoang and\n                  Neil Hanley and\n                  Ayesha Khalid and\n                  Dur{-}e{-}Shahwar Kundi and\n                  M{\\'{a}}ire O'Neill},\n  editor       = {Sabrina De Capitani di Vimercati and\n                  Pierangela Samarati},\n  title        = {Stacked Ensemble Model for Enhancing the {DL} based {SCA}},\n  booktitle    = {Proceedings of the 19th International Conference on Security and Cryptography,\n                  {SECRYPT} 2022, Lisbon, Portugal, July 11-13, 2022},\n  pages        = {59--68},\n  publisher    = {{SCITEPRESS}},\n  year         = {2022},\n  url          = {https://doi.org/10.5220/0011139700003283},\n  doi          = {10.5220/0011139700003283},\n  timestamp    = {Tue, 06 Jun 2023 14:58:01 +0200},\n  biburl       = {https://dblp.org/rec/conf/secrypt/HoangHKKO22.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n  \n 2021\n \n \n (3)\n \n \n
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\n \n\n \n \n \n \n \n \n A large-scale comprehensive evaluation of single-slice ring oscillator and PicoPUF bit cells on 28-nm Xilinx FPGAs.\n \n \n \n \n\n\n \n Gu, C.; Chang, C.; Liu, W.; Hanley, N.; Miskelly, J.; and O'Neill, M.\n\n\n \n\n\n\n J. Cryptogr. Eng., 11(3): 227–238. 2021.\n \n\n\n\n
\n\n\n\n \n \n \"APaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@article{DBLP:journals/jce/GuCLHMO21,\n  author       = {Chongyan Gu and\n                  Chip{-}Hong Chang and\n                  Weiqiang Liu and\n                  Neil Hanley and\n                  Jack Miskelly and\n                  M{\\'{a}}ire O'Neill},\n  title        = {A large-scale comprehensive evaluation of single-slice ring oscillator\n                  and PicoPUF bit cells on 28-nm Xilinx FPGAs},\n  journal      = {J. Cryptogr. Eng.},\n  volume       = {11},\n  number       = {3},\n  pages        = {227--238},\n  year         = {2021},\n  url          = {https://doi.org/10.1007/s13389-020-00244-5},\n  doi          = {10.1007/S13389-020-00244-5},\n  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},\n  biburl       = {https://dblp.org/rec/journals/jce/GuCLHMO21.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n SCA secure and updatable crypto engines for FPGA SoC bitstream decryption: extended version.\n \n \n \n \n\n\n \n Unterstein, F.; Jacob, N.; Hanley, N.; Gu, C.; and Heyszl, J.\n\n\n \n\n\n\n J. Cryptogr. Eng., 11(3): 257–272. 2021.\n \n\n\n\n
\n\n\n\n \n \n \"SCAPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@article{DBLP:journals/jce/UntersteinJHGH21,\n  author       = {Florian Unterstein and\n                  Nisha Jacob and\n                  Neil Hanley and\n                  Chongyan Gu and\n                  Johann Heyszl},\n  title        = {{SCA} secure and updatable crypto engines for {FPGA} SoC bitstream\n                  decryption: extended version},\n  journal      = {J. Cryptogr. Eng.},\n  volume       = {11},\n  number       = {3},\n  pages        = {257--272},\n  year         = {2021},\n  url          = {https://doi.org/10.1007/s13389-020-00247-2},\n  doi          = {10.1007/S13389-020-00247-2},\n  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},\n  biburl       = {https://dblp.org/rec/journals/jce/UntersteinJHGH21.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n A Flip-Flop Based Arbiter Physical Unclonable Function (APUF) Design with High Entropy and Uniqueness for FPGA Implementation.\n \n \n \n \n\n\n \n Gu, C.; Liu, W.; Cui, Y.; Hanley, N.; O'Neill, M.; and Lombardi, F.\n\n\n \n\n\n\n IEEE Trans. Emerg. Top. Comput., 9(4): 1853–1866. 2021.\n \n\n\n\n
\n\n\n\n \n \n \"APaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@article{DBLP:journals/tetc/GuLCHOL21,\n  author       = {Chongyan Gu and\n                  Weiqiang Liu and\n                  Yijun Cui and\n                  Neil Hanley and\n                  M{\\'{a}}ire O'Neill and\n                  Fabrizio Lombardi},\n  title        = {A Flip-Flop Based Arbiter Physical Unclonable Function {(APUF)} Design\n                  with High Entropy and Uniqueness for {FPGA} Implementation},\n  journal      = {{IEEE} Trans. Emerg. Top. Comput.},\n  volume       = {9},\n  number       = {4},\n  pages        = {1853--1866},\n  year         = {2021},\n  url          = {https://doi.org/10.1109/TETC.2019.2935465},\n  doi          = {10.1109/TETC.2019.2935465},\n  timestamp    = {Wed, 22 Feb 2023 00:00:00 +0100},\n  biburl       = {https://dblp.org/rec/journals/tetc/GuLCHOL21.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n  \n 2020\n \n \n (1)\n \n \n
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\n \n\n \n \n \n \n \n \n Plaintext: A Missing Feature for Enhancing the Power of Deep Learning in Side-Channel Analysis? Breaking multiple layers of side-channel countermeasures.\n \n \n \n \n\n\n \n Hoang, A.; Hanley, N.; and O'Neill, M.\n\n\n \n\n\n\n IACR Trans. Cryptogr. Hardw. Embed. Syst., 2020(4): 49–85. 2020.\n \n\n\n\n
\n\n\n\n \n \n \"Plaintext:Paper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@article{DBLP:journals/tches/HoangHO20,\n  author       = {Anh{-}Tuan Hoang and\n                  Neil Hanley and\n                  M{\\'{a}}ire O'Neill},\n  title        = {Plaintext: {A} Missing Feature for Enhancing the Power of Deep Learning\n                  in Side-Channel Analysis? Breaking multiple layers of side-channel\n                  countermeasures},\n  journal      = {{IACR} Trans. Cryptogr. Hardw. Embed. Syst.},\n  volume       = {2020},\n  number       = {4},\n  pages        = {49--85},\n  year         = {2020},\n  url          = {https://doi.org/10.13154/tches.v2020.i4.49-85},\n  doi          = {10.13154/TCHES.V2020.I4.49-85},\n  timestamp    = {Wed, 02 Sep 2020 01:00:00 +0200},\n  biburl       = {https://dblp.org/rec/journals/tches/HoangHO20.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n  \n 2019\n \n \n (3)\n \n \n
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\n \n\n \n \n \n \n \n \n A Theoretical Model to Link Uniqueness and Min-Entropy for PUF Evaluations.\n \n \n \n \n\n\n \n Gu, C.; Liu, W.; Hanley, N.; Hesselbarth, R.; and O'Neill, M.\n\n\n \n\n\n\n IEEE Trans. Computers, 68(2): 287–293. 2019.\n \n\n\n\n
\n\n\n\n \n \n \"APaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@article{DBLP:journals/tc/GuLHHO19,\n  author       = {Chongyan Gu and\n                  Weiqiang Liu and\n                  Neil Hanley and\n                  Robert Hesselbarth and\n                  M{\\'{a}}ire O'Neill},\n  title        = {A Theoretical Model to Link Uniqueness and Min-Entropy for {PUF} Evaluations},\n  journal      = {{IEEE} Trans. Computers},\n  volume       = {68},\n  number       = {2},\n  pages        = {287--293},\n  year         = {2019},\n  url          = {https://doi.org/10.1109/TC.2018.2866241},\n  doi          = {10.1109/TC.2018.2866241},\n  timestamp    = {Wed, 22 Feb 2023 00:00:00 +0100},\n  biburl       = {https://dblp.org/rec/journals/tc/GuLHHO19.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n SCA Secure and Updatable Crypto Engines for FPGA SoC Bitstream Decryption.\n \n \n \n \n\n\n \n Unterstein, F.; Jacob, N.; Hanley, N.; Gu, C.; and Heyszl, J.\n\n\n \n\n\n\n In Chang, C.; Rührmair, U.; Holcomb, D. E.; and Schaumont, P., editor(s), Proceedings of the 3rd ACM Workshop on Attacks and Solutions in Hardware Security Workshop, ASHES@CCS 2019, London, UK, November 15, 2019, pages 43–53, 2019. ACM\n \n\n\n\n
\n\n\n\n \n \n \"SCAPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/ccs/UntersteinJHGH19,\n  author       = {Florian Unterstein and\n                  Nisha Jacob and\n                  Neil Hanley and\n                  Chongyan Gu and\n                  Johann Heyszl},\n  editor       = {Chip{-}Hong Chang and\n                  Ulrich R{\\"{u}}hrmair and\n                  Daniel E. Holcomb and\n                  Patrick Schaumont},\n  title        = {{SCA} Secure and Updatable Crypto Engines for {FPGA} SoC Bitstream\n                  Decryption},\n  booktitle    = {Proceedings of the 3rd {ACM} Workshop on Attacks and Solutions in\n                  Hardware Security Workshop, ASHES@CCS 2019, London, UK, November 15,\n                  2019},\n  pages        = {43--53},\n  publisher    = {{ACM}},\n  year         = {2019},\n  url          = {https://doi.org/10.1145/3338508.3359573},\n  doi          = {10.1145/3338508.3359573},\n  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},\n  biburl       = {https://dblp.org/rec/conf/ccs/UntersteinJHGH19.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n A Large Scale Comprehensive Evaluation of Single-Slice Ring Oscillator and PicoPUF Bit Cells on 28nm Xilinx FPGAs.\n \n \n \n \n\n\n \n Gu, C.; Chang, C.; Liu, W.; Hanley, N.; Miskelly, J.; and O'Neill, M.\n\n\n \n\n\n\n In Chang, C.; Rührmair, U.; Holcomb, D. E.; and Schaumont, P., editor(s), Proceedings of the 3rd ACM Workshop on Attacks and Solutions in Hardware Security Workshop, ASHES@CCS 2019, London, UK, November 15, 2019, pages 101–106, 2019. ACM\n \n\n\n\n
\n\n\n\n \n \n \"APaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/ccs/GuCLHMO19,\n  author       = {Chongyan Gu and\n                  Chip{-}Hong Chang and\n                  Weiqiang Liu and\n                  Neil Hanley and\n                  Jack Miskelly and\n                  M{\\'{a}}ire O'Neill},\n  editor       = {Chip{-}Hong Chang and\n                  Ulrich R{\\"{u}}hrmair and\n                  Daniel E. Holcomb and\n                  Patrick Schaumont},\n  title        = {A Large Scale Comprehensive Evaluation of Single-Slice Ring Oscillator\n                  and PicoPUF Bit Cells on 28nm Xilinx FPGAs},\n  booktitle    = {Proceedings of the 3rd {ACM} Workshop on Attacks and Solutions in\n                  Hardware Security Workshop, ASHES@CCS 2019, London, UK, November 15,\n                  2019},\n  pages        = {101--106},\n  publisher    = {{ACM}},\n  year         = {2019},\n  url          = {https://doi.org/10.1145/3338508.3359570},\n  doi          = {10.1145/3338508.3359570},\n  timestamp    = {Wed, 22 Feb 2023 00:00:00 +0100},\n  biburl       = {https://dblp.org/rec/conf/ccs/GuCLHMO19.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n  \n 2018\n \n \n (2)\n \n \n
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\n \n\n \n \n \n \n \n \n A machine learning attack resistant multi-PUF design on FPGA.\n \n \n \n \n\n\n \n Ma, Q.; Gu, C.; Hanley, N.; Wang, C.; Liu, W.; and O'Neill, M.\n\n\n \n\n\n\n In Shin, Y., editor(s), 23rd Asia and South Pacific Design Automation Conference, ASP-DAC 2018, Jeju, Korea (South), January 22-25, 2018, pages 97–104, 2018. IEEE\n \n\n\n\n
\n\n\n\n \n \n \"APaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/aspdac/MaGHWLO18,\n  author       = {Qingqing Ma and\n                  Chongyan Gu and\n                  Neil Hanley and\n                  Chenghua Wang and\n                  Weiqiang Liu and\n                  M{\\'{a}}ire O'Neill},\n  editor       = {Youngsoo Shin},\n  title        = {A machine learning attack resistant multi-PUF design on {FPGA}},\n  booktitle    = {23rd Asia and South Pacific Design Automation Conference, {ASP-DAC}\n                  2018, Jeju, Korea (South), January 22-25, 2018},\n  pages        = {97--104},\n  publisher    = {{IEEE}},\n  year         = {2018},\n  url          = {https://doi.org/10.1109/ASPDAC.2018.8297289},\n  doi          = {10.1109/ASPDAC.2018.8297289},\n  timestamp    = {Wed, 22 Feb 2023 00:00:00 +0100},\n  biburl       = {https://dblp.org/rec/conf/aspdac/MaGHWLO18.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n Large scale RO PUF analysis over slice type, evaluation time and temperature on 28nm Xilinx FPGAs.\n \n \n \n \n\n\n \n Hesselbarth, R.; Wilde, F.; Gu, C.; and Hanley, N.\n\n\n \n\n\n\n In 2018 IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2018, Washington, DC, USA, April 30 - May 4, 2018, pages 126–133, 2018. IEEE Computer Society\n \n\n\n\n
\n\n\n\n \n \n \"LargePaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
\n
@inproceedings{DBLP:conf/host/HesselbarthWGH18,\n  author       = {Robert Hesselbarth and\n                  Florian Wilde and\n                  Chongyan Gu and\n                  Neil Hanley},\n  title        = {Large scale {RO} {PUF} analysis over slice type, evaluation time and\n                  temperature on 28nm Xilinx FPGAs},\n  booktitle    = {2018 {IEEE} International Symposium on Hardware Oriented Security\n                  and Trust, {HOST} 2018, Washington, DC, USA, April 30 - May 4, 2018},\n  pages        = {126--133},\n  publisher    = {{IEEE} Computer Society},\n  year         = {2018},\n  url          = {https://doi.org/10.1109/HST.2018.8383900},\n  doi          = {10.1109/HST.2018.8383900},\n  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},\n  biburl       = {https://dblp.org/rec/conf/host/HesselbarthWGH18.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n  \n 2017\n \n \n (3)\n \n \n
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\n \n\n \n \n \n \n \n \n Evaluation of Large Integer Multiplication Methods on Hardware.\n \n \n \n \n\n\n \n Rafferty, C.; McLoone, M.; and Hanley, N.\n\n\n \n\n\n\n IEEE Trans. Computers, 66(8): 1369–1382. 2017.\n \n\n\n\n
\n\n\n\n \n \n \"EvaluationPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
\n
@article{DBLP:journals/tc/RaffertyMH17,\n  author       = {Ciara Rafferty and\n                  M{\\'{a}}ire McLoone and\n                  Neil Hanley},\n  title        = {Evaluation of Large Integer Multiplication Methods on Hardware},\n  journal      = {{IEEE} Trans. Computers},\n  volume       = {66},\n  number       = {8},\n  pages        = {1369--1382},\n  year         = {2017},\n  url          = {https://doi.org/10.1109/TC.2017.2677426},\n  doi          = {10.1109/TC.2017.2677426},\n  timestamp    = {Tue, 18 Jul 2017 01:00:00 +0200},\n  biburl       = {https://dblp.org/rec/journals/tc/RaffertyMH17.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n Improved Reliability of FPGA-Based PUF Identification Generator Design.\n \n \n \n \n\n\n \n Gu, C.; Hanley, N.; and O'Neill, M.\n\n\n \n\n\n\n ACM Trans. Reconfigurable Technol. Syst., 10(3): 20:1–20:23. 2017.\n \n\n\n\n
\n\n\n\n \n \n \"ImprovedPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@article{DBLP:journals/trets/GuHO17,\n  author       = {Chongyan Gu and\n                  Neil Hanley and\n                  M{\\'{a}}ire O'Neill},\n  title        = {Improved Reliability of FPGA-Based {PUF} Identification Generator\n                  Design},\n  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},\n  volume       = {10},\n  number       = {3},\n  pages        = {20:1--20:23},\n  year         = {2017},\n  url          = {https://doi.org/10.1145/3053681},\n  doi          = {10.1145/3053681},\n  timestamp    = {Sat, 08 Jan 2022 00:00:00 +0100},\n  biburl       = {https://dblp.org/rec/journals/trets/GuHO17.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n FPGA-based strong PUF with increased uniqueness and entropy properties.\n \n \n \n \n\n\n \n Gu, C.; Hanley, N.; and O'Neill, M.\n\n\n \n\n\n\n In IEEE International Symposium on Circuits and Systems, ISCAS 2017, Baltimore, MD, USA, May 28-31, 2017, pages 1–4, 2017. IEEE\n \n\n\n\n
\n\n\n\n \n \n \"FPGA-basedPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/iscas/GuHO17,\n  author       = {Chongyan Gu and\n                  Neil Hanley and\n                  M{\\'{a}}ire O'Neill},\n  title        = {FPGA-based strong {PUF} with increased uniqueness and entropy properties},\n  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2017,\n                  Baltimore, MD, USA, May 28-31, 2017},\n  pages        = {1--4},\n  publisher    = {{IEEE}},\n  year         = {2017},\n  url          = {https://doi.org/10.1109/ISCAS.2017.8050838},\n  doi          = {10.1109/ISCAS.2017.8050838},\n  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},\n  biburl       = {https://dblp.org/rec/conf/iscas/GuHO17.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n  \n 2016\n \n \n (2)\n \n \n
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\n \n \n
\n \n\n \n \n \n \n \n \n Optimised Multiplication Architectures for Accelerating Fully Homomorphic Encryption.\n \n \n \n \n\n\n \n Cao, X.; Moore, C.; O'Neill, M.; O'Sullivan, E.; and Hanley, N.\n\n\n \n\n\n\n IEEE Trans. Computers, 65(9): 2794–2806. 2016.\n \n\n\n\n
\n\n\n\n \n \n \"OptimisedPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
\n
@article{DBLP:journals/tc/CaoMOOH16,\n  author       = {Xiaolin Cao and\n                  Ciara Moore and\n                  M{\\'{a}}ire O'Neill and\n                  Elizabeth O'Sullivan and\n                  Neil Hanley},\n  title        = {Optimised Multiplication Architectures for Accelerating Fully Homomorphic\n                  Encryption},\n  journal      = {{IEEE} Trans. Computers},\n  volume       = {65},\n  number       = {9},\n  pages        = {2794--2806},\n  year         = {2016},\n  url          = {https://doi.org/10.1109/TC.2015.2498606},\n  doi          = {10.1109/TC.2015.2498606},\n  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},\n  biburl       = {https://dblp.org/rec/journals/tc/CaoMOOH16.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n Novel lightweight FF-APUF design for FPGA.\n \n \n \n \n\n\n \n Gu, C.; Cui, Y.; Hanley, N.; and O'Neill, M.\n\n\n \n\n\n\n In Bhatia, K. S.; Alioto, M.; Zhao, D.; Marshall, A.; and Sridhar, R., editor(s), 29th IEEE International System-on-Chip Conference, SOCC 2016, Seattle, WA, USA, September 6-9, 2016, pages 75–80, 2016. IEEE\n \n\n\n\n
\n\n\n\n \n \n \"NovelPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/socc/GuCHO16,\n  author       = {Chongyan Gu and\n                  Yijun Cui and\n                  Neil Hanley and\n                  M{\\'{a}}ire O'Neill},\n  editor       = {Karan S. Bhatia and\n                  Massimo Alioto and\n                  Danella Zhao and\n                  Andrew Marshall and\n                  Ramalingam Sridhar},\n  title        = {Novel lightweight {FF-APUF} design for {FPGA}},\n  booktitle    = {29th {IEEE} International System-on-Chip Conference, {SOCC} 2016,\n                  Seattle, WA, USA, September 6-9, 2016},\n  pages        = {75--80},\n  publisher    = {{IEEE}},\n  year         = {2016},\n  url          = {https://doi.org/10.1109/SOCC.2016.7905439},\n  doi          = {10.1109/SOCC.2016.7905439},\n  timestamp    = {Wed, 16 Oct 2019 14:14:53 +0200},\n  biburl       = {https://dblp.org/rec/conf/socc/GuCHO16.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n  \n 2015\n \n \n (4)\n \n \n
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\n \n\n \n \n \n \n \n \n Exploiting Collisions in Addition Chain-Based Exponentiation Algorithms Using a Single Trace.\n \n \n \n \n\n\n \n Hanley, N.; Kim, H.; and Tunstall, M.\n\n\n \n\n\n\n In Nyberg, K., editor(s), Topics in Cryptology - CT-RSA 2015, The Cryptographer's Track at the RSA Conference 2015, San Francisco, CA, USA, April 20-24, 2015. Proceedings, volume 9048, of Lecture Notes in Computer Science, pages 431–448, 2015. Springer\n \n\n\n\n
\n\n\n\n \n \n \"ExploitingPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/ctrsa/HanleyKT15,\n  author       = {Neil Hanley and\n                  HeeSeok Kim and\n                  Michael Tunstall},\n  editor       = {Kaisa Nyberg},\n  title        = {Exploiting Collisions in Addition Chain-Based Exponentiation Algorithms\n                  Using a Single Trace},\n  booktitle    = {Topics in Cryptology - {CT-RSA} 2015, The Cryptographer's Track at\n                  the {RSA} Conference 2015, San Francisco, CA, USA, April 20-24, 2015.\n                  Proceedings},\n  series       = {Lecture Notes in Computer Science},\n  volume       = {9048},\n  pages        = {431--448},\n  publisher    = {Springer},\n  year         = {2015},\n  url          = {https://doi.org/10.1007/978-3-319-16715-2\\_23},\n  doi          = {10.1007/978-3-319-16715-2\\_23},\n  timestamp    = {Thu, 14 Oct 2021 10:27:48 +0200},\n  biburl       = {https://dblp.org/rec/conf/ctrsa/HanleyKT15.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n Neural network based attack on a masked implementation of AES.\n \n \n \n \n\n\n \n Gilmore, R.; Hanley, N.; and O'Neill, M.\n\n\n \n\n\n\n In IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2015, Washington, DC, USA, 5-7 May, 2015, pages 106–111, 2015. IEEE Computer Society\n \n\n\n\n
\n\n\n\n \n \n \"NeuralPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/host/GilmoreHO15,\n  author       = {Richard Gilmore and\n                  Neil Hanley and\n                  M{\\'{a}}ire O'Neill},\n  title        = {Neural network based attack on a masked implementation of {AES}},\n  booktitle    = {{IEEE} International Symposium on Hardware Oriented Security and Trust,\n                  {HOST} 2015, Washington, DC, USA, 5-7 May, 2015},\n  pages        = {106--111},\n  publisher    = {{IEEE} Computer Society},\n  year         = {2015},\n  url          = {https://doi.org/10.1109/HST.2015.7140247},\n  doi          = {10.1109/HST.2015.7140247},\n  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},\n  biburl       = {https://dblp.org/rec/conf/host/GilmoreHO15.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n Pre-processing power traces to defeat random clocking countermeasures.\n \n \n \n \n\n\n \n Hodgers, P.; Hanley, N.; and O'Neill, M.\n\n\n \n\n\n\n In 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015, Lisbon, Portugal, May 24-27, 2015, pages 85–88, 2015. IEEE\n \n\n\n\n
\n\n\n\n \n \n \"Pre-processingPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/iscas/HodgersHO15,\n  author       = {Philip Hodgers and\n                  Neil Hanley and\n                  M{\\'{a}}ire O'Neill},\n  title        = {Pre-processing power traces to defeat random clocking countermeasures},\n  booktitle    = {2015 {IEEE} International Symposium on Circuits and Systems, {ISCAS}\n                  2015, Lisbon, Portugal, May 24-27, 2015},\n  pages        = {85--88},\n  publisher    = {{IEEE}},\n  year         = {2015},\n  url          = {https://doi.org/10.1109/ISCAS.2015.7168576},\n  doi          = {10.1109/ISCAS.2015.7168576},\n  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},\n  biburl       = {https://dblp.org/rec/conf/iscas/HodgersHO15.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n An Improved Second-Order Power Analysis Attack Based on a New Refined Expecter - - Case Study on Protected AES -.\n \n \n \n \n\n\n \n Ahn, H.; Hanley, N.; O'Neill, M.; and Han, D.\n\n\n \n\n\n\n In Kim, H.; and Choi, D., editor(s), Information Security Applications - 16th International Workshop, WISA 2015, Jeju Island, Korea, August 20-22, 2015, Revised Selected Papers, volume 9503, of Lecture Notes in Computer Science, pages 174–186, 2015. Springer\n \n\n\n\n
\n\n\n\n \n \n \"AnPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/wisa/AhnHOH15,\n  author       = {Hyunjin Ahn and\n                  Neil Hanley and\n                  M{\\'{a}}ire O'Neill and\n                  Dong{-}Guk Han},\n  editor       = {Howon Kim and\n                  Dooho Choi},\n  title        = {An Improved Second-Order Power Analysis Attack Based on a New Refined\n                  Expecter - - Case Study on Protected {AES} -},\n  booktitle    = {Information Security Applications - 16th International Workshop, {WISA}\n                  2015, Jeju Island, Korea, August 20-22, 2015, Revised Selected Papers},\n  series       = {Lecture Notes in Computer Science},\n  volume       = {9503},\n  pages        = {174--186},\n  publisher    = {Springer},\n  year         = {2015},\n  url          = {https://doi.org/10.1007/978-3-319-31875-2\\_15},\n  doi          = {10.1007/978-3-319-31875-2\\_15},\n  timestamp    = {Thu, 02 Mar 2023 10:53:05 +0100},\n  biburl       = {https://dblp.org/rec/conf/wisa/AhnHOH15.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n  \n 2014\n \n \n (5)\n \n \n
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\n \n\n \n \n \n \n \n \n Profiling side-channel attacks on cryptographic algorithms.\n \n \n \n \n\n\n \n Hanley, N.\n\n\n \n\n\n\n Ph.D. Thesis, University College Cork, Republic of Ireland, 2014.\n \n\n\n\n
\n\n\n\n \n \n \"ProfilingPaper\n  \n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@phdthesis{DBLP:phd/basesearch/Hanley14,\n  author       = {Neil Hanley},\n  title        = {Profiling side-channel attacks on cryptographic algorithms},\n  school       = {University College Cork, Republic of Ireland},\n  year         = {2014},\n  url          = {http://hdl.handle.net/10468/1921},\n  timestamp    = {Mon, 19 Dec 2022 00:00:00 +0100},\n  biburl       = {https://dblp.org/rec/phd/basesearch/Hanley14.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n High-Speed Fully Homomorphic Encryption Over the Integers.\n \n \n \n \n\n\n \n Cao, X.; Moore, C.; O'Neill, M.; Hanley, N.; and O'Sullivan, E.\n\n\n \n\n\n\n In Böhme, R.; Brenner, M.; Moore, T.; and Smith, M., editor(s), Financial Cryptography and Data Security - FC 2014 Workshops, BITCOIN and WAHC 2014, Christ Church, Barbados, March 7, 2014, Revised Selected Papers, volume 8438, of Lecture Notes in Computer Science, pages 169–180, 2014. Springer\n \n\n\n\n
\n\n\n\n \n \n \"High-SpeedPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/fc/CaoMOHO14,\n  author       = {Xiaolin Cao and\n                  Ciara Moore and\n                  M{\\'{a}}ire O'Neill and\n                  Neil Hanley and\n                  Elizabeth O'Sullivan},\n  editor       = {Rainer B{\\"{o}}hme and\n                  Michael Brenner and\n                  Tyler Moore and\n                  Matthew Smith},\n  title        = {High-Speed Fully Homomorphic Encryption Over the Integers},\n  booktitle    = {Financial Cryptography and Data Security - {FC} 2014 Workshops, {BITCOIN}\n                  and {WAHC} 2014, Christ Church, Barbados, March 7, 2014, Revised Selected\n                  Papers},\n  series       = {Lecture Notes in Computer Science},\n  volume       = {8438},\n  pages        = {169--180},\n  publisher    = {Springer},\n  year         = {2014},\n  url          = {https://doi.org/10.1007/978-3-662-44774-1\\_14},\n  doi          = {10.1007/978-3-662-44774-1\\_14},\n  timestamp    = {Wed, 12 Aug 2020 17:59:02 +0200},\n  biburl       = {https://dblp.org/rec/conf/fc/CaoMOHO14.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n Accelerating integer-based fully homomorphic encryption using Comba multiplication.\n \n \n \n \n\n\n \n Moore, C.; O'Neill, M.; Hanley, N.; and O'Sullivan, E.\n\n\n \n\n\n\n In 2014 IEEE Workshop on Signal Processing Systems, SiPS 2014, Belfast, United Kingdom, October 20-22, 2014, pages 62–67, 2014. IEEE\n \n\n\n\n
\n\n\n\n \n \n \"AcceleratingPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/sips/MooreOHO14,\n  author       = {Ciara Moore and\n                  M{\\'{a}}ire O'Neill and\n                  Neil Hanley and\n                  Elizabeth O'Sullivan},\n  title        = {Accelerating integer-based fully homomorphic encryption using Comba\n                  multiplication},\n  booktitle    = {2014 {IEEE} Workshop on Signal Processing Systems, SiPS 2014, Belfast,\n                  United Kingdom, October 20-22, 2014},\n  pages        = {62--67},\n  publisher    = {{IEEE}},\n  year         = {2014},\n  url          = {https://doi.org/10.1109/SiPS.2014.6986063},\n  doi          = {10.1109/SIPS.2014.6986063},\n  timestamp    = {Wed, 16 Oct 2019 14:14:53 +0200},\n  biburl       = {https://dblp.org/rec/conf/sips/MooreOHO14.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n Empirical evaluation of multi-device profiling side-channel attacks.\n \n \n \n \n\n\n \n Hanley, N.; O'Neill, M.; Tunstall, M.; and Marnane, W. P.\n\n\n \n\n\n\n In 2014 IEEE Workshop on Signal Processing Systems, SiPS 2014, Belfast, United Kingdom, October 20-22, 2014, pages 226–231, 2014. IEEE\n \n\n\n\n
\n\n\n\n \n \n \"EmpiricalPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/sips/HanleyOTM14,\n  author       = {Neil Hanley and\n                  M{\\'{a}}ire O'Neill and\n                  Michael Tunstall and\n                  William P. Marnane},\n  title        = {Empirical evaluation of multi-device profiling side-channel attacks},\n  booktitle    = {2014 {IEEE} Workshop on Signal Processing Systems, SiPS 2014, Belfast,\n                  United Kingdom, October 20-22, 2014},\n  pages        = {226--231},\n  publisher    = {{IEEE}},\n  year         = {2014},\n  url          = {https://doi.org/10.1109/SiPS.2014.6986091},\n  doi          = {10.1109/SIPS.2014.6986091},\n  timestamp    = {Fri, 27 Mar 2020 00:00:00 +0100},\n  biburl       = {https://dblp.org/rec/conf/sips/HanleyOTM14.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n Can leakage models be more efficient? non-linear models in side channel attacks.\n \n \n \n \n\n\n \n Tian, Q.; O'Neill, M.; and Hanley, N.\n\n\n \n\n\n\n In 2014 IEEE International Workshop on Information Forensics and Security, WIFS 2014, Atlanta, GA, USA, December 3-5, 2014, pages 215–220, 2014. IEEE\n \n\n\n\n
\n\n\n\n \n \n \"CanPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/wifs/TianOH14,\n  author       = {Qizhi Tian and\n                  M{\\'{a}}ire O'Neill and\n                  Neil Hanley},\n  title        = {Can leakage models be more efficient? non-linear models in side channel\n                  attacks},\n  booktitle    = {2014 {IEEE} International Workshop on Information Forensics and Security,\n                  {WIFS} 2014, Atlanta, GA, USA, December 3-5, 2014},\n  pages        = {215--220},\n  publisher    = {{IEEE}},\n  year         = {2014},\n  url          = {https://doi.org/10.1109/WIFS.2014.7084330},\n  doi          = {10.1109/WIFS.2014.7084330},\n  timestamp    = {Wed, 16 Oct 2019 14:14:50 +0200},\n  biburl       = {https://dblp.org/rec/conf/wifs/TianOH14.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n  \n 2013\n \n \n (3)\n \n \n
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\n \n \n
\n \n\n \n \n \n \n \n \n Targeting FPGA DSP Slices for a Large Integer Multiplier for Integer Based FHE.\n \n \n \n \n\n\n \n Moore, C.; Hanley, N.; McAllister, J.; O'Neill, M.; O'Sullivan, E.; and Cao, X.\n\n\n \n\n\n\n In Adams, A. A.; Brenner, M.; and Smith, M., editor(s), Financial Cryptography and Data Security - FC 2013 Workshops, USEC and WAHC 2013, Okinawa, Japan, April 1, 2013, Revised Selected Papers, volume 7862, of Lecture Notes in Computer Science, pages 226–237, 2013. Springer\n \n\n\n\n
\n\n\n\n \n \n \"TargetingPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/fc/MooreHMOOC13,\n  author       = {Ciara Moore and\n                  Neil Hanley and\n                  John McAllister and\n                  M{\\'{a}}ire O'Neill and\n                  Elizabeth O'Sullivan and\n                  Xiaolin Cao},\n  editor       = {Andrew A. Adams and\n                  Michael Brenner and\n                  Matthew Smith},\n  title        = {Targeting {FPGA} {DSP} Slices for a Large Integer Multiplier for Integer\n                  Based {FHE}},\n  booktitle    = {Financial Cryptography and Data Security - {FC} 2013 Workshops, {USEC}\n                  and {WAHC} 2013, Okinawa, Japan, April 1, 2013, Revised Selected Papers},\n  series       = {Lecture Notes in Computer Science},\n  volume       = {7862},\n  pages        = {226--237},\n  publisher    = {Springer},\n  year         = {2013},\n  url          = {https://doi.org/10.1007/978-3-642-41320-9\\_16},\n  doi          = {10.1007/978-3-642-41320-9\\_16},\n  timestamp    = {Tue, 14 May 2019 10:00:38 +0200},\n  biburl       = {https://dblp.org/rec/conf/fc/MooreHMOOC13.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n Pre-processing power traces with a phase-sensitive detector.\n \n \n \n \n\n\n \n Hodgers, P.; Hanley, N.; and O'Neill, M.\n\n\n \n\n\n\n In 2013 IEEE International Symposium on Hardware-Oriented Security and Trust, HOST 2013, Austin, TX, USA, June 2-3, 2013, pages 131–136, 2013. IEEE Computer Society\n \n\n\n\n
\n\n\n\n \n \n \"Pre-processingPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/host/HodgersHO13,\n  author       = {Philip Hodgers and\n                  Neil Hanley and\n                  M{\\'{a}}ire O'Neill},\n  title        = {Pre-processing power traces with a phase-sensitive detector},\n  booktitle    = {2013 {IEEE} International Symposium on Hardware-Oriented Security\n                  and Trust, {HOST} 2013, Austin, TX, USA, June 2-3, 2013},\n  pages        = {131--136},\n  publisher    = {{IEEE} Computer Society},\n  year         = {2013},\n  url          = {https://doi.org/10.1109/HST.2013.6581578},\n  doi          = {10.1109/HST.2013.6581578},\n  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},\n  biburl       = {https://dblp.org/rec/conf/host/HodgersHO13.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n Accelerating Fully Homomorphic Encryption over the Integers with Super-size Hardware Multiplier and Modular Reduction.\n \n \n \n \n\n\n \n Cao, X.; Moore, C.; O'Neill, M.; O'Sullivan, E.; and Hanley, N.\n\n\n \n\n\n\n IACR Cryptol. ePrint Arch.,616. 2013.\n \n\n\n\n
\n\n\n\n \n \n \"AcceleratingPaper\n  \n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@article{DBLP:journals/iacr/CaoMOOH13,\n  author       = {Xiaolin Cao and\n                  Ciara Moore and\n                  M{\\'{a}}ire O'Neill and\n                  Elizabeth O'Sullivan and\n                  Neil Hanley},\n  title        = {Accelerating Fully Homomorphic Encryption over the Integers with Super-size\n                  Hardware Multiplier and Modular Reduction},\n  journal      = {{IACR} Cryptol. ePrint Arch.},\n  pages        = {616},\n  year         = {2013},\n  url          = {http://eprint.iacr.org/2013/616},\n  timestamp    = {Mon, 11 May 2020 01:00:00 +0200},\n  biburl       = {https://dblp.org/rec/journals/iacr/CaoMOOH13.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n  \n 2012\n \n \n (2)\n \n \n
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\n \n\n \n \n \n \n \n \n Hardware Comparison of the ISO/IEC 29192-2 Block Ciphers.\n \n \n \n \n\n\n \n Hanley, N.; and O'Neill, M.\n\n\n \n\n\n\n In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2012, Amherst, MA, USA, August 19-21, 2012, pages 57–62, 2012. IEEE Computer Society\n \n\n\n\n
\n\n\n\n \n \n \"HardwarePaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/isvlsi/HanleyO12,\n  author       = {Neil Hanley and\n                  M{\\'{a}}ire O'Neill},\n  title        = {Hardware Comparison of the {ISO/IEC} 29192-2 Block Ciphers},\n  booktitle    = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2012, Amherst,\n                  MA, USA, August 19-21, 2012},\n  pages        = {57--62},\n  publisher    = {{IEEE} Computer Society},\n  year         = {2012},\n  url          = {https://doi.org/10.1109/ISVLSI.2012.25},\n  doi          = {10.1109/ISVLSI.2012.25},\n  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},\n  biburl       = {https://dblp.org/rec/conf/isvlsi/HanleyO12.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n Exploiting Collisions in Addition Chain-based Exponentiation Algorithms.\n \n \n \n \n\n\n \n Hanley, N.; Kim, H.; and Tunstall, M.\n\n\n \n\n\n\n IACR Cryptol. ePrint Arch.,485. 2012.\n \n\n\n\n
\n\n\n\n \n \n \"ExploitingPaper\n  \n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@article{DBLP:journals/iacr/HanleyKT12,\n  author       = {Neil Hanley and\n                  HeeSeok Kim and\n                  Michael Tunstall},\n  title        = {Exploiting Collisions in Addition Chain-based Exponentiation Algorithms},\n  journal      = {{IACR} Cryptol. ePrint Arch.},\n  pages        = {485},\n  year         = {2012},\n  url          = {http://eprint.iacr.org/2012/485},\n  timestamp    = {Mon, 11 May 2020 01:00:00 +0200},\n  biburl       = {https://dblp.org/rec/journals/iacr/HanleyKT12.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n  \n 2011\n \n \n (2)\n \n \n
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\n \n\n \n \n \n \n \n \n Using templates to distinguish multiplications from squaring operations.\n \n \n \n \n\n\n \n Hanley, N.; Tunstall, M.; and Marnane, W. P.\n\n\n \n\n\n\n Int. J. Inf. Sec., 10(4): 255–266. 2011.\n \n\n\n\n
\n\n\n\n \n \n \"UsingPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@article{DBLP:journals/ijisec/HanleyTM11,\n  author       = {Neil Hanley and\n                  Michael Tunstall and\n                  William P. Marnane},\n  title        = {Using templates to distinguish multiplications from squaring operations},\n  journal      = {Int. J. Inf. Sec.},\n  volume       = {10},\n  number       = {4},\n  pages        = {255--266},\n  year         = {2011},\n  url          = {https://doi.org/10.1007/s10207-011-0135-4},\n  doi          = {10.1007/S10207-011-0135-4},\n  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},\n  biburl       = {https://dblp.org/rec/journals/ijisec/HanleyTM11.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n Using Templates to Distinguish Multiplications from Squaring Operations.\n \n \n \n \n\n\n \n Hanley, N.; Tunstall, M.; and Marnane, W. P.\n\n\n \n\n\n\n IACR Cryptol. ePrint Arch.,236. 2011.\n \n\n\n\n
\n\n\n\n \n \n \"UsingPaper\n  \n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
\n
@article{DBLP:journals/iacr/HanleyTM11,\n  author       = {Neil Hanley and\n                  Michael Tunstall and\n                  William P. Marnane},\n  title        = {Using Templates to Distinguish Multiplications from Squaring Operations},\n  journal      = {{IACR} Cryptol. ePrint Arch.},\n  pages        = {236},\n  year         = {2011},\n  url          = {http://eprint.iacr.org/2011/236},\n  timestamp    = {Mon, 11 May 2020 01:00:00 +0200},\n  biburl       = {https://dblp.org/rec/journals/iacr/HanleyTM11.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n  \n 2010\n \n \n (3)\n \n \n
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\n \n\n \n \n \n \n \n \n FPGA Implementations of the Round Two SHA-3 Candidates.\n \n \n \n \n\n\n \n Baldwin, B.; Byrne, A.; Lu, L.; Hamilton, M.; Hanley, N.; O'Neill, M.; and Marnane, W. P.\n\n\n \n\n\n\n In International Conference on Field Programmable Logic and Applications, FPL 2010, August 31 2010 - September 2, 2010, Milano, Italy, pages 400–407, 2010. IEEE Computer Society\n \n\n\n\n
\n\n\n\n \n \n \"FPGAPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/fpl/BaldwinBLHHOM10,\n  author       = {Brian Baldwin and\n                  Andrew Byrne and\n                  Liang Lu and\n                  Mark Hamilton and\n                  Neil Hanley and\n                  M{\\'{a}}ire O'Neill and\n                  William P. Marnane},\n  title        = {{FPGA} Implementations of the Round Two {SHA-3} Candidates},\n  booktitle    = {International Conference on Field Programmable Logic and Applications,\n                  {FPL} 2010, August 31 2010 - September 2, 2010, Milano, Italy},\n  pages        = {400--407},\n  publisher    = {{IEEE} Computer Society},\n  year         = {2010},\n  url          = {https://doi.org/10.1109/FPL.2010.84},\n  doi          = {10.1109/FPL.2010.84},\n  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},\n  biburl       = {https://dblp.org/rec/conf/fpl/BaldwinBLHHOM10.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n Hardware Trojans for Inducing or Amplifying Side-Channel Leakage of Cryptographic Software.\n \n \n \n \n\n\n \n Gallais, J.; Großschädl, J.; Hanley, N.; Kasper, M.; Medwed, M.; Regazzoni, F.; Schmidt, J.; Tillich, S.; and Wójcik, M.\n\n\n \n\n\n\n In Chen, L.; and Yung, M., editor(s), Trusted Systems - Second International Conference, INTRUST 2010, Beijing, China, December 13-15, 2010, Revised Selected Papers, volume 6802, of Lecture Notes in Computer Science, pages 253–270, 2010. Springer\n \n\n\n\n
\n\n\n\n \n \n \"HardwarePaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/intrust/GallaisGHKMRSTW10,\n  author       = {Jean{-}Fran{\\c{c}}ois Gallais and\n                  Johann Gro{\\ss}sch{\\"{a}}dl and\n                  Neil Hanley and\n                  Markus Kasper and\n                  Marcel Medwed and\n                  Francesco Regazzoni and\n                  J{\\"{o}}rn{-}Marc Schmidt and\n                  Stefan Tillich and\n                  Marcin W{\\'{o}}jcik},\n  editor       = {Liqun Chen and\n                  Moti Yung},\n  title        = {Hardware Trojans for Inducing or Amplifying Side-Channel Leakage of\n                  Cryptographic Software},\n  booktitle    = {Trusted Systems - Second International Conference, {INTRUST} 2010,\n                  Beijing, China, December 13-15, 2010, Revised Selected Papers},\n  series       = {Lecture Notes in Computer Science},\n  volume       = {6802},\n  pages        = {253--270},\n  publisher    = {Springer},\n  year         = {2010},\n  url          = {https://doi.org/10.1007/978-3-642-25283-9\\_17},\n  doi          = {10.1007/978-3-642-25283-9\\_17},\n  timestamp    = {Tue, 31 Mar 2020 01:00:00 +0200},\n  biburl       = {https://dblp.org/rec/conf/intrust/GallaisGHKMRSTW10.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n A Hardware Wrapper for the SHA-3 Hash Algorithms.\n \n \n \n \n\n\n \n Baldwin, B.; Byrne, A.; Lu, L.; Hamilton, M.; Hanley, N.; O'Neill, M.; and Marnane, W. P.\n\n\n \n\n\n\n IACR Cryptol. ePrint Arch.,124. 2010.\n \n\n\n\n
\n\n\n\n \n \n \"APaper\n  \n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@article{DBLP:journals/iacr/BaldwinBLHHOM10,\n  author       = {Brian Baldwin and\n                  Andrew Byrne and\n                  Liang Lu and\n                  Mark Hamilton and\n                  Neil Hanley and\n                  M{\\'{a}}ire O'Neill and\n                  William P. Marnane},\n  title        = {A Hardware Wrapper for the {SHA-3} Hash Algorithms},\n  journal      = {{IACR} Cryptol. ePrint Arch.},\n  pages        = {124},\n  year         = {2010},\n  url          = {http://eprint.iacr.org/2010/124},\n  timestamp    = {Mon, 11 May 2020 01:00:00 +0200},\n  biburl       = {https://dblp.org/rec/journals/iacr/BaldwinBLHHOM10.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n  \n 2009\n \n \n (3)\n \n \n
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\n \n\n \n \n \n \n \n \n FPGA Implementations of SHA-3 Candidates: CubeHash, Grostl, LANE, Shabal and Spectral Hash.\n \n \n \n \n\n\n \n Baldwin, B.; Byrne, A.; Hamilton, M.; Hanley, N.; McEvoy, R. P.; Pan, W.; and Marnane, W. P.\n\n\n \n\n\n\n In Núñez, A.; and Carballo, P. P., editor(s), 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2009, 27-29 August 2009, Patras, Greece, pages 783–790, 2009. IEEE Computer Society\n \n\n\n\n
\n\n\n\n \n \n \"FPGAPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/dsd/BaldwinBHHMPM09,\n  author       = {Brian Baldwin and\n                  Andrew Byrne and\n                  Mark Hamilton and\n                  Neil Hanley and\n                  Robert P. McEvoy and\n                  Weibo Pan and\n                  William P. Marnane},\n  editor       = {Antonio N{\\'{u}}{\\~{n}}ez and\n                  Pedro P. Carballo},\n  title        = {{FPGA} Implementations of {SHA-3} Candidates: CubeHash, Grostl, LANE,\n                  Shabal and Spectral Hash},\n  booktitle    = {12th Euromicro Conference on Digital System Design, Architectures,\n                  Methods and Tools, {DSD} 2009, 27-29 August 2009, Patras, Greece},\n  pages        = {783--790},\n  publisher    = {{IEEE} Computer Society},\n  year         = {2009},\n  url          = {https://doi.org/10.1109/DSD.2009.162},\n  doi          = {10.1109/DSD.2009.162},\n  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},\n  biburl       = {https://dblp.org/rec/conf/dsd/BaldwinBHHMPM09.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n Unknown Plaintext Template Attacks.\n \n \n \n \n\n\n \n Hanley, N.; Tunstall, M.; and Marnane, W. P.\n\n\n \n\n\n\n In Youm, H. Y.; and Yung, M., editor(s), Information Security Applications, 10th International Workshop, WISA 2009, Busan, Korea, August 25-27, 2009, Revised Selected Papers, volume 5932, of Lecture Notes in Computer Science, pages 148–162, 2009. Springer\n \n\n\n\n
\n\n\n\n \n \n \"UnknownPaper\n  \n \n\n \n \n doi\n  \n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
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@inproceedings{DBLP:conf/wisa/HanleyTM09,\n  author       = {Neil Hanley and\n                  Michael Tunstall and\n                  William P. Marnane},\n  editor       = {Heung Youl Youm and\n                  Moti Yung},\n  title        = {Unknown Plaintext Template Attacks},\n  booktitle    = {Information Security Applications, 10th International Workshop, {WISA}\n                  2009, Busan, Korea, August 25-27, 2009, Revised Selected Papers},\n  series       = {Lecture Notes in Computer Science},\n  volume       = {5932},\n  pages        = {148--162},\n  publisher    = {Springer},\n  year         = {2009},\n  url          = {https://doi.org/10.1007/978-3-642-10838-9\\_12},\n  doi          = {10.1007/978-3-642-10838-9\\_12},\n  timestamp    = {Fri, 27 Mar 2020 00:00:00 +0100},\n  biburl       = {https://dblp.org/rec/conf/wisa/HanleyTM09.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n \n\n \n \n \n \n \n \n FPGA Implementations of SHA-3 Candidates: CubeHash, Grøstl, Lane, Shabal and Spectral Hash.\n \n \n \n \n\n\n \n Baldwin, B.; Byrne, A.; Hamilton, M.; Hanley, N.; McEvoy, R. P.; Pan, W.; and Marnane, W. P.\n\n\n \n\n\n\n IACR Cryptol. ePrint Arch.,342. 2009.\n \n\n\n\n
\n\n\n\n \n \n \"FPGAPaper\n  \n \n\n \n\n \n link\n  \n \n\n bibtex\n \n\n \n\n \n\n \n \n \n \n \n \n \n\n  \n \n \n\n\n\n
\n
@article{DBLP:journals/iacr/BaldwinBHHMPM09,\n  author       = {Brian Baldwin and\n                  Andrew Byrne and\n                  Mark Hamilton and\n                  Neil Hanley and\n                  Robert P. McEvoy and\n                  Weibo Pan and\n                  William P. Marnane},\n  title        = {{FPGA} Implementations of {SHA-3} Candidates: CubeHash, Gr{\\o}stl,\n                  Lane, Shabal and Spectral Hash},\n  journal      = {{IACR} Cryptol. ePrint Arch.},\n  pages        = {342},\n  year         = {2009},\n  url          = {http://eprint.iacr.org/2009/342},\n  timestamp    = {Mon, 11 May 2020 01:00:00 +0200},\n  biburl       = {https://dblp.org/rec/journals/iacr/BaldwinBHHMPM09.bib},\n  bibsource    = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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