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\n\n \n \n \n \n \n \n Exploring NoC-Based MPSoC Design Space with Power Estimation Models.\n \n \n \n \n\n\n \n Ost, L.; Guindani, G. M.; Moraes, F. G.; Indrusiak, L. S.; and Määttä, S.\n\n\n \n\n\n\n
IEEE Des. Test Comput., 28(2): 16–29. 2011.\n
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@article{DBLP:journals/dt/OstGMIM11,\n author = {Luciano Ost and\n Guilherme Montez Guindani and\n Fernando Gehm Moraes and\n Leandro Soares Indrusiak and\n Sanna M{\\"{a}}{\\"{a}}tt{\\"{a}}},\n title = {Exploring NoC-Based MPSoC Design Space with Power Estimation Models},\n journal = {{IEEE} Des. Test Comput.},\n volume = {28},\n number = {2},\n pages = {16--29},\n year = {2011},\n url = {https://doi.org/10.1109/MDT.2010.116},\n doi = {10.1109/MDT.2010.116},\n timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},\n biburl = {https://dblp.org/rec/journals/dt/OstGMIM11.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n\n \n \n \n \n \n \n A Robust Architectural Approach for Cryptographic Algorithms Using GALS Pipelines.\n \n \n \n \n\n\n \n Soares, R. I.; Calazans, N. L. V.; Moraes, F. G.; Maurine, P.; and Torres, L.\n\n\n \n\n\n\n
IEEE Des. Test Comput., 28(5): 62–71. 2011.\n
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@article{DBLP:journals/dt/SoaresCMMT11,\n author = {Rafael Iankowski Soares and\n Ney Laert Vilar Calazans and\n Fernando Gehm Moraes and\n Philippe Maurine and\n Lionel Torres},\n title = {A Robust Architectural Approach for Cryptographic Algorithms Using\n {GALS} Pipelines},\n journal = {{IEEE} Des. Test Comput.},\n volume = {28},\n number = {5},\n pages = {62--71},\n year = {2011},\n url = {https://doi.org/10.1109/MDT.2011.69},\n doi = {10.1109/MDT.2011.69},\n timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},\n biburl = {https://dblp.org/rec/journals/dt/SoaresCMMT11.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n\n \n \n \n \n \n \n A new test scheduling algorithm based on Networks-on-Chip as Test Access Mechanisms.\n \n \n \n \n\n\n \n Amory, A. M.; Lazzari, C.; Lubaszewski, M.; and Moraes, F. G.\n\n\n \n\n\n\n
J. Parallel Distributed Comput., 71(5): 675–686. 2011.\n
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@article{DBLP:journals/jpdc/AmoryLLM11,\n author = {Alexandre M. Amory and\n Cristiano Lazzari and\n Marcelo Lubaszewski and\n Fernando Gehm Moraes},\n title = {A new test scheduling algorithm based on Networks-on-Chip as Test\n Access Mechanisms},\n journal = {J. Parallel Distributed Comput.},\n volume = {71},\n number = {5},\n pages = {675--686},\n year = {2011},\n url = {https://doi.org/10.1016/j.jpdc.2010.09.008},\n doi = {10.1016/J.JPDC.2010.09.008},\n timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},\n biburl = {https://dblp.org/rec/journals/jpdc/AmoryLLM11.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n\n \n \n \n \n \n \n CAFES: A framework for intrachip application modeling and communication architecture design.\n \n \n \n \n\n\n \n Marcon, C. A. M.; Calazans, N.; Moreno, E. I.; Moraes, F.; Hessel, F.; and Susin, A. A.\n\n\n \n\n\n\n
J. Parallel Distributed Comput., 71(5): 714–728. 2011.\n
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@article{DBLP:journals/jpdc/MarconCMMHS11,\n author = {C{\\'{e}}sar A. M. Marcon and\n Ney Calazans and\n Edson I. Moreno and\n Fernando Moraes and\n Fabiano Hessel and\n Altamiro Amadeu Susin},\n title = {{CAFES:} {A} framework for intrachip application modeling and communication\n architecture design},\n journal = {J. Parallel Distributed Comput.},\n volume = {71},\n number = {5},\n pages = {714--728},\n year = {2011},\n url = {https://doi.org/10.1016/j.jpdc.2010.10.002},\n doi = {10.1016/J.JPDC.2010.10.002},\n timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},\n biburl = {https://dblp.org/rec/journals/jpdc/MarconCMMHS11.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n\n \n \n \n \n \n \n Achieving composability in NoC-based MPSoCs through QoS management at software level.\n \n \n \n \n\n\n \n Carara, E.; Almeida, G. M.; Sassatelli, G.; and Moraes, F. G.\n\n\n \n\n\n\n In
Design, Automation and Test in Europe, DATE 2011, Grenoble, France, March 14-18, 2011, pages 407–412, 2011. IEEE\n
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@inproceedings{DBLP:conf/date/CararaASM11,\n author = {Everton Carara and\n Gabriel Marchesan Almeida and\n Gilles Sassatelli and\n Fernando Gehm Moraes},\n title = {Achieving composability in NoC-based MPSoCs through QoS management\n at software level},\n booktitle = {Design, Automation and Test in Europe, {DATE} 2011, Grenoble, France,\n March 14-18, 2011},\n pages = {407--412},\n publisher = {{IEEE}},\n year = {2011},\n url = {https://doi.org/10.1109/DATE.2011.5763071},\n doi = {10.1109/DATE.2011.5763071},\n timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},\n biburl = {https://dblp.org/rec/conf/date/CararaASM11.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n\n \n \n \n \n \n \n Evaluating energy consumption of homogeneous MPSoCs using spare tiles.\n \n \n \n \n\n\n \n Amory, A. M.; Ost, L.; Marcon, C. A. M.; Moraes, F. G.; and Lubaszewski, M.\n\n\n \n\n\n\n In
Design, Automation and Test in Europe, DATE 2011, Grenoble, France, March 14-18, 2011, pages 1164–1167, 2011. IEEE\n
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@inproceedings{DBLP:conf/date/AmoryOMML11,\n author = {Alexandre M. Amory and\n Luciano Ost and\n C{\\'{e}}sar A. M. Marcon and\n Fernando Gehm Moraes and\n Marcelo Lubaszewski},\n title = {Evaluating energy consumption of homogeneous MPSoCs using spare tiles},\n booktitle = {Design, Automation and Test in Europe, {DATE} 2011, Grenoble, France,\n March 14-18, 2011},\n pages = {1164--1167},\n publisher = {{IEEE}},\n year = {2011},\n url = {https://doi.org/10.1109/DATE.2011.5763304},\n doi = {10.1109/DATE.2011.5763304},\n timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},\n biburl = {https://dblp.org/rec/conf/date/AmoryOMML11.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n\n \n \n \n \n \n \n Dynamic Flow Reconfiguration Strategy to Avoid Communication Hot-Spots.\n \n \n \n \n\n\n \n Prolonge, R.; Clermidy, F.; Tedesco, L.; and Moraes, F.\n\n\n \n\n\n\n In
14th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2011, August 31 - September 2, 2011, Oulu, Finland, pages 519–524, 2011. IEEE Computer Society\n
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@inproceedings{DBLP:conf/dsd/ProlongeCTM11,\n author = {Romain Prolonge and\n Fabien Clermidy and\n Leonel Tedesco and\n Fernando Moraes},\n title = {Dynamic Flow Reconfiguration Strategy to Avoid Communication Hot-Spots},\n booktitle = {14th Euromicro Conference on Digital System Design, Architectures,\n Methods and Tools, {DSD} 2011, August 31 - September 2, 2011, Oulu,\n Finland},\n pages = {519--524},\n publisher = {{IEEE} Computer Society},\n year = {2011},\n url = {https://doi.org/10.1109/DSD.2011.72},\n doi = {10.1109/DSD.2011.72},\n timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},\n biburl = {https://dblp.org/rec/conf/dsd/ProlongeCTM11.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n\n \n \n \n \n \n \n Adapting a C-element design flow for low power.\n \n \n \n \n\n\n \n Moreira, M. T.; de Oliveira, B. C.; Pontes, J. J. H.; Moraes, F.; and Calazans, N.\n\n\n \n\n\n\n In
18th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2011, Beirut, Lebanon, December 11-14, 2011, pages 45–48, 2011. IEEE\n
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@inproceedings{DBLP:conf/icecsys/MoreiraOPMC11,\n author = {Matheus T. Moreira and\n Bruno Cruz de Oliveira and\n Julian J. H. Pontes and\n Fernando Moraes and\n Ney Calazans},\n title = {Adapting a C-element design flow for low power},\n booktitle = {18th {IEEE} International Conference on Electronics, Circuits and\n Systems, {ICECS} 2011, Beirut, Lebanon, December 11-14, 2011},\n pages = {45--48},\n publisher = {{IEEE}},\n year = {2011},\n url = {https://doi.org/10.1109/ICECS.2011.6122210},\n doi = {10.1109/ICECS.2011.6122210},\n timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},\n biburl = {https://dblp.org/rec/conf/icecsys/MoreiraOPMC11.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n\n \n \n \n \n \n \n Energy-aware dynamic task mapping for NoC-based MPSoCs.\n \n \n \n \n\n\n \n Mandelli, M.; Ost, L.; Carara, E.; Guindani, G. M.; Gouvea, T.; Medeiros, G.; and Moraes, F. G.\n\n\n \n\n\n\n In
International Symposium on Circuits and Systems (ISCAS 2011), May 15-19 2011, Rio de Janeiro, Brazil, pages 1676–1679, 2011. IEEE\n
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@inproceedings{DBLP:conf/iscas/MandelliOCGGMM11,\n author = {Marcelo Mandelli and\n Luciano Ost and\n Everton Carara and\n Guilherme Montez Guindani and\n Thiago Gouvea and\n Guilherme Medeiros and\n Fernando Gehm Moraes},\n title = {Energy-aware dynamic task mapping for NoC-based MPSoCs},\n booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2011), May\n 15-19 2011, Rio de Janeiro, Brazil},\n pages = {1676--1679},\n publisher = {{IEEE}},\n year = {2011},\n url = {https://doi.org/10.1109/ISCAS.2011.5937903},\n doi = {10.1109/ISCAS.2011.5937903},\n timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},\n biburl = {https://dblp.org/rec/conf/iscas/MandelliOCGGMM11.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n\n \n \n \n \n \n \n Exploiting multicast messages in cache-coherence protocols for NoC-based MPSoCs.\n \n \n \n \n\n\n \n Chaves, T. M.; Carara, E. A.; and Moraes, F. G.\n\n\n \n\n\n\n In
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2011, Montpellier, France, 20-22 June, 2011, pages 1–6, 2011. IEEE\n
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@inproceedings{DBLP:conf/recosoc/ChavesCM11,\n author = {Tales Marchesan Chaves and\n Everton Alceu Carara and\n Fernando Gehm Moraes},\n title = {Exploiting multicast messages in cache-coherence protocols for NoC-based\n MPSoCs},\n booktitle = {Proceedings of the 6th International Workshop on Reconfigurable Communication-centric\n Systems-on-Chip, ReCoSoC 2011, Montpellier, France, 20-22 June, 2011},\n pages = {1--6},\n publisher = {{IEEE}},\n year = {2011},\n url = {https://doi.org/10.1109/ReCoSoC.2011.5981492},\n doi = {10.1109/RECOSOC.2011.5981492},\n timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},\n biburl = {https://dblp.org/rec/conf/recosoc/ChavesCM11.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n\n \n \n \n \n \n \n Exploring heterogeneous NoC-based MPSoCs: From FPGA to high-level modeling.\n \n \n \n \n\n\n \n Ost, L.; Almeida, G. M.; Mandelli, M.; Wächter, E.; Varyani, S.; Sassatelli, G.; Indrusiak, L. S.; Robert, M.; and Moraes, F.\n\n\n \n\n\n\n In
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2011, Montpellier, France, 20-22 June, 2011, pages 1–8, 2011. IEEE\n
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@inproceedings{DBLP:conf/recosoc/OstAMWVSIRM11,\n author = {Luciano Ost and\n Gabriel Marchesan Almeida and\n Marcelo Mandelli and\n Eduardo W{\\"{a}}chter and\n Sameer Varyani and\n Gilles Sassatelli and\n Leandro Soares Indrusiak and\n Michel Robert and\n Fernando Moraes},\n title = {Exploring heterogeneous NoC-based MPSoCs: From {FPGA} to high-level\n modeling},\n booktitle = {Proceedings of the 6th International Workshop on Reconfigurable Communication-centric\n Systems-on-Chip, ReCoSoC 2011, Montpellier, France, 20-22 June, 2011},\n pages = {1--8},\n publisher = {{IEEE}},\n year = {2011},\n url = {https://doi.org/10.1109/ReCoSoC.2011.5981517},\n doi = {10.1109/RECOSOC.2011.5981517},\n timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},\n biburl = {https://dblp.org/rec/conf/recosoc/OstAMWVSIRM11.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n\n \n \n \n \n \n \n HeMPS-S: A homogeneous NoC-based MPSoCs framework prototyped in FPGAs.\n \n \n \n \n\n\n \n Wächter, E.; Biazi, A.; and Moraes, F. G.\n\n\n \n\n\n\n In
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2011, Montpellier, France, 20-22 June, 2011, pages 1–8, 2011. IEEE\n
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@inproceedings{DBLP:conf/recosoc/WachterBM11,\n author = {Eduardo W{\\"{a}}chter and\n Adelcio Biazi and\n Fernando Gehm Moraes},\n title = {HeMPS-S: {A} homogeneous NoC-based MPSoCs framework prototyped in\n FPGAs},\n booktitle = {Proceedings of the 6th International Workshop on Reconfigurable Communication-centric\n Systems-on-Chip, ReCoSoC 2011, Montpellier, France, 20-22 June, 2011},\n pages = {1--8},\n publisher = {{IEEE}},\n year = {2011},\n url = {https://doi.org/10.1109/ReCoSoC.2011.5981498},\n doi = {10.1109/RECOSOC.2011.5981498},\n timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},\n biburl = {https://dblp.org/rec/conf/recosoc/WachterBM11.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n\n \n \n \n \n \n \n Task mapping on NoC-based MPSoCs with faulty tiles: Evaluating the energy consumption and the application execution time.\n \n \n \n \n\n\n \n Amory, A. M.; Marcon, C. A. M.; Moraes, F. G.; and Lubaszewski, M.\n\n\n \n\n\n\n In
Proceedings of the 22nd IEEE International Symposium on Rapid System Prototyping, RSP 2011, Karlsruhe, Germany, 24-27 May, 2011, pages 164–170, 2011. IEEE\n
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@inproceedings{DBLP:conf/rsp/AmoryMML11,\n author = {Alexandre M. Amory and\n C{\\'{e}}sar A. M. Marcon and\n Fernando Gehm Moraes and\n Marcelo Lubaszewski},\n title = {Task mapping on NoC-based MPSoCs with faulty tiles: Evaluating the\n energy consumption and the application execution time},\n booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System\n Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},\n pages = {164--170},\n publisher = {{IEEE}},\n year = {2011},\n url = {https://doi.org/10.1109/RSP.2011.5929991},\n doi = {10.1109/RSP.2011.5929991},\n timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},\n biburl = {https://dblp.org/rec/conf/rsp/AmoryMML11.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n\n \n \n \n \n \n \n Arbitration and routing impact on NoC design.\n \n \n \n \n\n\n \n Moreno, E. I.; Marcon, C. A. M.; Calazans, N. L. V.; and Moraes, F. G.\n\n\n \n\n\n\n In
Proceedings of the 22nd IEEE International Symposium on Rapid System Prototyping, RSP 2011, Karlsruhe, Germany, 24-27 May, 2011, pages 193–198, 2011. IEEE\n
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@inproceedings{DBLP:conf/rsp/MorenoMCM11,\n author = {Edson I. Moreno and\n C{\\'{e}}sar A. M. Marcon and\n Ney Laert Vilar Calazans and\n Fernando Gehm Moraes},\n title = {Arbitration and routing impact on NoC design},\n booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System\n Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},\n pages = {193--198},\n publisher = {{IEEE}},\n year = {2011},\n url = {https://doi.org/10.1109/RSP.2011.5929995},\n doi = {10.1109/RSP.2011.5929995},\n timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},\n biburl = {https://dblp.org/rec/conf/rsp/MorenoMCM11.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n\n \n \n \n \n \n \n Early estimation of wire length for dedicated test access mechanisms in networks-on-chip based SoCs.\n \n \n \n \n\n\n \n Amory, A. M.; Lazzari, C.; Lubaszewski, M.; and Moraes, F. G.\n\n\n \n\n\n\n In Cavalcanti, A. C.; Melcher, E. U. K.; and Becker, J., editor(s),
24th Symposium on Integrated Circuits and Systems Design, SBCCI '11, João Pessoa, Brazil, August 30 - September 2, 2011, pages 73–78, 2011. ACM\n
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@inproceedings{DBLP:conf/sbcci/AmoryLLM11,\n author = {Alexandre M. Amory and\n Cristiano Lazzari and\n Marcelo Lubaszewski and\n Fernando Gehm Moraes},\n editor = {Antonio Carlos Cavalcanti and\n Elmar U. K. Melcher and\n J{\\"{u}}rgen Becker},\n title = {Early estimation of wire length for dedicated test access mechanisms\n in networks-on-chip based SoCs},\n booktitle = {24th Symposium on Integrated Circuits and Systems Design, {SBCCI}\n '11, Jo{\\~{a}}o Pessoa, Brazil, August 30 - September 2, 2011},\n pages = {73--78},\n publisher = {{ACM}},\n year = {2011},\n url = {https://doi.org/10.1145/2020876.2020894},\n doi = {10.1145/2020876.2020894},\n timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},\n biburl = {https://dblp.org/rec/conf/sbcci/AmoryLLM11.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n\n \n \n \n \n \n \n Multi-task dynamic mapping onto NoC-based MPSoCs.\n \n \n \n \n\n\n \n Mandelli, M.; Amory, A. M.; Ost, L.; and Moraes, F. G.\n\n\n \n\n\n\n In Cavalcanti, A. C.; Melcher, E. U. K.; and Becker, J., editor(s),
24th Symposium on Integrated Circuits and Systems Design, SBCCI '11, João Pessoa, Brazil, August 30 - September 2, 2011, pages 191–196, 2011. ACM\n
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@inproceedings{DBLP:conf/sbcci/MandelliAOM11,\n author = {Marcelo Mandelli and\n Alexandre M. Amory and\n Luciano Ost and\n Fernando Gehm Moraes},\n editor = {Antonio Carlos Cavalcanti and\n Elmar U. K. Melcher and\n J{\\"{u}}rgen Becker},\n title = {Multi-task dynamic mapping onto NoC-based MPSoCs},\n booktitle = {24th Symposium on Integrated Circuits and Systems Design, {SBCCI}\n '11, Jo{\\~{a}}o Pessoa, Brazil, August 30 - September 2, 2011},\n pages = {191--196},\n publisher = {{ACM}},\n year = {2011},\n url = {https://doi.org/10.1145/2020876.2020920},\n doi = {10.1145/2020876.2020920},\n timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},\n biburl = {https://dblp.org/rec/conf/sbcci/MandelliAOM11.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n\n \n \n \n \n \n \n A self-adaptable distributed DFS scheme for NoC-based MPSoCs.\n \n \n \n \n\n\n \n da Rosa, T. R.; Guindani, G. M.; de O. Cardoso, D.; Calazans, N. L. V.; and Moraes, F. G.\n\n\n \n\n\n\n In Cavalcanti, A. C.; Melcher, E. U. K.; and Becker, J., editor(s),
24th Symposium on Integrated Circuits and Systems Design, SBCCI '11, João Pessoa, Brazil, August 30 - September 2, 2011, pages 203–208, 2011. ACM\n
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@inproceedings{DBLP:conf/sbcci/RosaGCCM11,\n author = {Thiago R. da Rosa and\n Guilherme Montez Guindani and\n Douglas de O. Cardoso and\n Ney Laert Vilar Calazans and\n Fernando Gehm Moraes},\n editor = {Antonio Carlos Cavalcanti and\n Elmar U. K. Melcher and\n J{\\"{u}}rgen Becker},\n title = {A self-adaptable distributed {DFS} scheme for NoC-based MPSoCs},\n booktitle = {24th Symposium on Integrated Circuits and Systems Design, {SBCCI}\n '11, Jo{\\~{a}}o Pessoa, Brazil, August 30 - September 2, 2011},\n pages = {203--208},\n publisher = {{ACM}},\n year = {2011},\n url = {https://doi.org/10.1145/2020876.2020923},\n doi = {10.1145/2020876.2020923},\n timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},\n biburl = {https://dblp.org/rec/conf/sbcci/RosaGCCM11.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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\n\n \n \n \n \n \n \n Energy-efficient cache coherence protocol for NoC-based MPSoCs.\n \n \n \n \n\n\n \n Chaves, T. M.; Carara, E. A.; and Moraes, F. G.\n\n\n \n\n\n\n In Cavalcanti, A. C.; Melcher, E. U. K.; and Becker, J., editor(s),
24th Symposium on Integrated Circuits and Systems Design, SBCCI '11, João Pessoa, Brazil, August 30 - September 2, 2011, pages 215–220, 2011. ACM\n
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@inproceedings{DBLP:conf/sbcci/ChavesCM11,\n author = {Tales Marchesan Chaves and\n Everton Alceu Carara and\n Fernando Gehm Moraes},\n editor = {Antonio Carlos Cavalcanti and\n Elmar U. K. Melcher and\n J{\\"{u}}rgen Becker},\n title = {Energy-efficient cache coherence protocol for NoC-based MPSoCs},\n booktitle = {24th Symposium on Integrated Circuits and Systems Design, {SBCCI}\n '11, Jo{\\~{a}}o Pessoa, Brazil, August 30 - September 2, 2011},\n pages = {215--220},\n publisher = {{ACM}},\n year = {2011},\n url = {https://doi.org/10.1145/2020876.2020925},\n doi = {10.1145/2020876.2020925},\n timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},\n biburl = {https://dblp.org/rec/conf/sbcci/ChavesCM11.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n
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