2020 (1)
Intensifying Challenge Obfuscation by Cascading RO-PUFs for Random Number Generation (Conditionally Accepted). Chauhan, A., S.; Sahula, V.; Mandal, A., S.; and Dutta, A. In IEEE 33rd International Conference on VLSI Design (Bengaluru, INDIA), pages 6, 2020.
Intensifying Challenge Obfuscation by Cascading RO-PUFs for Random Number Generation (Conditionally Accepted) [pdf]Paper   bibtex
  2019 (4)
An In-Depth Study on Electrical and Hydrogen Sensing Characteristics of ZnO Thin Film with Radio Frequency Sputtered Gold Schottky Contacts. Rajan, L.; Periasamy, C.; and Sahula, V. IEEE Sensors Journal, 19(9): 1. 5 2019.
An In-Depth Study on Electrical and Hydrogen Sensing Characteristics of ZnO Thin Film with Radio Frequency Sputtered Gold Schottky Contacts [link]Website   bibtex   abstract
Energy Efficient Lightweight Cryptography Algorithms for IoT Devices (Accepted). Goyal, T.; Sahula, V.; and Kumawat, D. IETE Journal of Research, 66: 16. 2019.
Energy Efficient Lightweight Cryptography Algorithms for IoT Devices (Accepted) [pdf]Paper   Energy Efficient Lightweight Cryptography Algorithms for IoT Devices (Accepted) [link]Website   bibtex
Equipartitioning Frequency Groups & Randomized Placement for Enhanced Uniqueness and Robustness in an FPGA-ROPUF based Random Sequence Generator (in Review). Chauhan, A., S.; Sahula, V.; and Mandal, A., S. ACM Transactions on Reconfigurable Technology & Systems. 2019.
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Novel Randomized Placement For FPGA Based Robust ROPUF with Improved Uniqueness. Chauhan, A., S.; Sahula, V.; and Mandal, A., S. Springer's Journal of Electronic Testing: Theory and Applications, 35(5). 10 2019.
Novel Randomized Placement For FPGA Based Robust ROPUF with Improved Uniqueness [pdf]Paper   Novel Randomized Placement For FPGA Based Robust ROPUF with Improved Uniqueness [link]Website   bibtex
  2018 (7)
Energy Efficient Lightweight Cryptography Algorithms for IoT Devices. Goyal, Tarun Kumar; Sahula, Vineet; Kumawat, D. IETE Journal of Research, (Submitted). 2018.
Energy Efficient Lightweight Cryptography Algorithms for IoT Devices [pdf]Paper   bibtex
Novel Variability Aware Path Selection for Self-Referencing Based Hardware Trojan Detection. Ramakrishna, V.; Bhargava, L.; and Sahula, V. In 31st IEEE International Conference on VLSI Design, volume 2018-Janua, 2018.
Novel Variability Aware Path Selection for Self-Referencing Based Hardware Trojan Detection [pdf]Paper   bibtex   abstract
Neural Machine Translation for English to Hindi. Saini, S.; and Sahula, V. In 2018 FOURTH IEEE INTERNATIONAL CONFERENCE ON INFORMATION RETRIEVAL AND KNOWLEDGE MANAGEMENT (CAMP), 2018.
Neural Machine Translation for English to Hindi [pdf]Paper   bibtex
Low power Lightweight cryptosystems for Internet of Things Devices. Goyal, T., K.; and Sahula, V. In IEEE 31st International Conference on VLSI Design (and 17th International Conference on Embedded Systems), pages Pune--INDIA, 2018.
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Spatial Biasing For Realizing Highly Reliable Physical Unclonable Functions on FPGA. Chauhan, A., S.; and Sahula, V. In IEEE International Conference on Electronics, Computing and Communications, IC-CONECCT, pages 1-6, 2018.
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Sequential Adaptive Memory Model based English-Hindi Machine Translation System. Sandeep Saini, V., S. IEEE Transaction on Cognitive Development Systems, (Submitted): 1-10. 2018.
Sequential Adaptive Memory Model based English-Hindi Machine Translation System [pdf]Paper   bibtex
Language Learnability Analysis of Hindi: A Comparison with Ideal and Constrained Learning Approaches. Saini, S.; and Sahula, V. Spriner's Journal of Psycholinguistic Research. 2018.
Language Learnability Analysis of Hindi: A Comparison with Ideal and Constrained Learning Approaches [pdf]Paper   Language Learnability Analysis of Hindi: A Comparison with Ideal and Constrained Learning Approaches [link]Website   bibtex
  2017 (2)
If-Conversion To Reduce Worst Case Execution Time. Ghosh, S., N.; Bhargava, L.; and Sahula, V. In 23rd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, pages 1-2, 2017.
If-Conversion To Reduce Worst Case Execution Time [pdf]Paper   bibtex
An Investigation on Electrical and Hydrogen Sensing Characteristics of RF Sputtered ZnO Thin-Film with Palladium Schottky Contacts. Rajan, L.; Chinnamuthan, P.; Krishnasamy, V.; and Sahula, V. IEEE Sensors Journal, 17(1): 14-21. 2017.
An Investigation on Electrical and Hydrogen Sensing Characteristics of RF Sputtered ZnO Thin-Film with Palladium Schottky Contacts [pdf]Paper   bibtex   abstract
  2016 (8)
Accurate and efficient Estimation of Dynamic Virtual Ground Voltage in Power Gated Circuits. Garg, L.; and Sahula, V. In 29th IEEE/ACM International Conference on VLSI Design, 2016. IEEE Computer Society
Accurate and efficient Estimation of Dynamic Virtual Ground Voltage in Power Gated Circuits [pdf]Paper   bibtex
Comprehensive Study on Electrical and Hydrogen Gas Sensing Characteristics of Pt/ZnO Thin Film Based Schottky Diodes Grown on n-Si Substrates by RF sputtering. Rajan, L.; Periasamy, C.; and Sahula, V. IEEE Transactions on Nanotechnology, PP(99): 1-1. 2016.
Comprehensive Study on Electrical and Hydrogen Gas Sensing Characteristics of Pt/ZnO Thin Film Based Schottky Diodes Grown on n-Si Substrates by RF sputtering [pdf]Paper   Comprehensive Study on Electrical and Hydrogen Gas Sensing Characteristics of Pt/ZnO Thin Film Based Schottky Diodes Grown on n-Si Substrates by RF sputtering [link]Website   bibtex   abstract
Golden IC free Methodology for Hardware Trojan Detection using Symmetric Path Delays. Vaikuntapu, Ramakrishna; Bhargava, Lava; Sahula, V. In IEEE VLSI Design & Test Symposium, 2016. IEEE
Golden IC free Methodology for Hardware Trojan Detection using Symmetric Path Delays [pdf]Paper   bibtex   abstract
Bayesian learner based language learnability analysis of Hindi. Sandeep Saini, V., S. In 5th IEEE International Conference on Advances in Computing, Communications and Informatics (ICACCI), 2016.
Bayesian learner based language learnability analysis of Hindi [pdf]Paper   Bayesian learner based language learnability analysis of Hindi [link]Website   bibtex
Lightweight security algorithm for low power IoT devices. Goyal, T.; and Sahula, V. In 5th IEEE International Conference on Advances in Computing, Communications and Informatics, 2016.
Lightweight security algorithm for low power IoT devices [pdf]Paper   bibtex   abstract
Structural and optical characteristics of RF sputtered ZnO thinfilm on Si substrate for device applications. Rajan, L.; Periasamy, C.; and Sahula, V. In 12th IEEE International Conference Electronics, Energy, Environment, Communication, Computer, Control: (E3-C3), INDICON 2015, 2016.
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Influence of Temperature on the Sensitivity of ZnO-Based MEMS Acoustic Sensor. Prasad, M.; Sahula, V.; and Khanna, V., K., V. Sensor Letters, 14(2): 122-126. 2016.
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Electrical Characterization of Au/ZnO Thin Film Schottky diode on silicon substrate. Rajan, L.; Periasamy, C.; and Sahula, V. Elsevier's Perspectives in Science, Science Direct, 8: 66-68. 2016.
Electrical Characterization of Au/ZnO Thin Film Schottky diode on silicon substrate [pdf]Paper   Electrical Characterization of Au/ZnO Thin Film Schottky diode on silicon substrate [link]Website   bibtex   abstract
  2015 (9)
Macromodels for Static Virtual Ground Voltage Estimation in Power Gated Circuits. Garg, L.; and Sahula, V. IEEE Transactions on Circuits and Systems II: Express Briefs, PP(99): 1-1. 2015.
Macromodels for Static Virtual Ground Voltage Estimation in Power Gated Circuits [pdf]Paper   Macromodels for Static Virtual Ground Voltage Estimation in Power Gated Circuits [link]Website   bibtex   abstract
Modeling and synthesis of molecular memory. Kumawat, R.; Sahula, V.; and Gaur, M., S. In 2015 19th International Symposium on VLSI Design and Test, pages 1-2, 6 2015. IEEE
Modeling and synthesis of molecular memory [pdf]Paper   Modeling and synthesis of molecular memory [link]Website   bibtex   abstract
Relative clause based text simplification for improved English to Hindi translation. Saini, S.; Sehgal, U.; and Sahula, V. In 2015 International Conference on Advances in Computing, Communications and Informatics (ICACCI), pages 1479-1484, 8 2015. IEEE
Relative clause based text simplification for improved English to Hindi translation [pdf]Paper   Relative clause based text simplification for improved English to Hindi translation [link]Website   bibtex   abstract
A Survey of Machine Translation Techniques and Systems for Indian Languages. Saini, S.; and Sahula, V. In 2015 IEEE International Conference on Computational Intelligence & Communication Technology, pages 676-681, 2 2015. IEEE
A Survey of Machine Translation Techniques and Systems for Indian Languages [pdf]Paper   A Survey of Machine Translation Techniques and Systems for Indian Languages [link]Website   bibtex   abstract
Cognitive Aspects in Relating Second Language Acquisition as a Language Translation Process. Saini, S., (., J., a.; and Sahula, V. In 3rd International Conference on Cognition, Brain and Computation 2015, 2015.
Cognitive Aspects in Relating Second Language Acquisition as a Language Translation Process [pdf]Paper   bibtex
Modeling and Synthesis of Molecular Memory. KUMAWAT, RENU ; SAHULA, Vineet; Gaur, M., S. In VLSI Design & Test Symposium, 2015.
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High Density Impulsive Noise Removal Using Decision Based Iterated Conditional Modes. Chauhan, A., S.; and Sahula, V. In IEEE International Conference on Signal Processing, Computing and Control, ISPCC 2015, 2015.
High Density Impulsive Noise Removal Using Decision Based Iterated Conditional Modes [link]Website   bibtex
Probabilistic model for nanocell reliability evaluation in presence of transient errors. Kumawat, R.; Sahula, V.; and Gaur, M., S. IET Computers & Digital Techniques, 9(4): 213-220. 7 2015.
Probabilistic model for nanocell reliability evaluation in presence of transient errors [pdf]Paper   Probabilistic model for nanocell reliability evaluation in presence of transient errors [link]Website   bibtex   abstract
Probabilistic model for nanocell reliability evaluation in presence of transient errors. Kumawat, R.; Sahula, V.; and Gaur, M., S. IET Computers & Digital Techniques, 9(4): 213-220. 7 2015.
Probabilistic model for nanocell reliability evaluation in presence of transient errors [pdf]Paper   Probabilistic model for nanocell reliability evaluation in presence of transient errors [link]Website   bibtex   abstract
  2014 (7)
Probabilistic Modeling and Analysis of Molecular Memory. Kumawat, R.; Sahula, V.; and Gaur, M., S. ACM Journal on Emerging Technology for Computer Systems. 2014.
Probabilistic Modeling and Analysis of Molecular Memory [pdf]Paper   bibtex
Hybrid image fusion scheme using self-fractional Fourier functions and multivariate empirical mode decomposition. Sharma, J., B.; Sharma, K., K.; and Sahula, V. Signal Processing, 100: 146-159. 2014.
Hybrid image fusion scheme using self-fractional Fourier functions and multivariate empirical mode decomposition [pdf]Paper   bibtex   abstract
Quick Estimation of Rectangular Patch Antenna Dimensions Based on Equivalent Design Concept. Mathur, D.; Bhatnagar, S., K.; and Sahula, V. Antennas and Wireless Propagation Letters, IEEE, PP(99): 1. 2014.
Quick Estimation of Rectangular Patch Antenna Dimensions Based on Equivalent Design Concept [pdf]Paper   bibtex   abstract
ZnO Etching and Microtunnel Fabrication for High-Reliability MEMS Acoustic Sensor. Prasad, M.; Sahula, V.; and Khanna, V., K. IEEE Transactions on Device and Materials Reliability, 14(1): 545-554. 3 2014.
ZnO Etching and Microtunnel Fabrication for High-Reliability MEMS Acoustic Sensor [pdf]Paper   ZnO Etching and Microtunnel Fabrication for High-Reliability MEMS Acoustic Sensor [link]Website   bibtex   abstract
Long-Term Effects of Relative Humidity on the Performance of ZnO-Based MEMS Acoustic Sensors. Prasad, M.; Sahula, V.; and Khanna, V. IEEE Transactions on Device and Materials Reliability, 14(2): 778-780. 6 2014.
Long-Term Effects of Relative Humidity on the Performance of ZnO-Based MEMS Acoustic Sensors [link]Website   bibtex   abstract
Quick Estimation of Rectangular Patch Antenna Dimensions Based on Equivalent Design Concept. Mathur, D.; Bhatnagar, S., K.; and Sahula, V. Antennas and Wireless Propagation Letters, IEEE, 13(99): 1469-1472. 2014.
Quick Estimation of Rectangular Patch Antenna Dimensions Based on Equivalent Design Concept [pdf]Paper   Quick Estimation of Rectangular Patch Antenna Dimensions Based on Equivalent Design Concept [link]Website   bibtex   abstract
Long-Term Effects of Relative Humidity on the Performance of ZnO-Based MEMS Acoustic Sensors. Prasad, M.; Sahula, V.; and Khanna, V. IEEE Transactions on Device and Materials Reliability, 14(2): 778-780. 6 2014.
Long-Term Effects of Relative Humidity on the Performance of ZnO-Based MEMS Acoustic Sensors [pdf]Paper   Long-Term Effects of Relative Humidity on the Performance of ZnO-Based MEMS Acoustic Sensors [link]Website   bibtex   abstract
  2013 (15)
A Weakly Fault Tolerant Design of Molecular Memory Cell. Kumawat, R.; Sahula, V.; and Gaur, M., S. In 4th IEEE International Workshop on Reliability Aware System Design and Test (RASDAT), pages 1-4, 2013.
A Weakly Fault Tolerant Design of Molecular Memory Cell [pdf]Paper   bibtex
Application of Concept Algebra in making inferences and role of Machine Learning. Lintu, R.; and Sahula, V. In Workshop on Computational Intelligence & TAFD, 2013.
Application of Concept Algebra in making inferences and role of Machine Learning [pdf]Paper   bibtex
ZnO etching and microtunnel fabrication for high-reliability MEMS acoustic sensor. PRASAD, M.; Sahula, V.; and Khanna, V. IEEE Transactions on Device and Materials Reliability, (Digital Object Identifier: 10.1109/TDMR.2013.22712). 2013.
ZnO etching and microtunnel fabrication for high-reliability MEMS acoustic sensor [pdf]Paper   bibtex
Features classification using geometrical deformation feature vector of support vector machine and active appearance algorithm for automatic facial expression recognition. Patil R. A.; Sahula V.; and Mandal, A., S. Springer's Journal of Machine Vision and Application, Early Acce. 2013.
Features classification using geometrical deformation feature vector of support vector machine and active appearance algorithm for automatic facial expression recognition [pdf]Paper   bibtex
Design and fabrication of Si-diaphragm for ZnO-based MEMS acoustic sensor. Prasad, M.; Sahula, V.; and Khanna, V., K. In 17th International Symposium on VLSI Design and Test, 2013, 2013.
Design and fabrication of Si-diaphragm for ZnO-based MEMS acoustic sensor [pdf]Paper   bibtex
Reliable circuit analysis and design using nanoscale devices. Kumawat, R.; Sahula, V.; and Gaur, M., S. In International Conference on Communication and Electronics System Design, pages 87602C--87602C, 2013. SPIE
Reliable circuit analysis and design using nanoscale devices [pdf]Paper   bibtex
Digital image dual watermarking using self-fractional fourier functions, bivariate empirical mode decomposition and error correcting code. Sharma, J., B.; Sharma, K., K.; and Sahula, V. Journal of Optics,1-14. 2013.
Digital image dual watermarking using self-fractional fourier functions, bivariate empirical mode decomposition and error correcting code [pdf]Paper   bibtex
Efficient CMOS subthreshold leakage analysis with improved stack based models in presence of parameter variations. Garg, L.; and Sahula, V. IET Electronic Letters, 49(10). 2013.
Efficient CMOS subthreshold leakage analysis with improved stack based models in presence of parameter variations [pdf]Paper   bibtex
Zinc Oxide deposition and etching for MEMS acoustic sensor. Prasad, M.; Sahula, V., (., J.; and Khanna, V., K. In Journal of Sensor Techniques & Applications, 2013.
Zinc Oxide deposition and etching for MEMS acoustic sensor [pdf]Paper   bibtex
Energy Aware Task Scheduling for Soft Real Time Systems using an Analytical Approach for Energy Estimation. Sharma, N.; Sahula, V.; and Ravikumar, C., P. International Journal of Advanced Studies in Computers, Science and Engineering (IJASCSE), abs/1303.0: 12. 2013.
Energy Aware Task Scheduling for Soft Real Time Systems using an Analytical Approach for Energy Estimation [pdf]Paper   Energy Aware Task Scheduling for Soft Real Time Systems using an Analytical Approach for Energy Estimation [link]Website   bibtex   abstract
Efficient CMOS subthreshold leakage analysis with improved stack based models in presence of parameter variations. Garg, L.; and Sahula, V. IET Electronic Letters, 49(10): 644-646. 5 2013.
Efficient CMOS subthreshold leakage analysis with improved stack based models in presence of parameter variations [pdf]Paper   Efficient CMOS subthreshold leakage analysis with improved stack based models in presence of parameter variations [link]Website   bibtex   abstract
Design and fabrication of Si-diaphragm, ZnO piezoelectric film-based MEMS acoustic sensor using SOI wafers. Prasad, M.; Sahula, V.; and Khanna, V., K. IEEE Transactions on Semiconductor Manufacturing, 26(2): 233-241. 5 2013.
Design and fabrication of Si-diaphragm, ZnO piezoelectric film-based MEMS acoustic sensor using SOI wafers [pdf]Paper   Design and fabrication of Si-diaphragm, ZnO piezoelectric film-based MEMS acoustic sensor using SOI wafers [link]Website   bibtex   abstract
Probabilistic Modeling Approaches for Nanoscale Devices. Kumawat, R.; Sahula, V.; and Gaur, M., S. In IEEE International conference on circuit, power and computing technologies ICCPCT-2013, pages 720-724, 3 2013. IEEE
Probabilistic Modeling Approaches for Nanoscale Devices [pdf]Paper   Probabilistic Modeling Approaches for Nanoscale Devices [link]Website   bibtex   abstract
Process Variation Tolerant SRAM Design for Ultra Low Power Applications. Cherukat, S.; and Sahula, V. In 17th International Symposium on VLSI Design and Test, 2013, volume 382 CCIS, pages 242-248, 2013.
Process Variation Tolerant SRAM Design for Ultra Low Power Applications [pdf]Paper   bibtex   abstract
  2012 (11)
Design and simulation of Pt-based microhotplate, and fabrication of suspended dielectric membrane by bulk micromachining. Prasad, M.; and Yadav, R. … on Physics of …,3-4. 2012.
Design and simulation of Pt-based microhotplate, and fabrication of suspended dielectric membrane by bulk micromachining [pdf]Paper   Design and simulation of Pt-based microhotplate, and fabrication of suspended dielectric membrane by bulk micromachining [link]Website   bibtex
Variability aware SVM macromodel based design centering of analog circuits. Boolchandani, D.; Garg, L.; Khandelwal, S.; and Sahula, V. Analog Integrated Circuits and Signal Processing, 73(1): 77-87. 2012.
Variability aware SVM macromodel based design centering of analog circuits [pdf]Paper   bibtex
Features classification using support vector machine for a facial expression recognition system. Patil, R., A.; Sahula, V.; and Mandal, A., S. Journal of Electronic Imaging, 21(4): 43001-43003. 2012.
Features classification using support vector machine for a facial expression recognition system [pdf]Paper   bibtex
Energy Aware Task Scheduling for Soft Real Time Systems using an Analytical Approach for Energy Estimation. Sharma, N.; Sahula, V.; and Ravikumar, C., P. International Journal of Advanced Studies in Computers, Science and Engineering, 1(4): 33-39. 2012.
Energy Aware Task Scheduling for Soft Real Time Systems using an Analytical Approach for Energy Estimation [pdf]Paper   bibtex
Reliability Evaluation of Redundancy based Fault Tolerant Techniques at Nanoscale. Soni, M.; Kumawat, R.; Sahula, V.; and Gaur, M., S. In 3rd IEEE Workshop Reliability Aware System Design and Test, 2012.
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Design and mathematical model of a ZnO-based MEMS acoustic sensor. Prasad, M.; Yadav, R., P.; Sahula, V.; and Khanna, V., K. In 16th International Workshop on Physics of Semiconductor Devices, volume 8549, pages 85491D--1, 2012.
Design and mathematical model of a ZnO-based MEMS acoustic sensor [pdf]Paper   bibtex
Variability aware support vector machine based macromodels for statistical estimation of subthreshold leakage power. Garg, L.; and Sahula, V. In IEEE International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), pages 253-256, 9 2012. IEEE
Variability aware support vector machine based macromodels for statistical estimation of subthreshold leakage power [pdf]Paper   Variability aware support vector machine based macromodels for statistical estimation of subthreshold leakage power [link]Website   bibtex   abstract
Controlled Chemical Etching of ZnO Film for Step Coverage in MEMS Acoustic Sensor. Prasad, M.; Yadav, R., P.; Sahula, V.; Khanna, V., K.; and Shekhar, C. IEEE Journal of Microelectromechanical Systems, 21(3): 517-519. 6 2012.
Controlled Chemical Etching of ZnO Film for Step Coverage in MEMS Acoustic Sensor [pdf]Paper   Controlled Chemical Etching of ZnO Film for Step Coverage in MEMS Acoustic Sensor [link]Website   bibtex   abstract
Power Aware Hardware Prototyping of Multiclass SVM Classifier Through Reconfiguration. Patil, R., A.; Gupta, G.; Sahula, V.; and Mandal, A., S. In Proceedings of the IEEE International Conference on VLSI Design, pages 62-67, 1 2012. IEEE
Power Aware Hardware Prototyping of Multiclass SVM Classifier Through Reconfiguration [pdf]Paper   Power Aware Hardware Prototyping of Multiclass SVM Classifier Through Reconfiguration [link]Website   bibtex   abstract
Controlled chemical etching of ZnO film for step coverage in MEMS acoustic sensor. Microelectromechanical Systems, Journal of. 2012.
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FEM simulation of platinum-based microhotplate using different dielectric membranes for gas sensing applications. Prasad, M.; Yadav, R., P.; Sahula, V.; and Khanna, V., K. Sensor Review, 32(1): 59-65. 2012.
FEM simulation of platinum-based microhotplate using different dielectric membranes for gas sensing applications [pdf]Paper   bibtex   abstract
  2011 (11)
LTCC Technology for Wireless System in Package Architecture: Issues & Challenges. Mathur, D.; Bhatnagar, S., K.; and Sahula, V. In IMAPS System-level package workshop, 2011.
LTCC Technology for Wireless System in Package Architecture: Issues & Challenges [pdf]Paper   bibtex
Efficient kernel functions for support vector machine regression model for analog circuits’ performance evaluation. Boolchandani, D.; Ahmed, A.; and Sahula, V. Springer's Analog Integrated Circuits and Signal Processing, 66(1): 117-128. 2011.
Efficient kernel functions for support vector machine regression model for analog circuits’ performance evaluation [pdf]Paper   bibtex
A Novel Design and Mathematical Model for Sensitivity of a MEMS based Piezoelectric Acoustic Sensor. Prasad, M.; Bhateja, R.; Yadav, R., P.; Sahula, V.; and Khanna, V., K. International Journal of Applied Engineering Research, 6(18): 2211-2216. 2011.
A Novel Design and Mathematical Model for Sensitivity of a MEMS based Piezoelectric Acoustic Sensor [pdf]Paper   bibtex
Exploring Efficient Kernel Functions for Support Vector Machine Based Feasibility Models for Analog Circuits. Boolchandani, D.; and Sahula, V. Journal of Design, Analysis and Tools for Integrated Circuits and Systems (JDATICS), 1(1). 2011.
Exploring Efficient Kernel Functions for Support Vector Machine Based Feasibility Models for Analog Circuits [pdf]Paper   bibtex
Design and Simulation of Double-spiral Shape Micro-heater for Gas Sensing Applications. Mahanth Prasad R. P. Yadav, V., S.; and Khanna, V., K. Sensors & Transducers Journal, 129(6): 135-141. 2011.
Design and Simulation of Double-spiral Shape Micro-heater for Gas Sensing Applications [pdf]Paper   bibtex
Design and simulation of double-spiral shape micro-heater for gas sensing applications. Prasad, M.; Yadav, R.; Sahula, V.; and Khanna, V. Sensors and Transducers, 129(6): 135-141. 2011.
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Nondestructive method for measuring dielectric constant of sheet materials. Mathur, D.; Bhatnagar, S., K.; and Sahula, V. In TENCON 2011 - 2011 IEEE Region 10 Conference, pages 1105-1109, 11 2011. IEEE
Nondestructive method for measuring dielectric constant of sheet materials [pdf]Paper   Nondestructive method for measuring dielectric constant of sheet materials [link]Website   bibtex   abstract
Facial Expression Recognition in Image Sequences Using Active Shape Model and SVM. Patil, R., A.; Sahula, V.; and Mandal, A., S. In 2011 UKSim 5th European Symposium on Computer Modeling and Simulation, volume 0, pages 168-173, 11 2011. IEEE
Facial Expression Recognition in Image Sequences Using Active Shape Model and SVM [pdf]Paper   Facial Expression Recognition in Image Sequences Using Active Shape Model and SVM [link]Website   bibtex   abstract
Bayesian versus support vector machine based approaches for facial feature classification in image sequences. Patil, R., A.; Sahula, V.; and Mandal, A., S. In 2011 2nd International Conference on Computer and Communication Technology (ICCCT-2011), pages 174-179, 9 2011. Ieee
Bayesian versus support vector machine based approaches for facial feature classification in image sequences [pdf]Paper   Bayesian versus support vector machine based approaches for facial feature classification in image sequences [link]Website   bibtex   abstract
Automatic detection of facial feature points in image sequences. Patil, R., A.; Sahula, V.; and Mandal, A., S. In 2011 IEEE International Conference on Image Information Processing (ICIIP),, pages 1-5, 11 2011. IEEE
Automatic detection of facial feature points in image sequences [pdf]Paper   Automatic detection of facial feature points in image sequences [link]Website   bibtex   abstract
Improved sampling methodology for variability aware sizing of analog circuits. Lokesh Garg, D. Boolchandani, V., S. In National Conference on VLSI Design, 2011.
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  2010 (7)
Modeling and Reliability Evaluation of logic Circuits at Nanoscale. Kumawat, R.; Sahula, V., (., J.; Gaur, M., S.; and Laxmi, V. In 1st IEEE International Workshop on Reliability Aware System Design and Test, 2010.
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Performance evaluation of Arbitration schemes of bus-based communication architectures based on Interactive Generalized Semi Markov Process Model (IGSMP). Sahula, U., D.; and V. International Journal of Simulation- Systems, Science and Technology- IJSSST, 11(3). 2010.
Performance evaluation of Arbitration schemes of bus-based communication architectures based on Interactive Generalized Semi Markov Process Model (IGSMP) [pdf]Paper   bibtex
Stochastic Automata Network Based Approach for Performance Evaluation of Network-on-Chip Communication Architecture. Deshmukh, U.; and Sahula, V. In 2010 IEEE Computer Society Annual Symposium on VLSI, pages 351-356, 7 2010. IEEE
Stochastic Automata Network Based Approach for Performance Evaluation of Network-on-Chip Communication Architecture [pdf]Paper   Stochastic Automata Network Based Approach for Performance Evaluation of Network-on-Chip Communication Architecture [link]Website   bibtex   abstract
Variability aware yield optimal sizing of analog circuits using SVM-genetic approach. Boolchandani, D.; Garg, L.; Khandelwal, S.; and Sahula, V. In 2010 XIth IEEE International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD), pages 1-6, 10 2010. IEEE
Variability aware yield optimal sizing of analog circuits using SVM-genetic approach [pdf]Paper   Variability aware yield optimal sizing of analog circuits using SVM-genetic approach [link]Website   bibtex   abstract
Omnipotent and mortal training of a nanocell model to emulate the functionality of a logic gate. Jha, P., K.; and Sahula, V. In 2010 Annual IEEE India Conference (INDICON), pages 1-6, 12 2010. IEEE
Omnipotent and mortal training of a nanocell model to emulate the functionality of a logic gate [pdf]Paper   Omnipotent and mortal training of a nanocell model to emulate the functionality of a logic gate [link]Website   bibtex   abstract
Automatic recognition of facial expressions in image sequences: A review. Patil, R., A.; Sahula, V.; and Mandal, A., S. In 2010 5th International Conference on Industrial and Information Systems (ICIIS), pages 408-413, 7 2010. IEEE
Automatic recognition of facial expressions in image sequences: A review [pdf]Paper   Automatic recognition of facial expressions in image sequences: A review [link]Website   bibtex   abstract
Exploring Arbitration Schemes Of Soc Bus Architectures Using Interacting Generalized Semi Markov Process Model. International Journal of Simulation--Systems, Science & Technology. 2010.
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  2009 (4)
Analog circuit feasibility modeling using support vector machine with efficient kernel functions. Boolchandani, D.; Gupta, C.; and Sahula, V. Journal of Design, Analysis and Tools for Integrated Circuits and Systems (JDATICS), II. 2009.
Analog circuit feasibility modeling using support vector machine with efficient kernel functions [pdf]Paper   Analog circuit feasibility modeling using support vector machine with efficient kernel functions [link]Website   bibtex
LTCC: 3D Integration Multilayer Technology for Emerging Wireless Communication Micro-System Architectures. Mathur, D.; Bhatnagar, S., K.; and Sahula, V. In Indian Engineering Congress, 2009.
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Evaluating generalized semi Markov process model of SoC bus architectures using HCFG. Deshmukh, U.; and Sahula, V. In IEEE Region 10 Annual International Conference, Proceedings/TENCON, pages 1-6, 11 2009. IEEE
Evaluating generalized semi Markov process model of SoC bus architectures using HCFG [pdf]Paper   Evaluating generalized semi Markov process model of SoC bus architectures using HCFG [link]Website   bibtex   abstract
Multi-objective genetic approach for analog circuit sizing using SVM macro-model. Boolchandani, D.; Kumar, A.; and Sahula, V. In IEEE Region 10 Annual International Conference, Proceedings/TENCON, pages 1-6, 11 2009. IEEE
Multi-objective genetic approach for analog circuit sizing using SVM macro-model [pdf]Paper   Multi-objective genetic approach for analog circuit sizing using SVM macro-model [link]Website   bibtex   abstract
  2008 (8)
Improved support vector machine regression for analog circuits macromodeling using efficient kernel functions. Boolchandani, D.; Ahmed, A.; and Sahula, V. In Proceedings of IEEE international workshop on symbolic and numerical methods, modeling and applications to circuit design, pages 61-67, 2008.
Improved support vector machine regression for analog circuits macromodeling using efficient kernel functions [pdf]Paper   bibtex
Sizing of Analog Circuits using Support Vector Machine model. Boolchandan, D.; Ahmed, M., A.; and Sahula, V. In IE National Seminar on Advanced Electronic Systems- Modeling & Simulation (Verification), 2008.
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HCFG Approach for performance evaluation of SoC communication architecture. Deshmukh, U.; and Sahula, V. In 12th IEEE VLSI Design and Test Symposium, 2008.
HCFG Approach for performance evaluation of SoC communication architecture [pdf]Paper   bibtex
System Level Design & Verification: A Case Study of MPEG-2 Video Decoder. Samariya, S.; and Sahula, V. In IE National Seminar on Advanced Electronic Systems- Modeling & Simulation (Verification), 2008.
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Technologies for Microsystems beyond System-on-Chip. Mathur, D.; Bhatnagar, S., K.; and Sahula, V. In IE National Seminar on Advanced Electronic Systems- Modeling & Simulation (Verification), 2008.
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Interactive generalized semi Markov process model for evaluating arbitration schemes of SoC bus architectures. Deshmukh, U.; and Sahula, V. In Proceedings - EMS 2008, European Modelling Symposium, 2nd UKSim European Symposium on Computer Modelling and Simulation, pages 578-583, 9 2008. Ieee
Interactive generalized semi Markov process model for evaluating arbitration schemes of SoC bus architectures [pdf]Paper   Interactive generalized semi Markov process model for evaluating arbitration schemes of SoC bus architectures [link]Website   bibtex   abstract
Analytical performance estimation from GSMP model for hierarchical bus-bridge based SoC communication architecture. Deshmukh, U.; and Sahula, V. In Proceedings of the International Conference on Microelectronics, ICM, pages 155-158, 12 2008. IEEE
Analytical performance estimation from GSMP model for hierarchical bus-bridge based SoC communication architecture [pdf]Paper   Analytical performance estimation from GSMP model for hierarchical bus-bridge based SoC communication architecture [link]Website   bibtex   abstract
Stochastic Automata Network for Performance Evaluation of Heterogeneous SoC Communication. Deshmukh, U.; and Sahula, V. In Norchip - 26th Norchip Conference, Formal Proceedings, pages 208-211, 11 2008. IEEE
Stochastic Automata Network for Performance Evaluation of Heterogeneous SoC Communication [pdf]Paper   Stochastic Automata Network for Performance Evaluation of Heterogeneous SoC Communication [link]Website   bibtex   abstract
  2007 (2)
Stochastic Modeling approach for SoC Communication. Deshmukh, U.; and Sahula, V. In Symposium on Special functions & applications to Engineering Sciences, Jaipur, 16-17 Dec., 2007.
Stochastic Modeling approach for SoC Communication [pdf]Paper   bibtex
Stochastic modeling approaches for performance estimation of large electronic systems (VLSI systems). Deshmukh, U.; and Sahula, V. In Int. Conf. on Special Functions and their Applications in Engineering, 2007.
Stochastic modeling approaches for performance estimation of large electronic systems (VLSI systems) [pdf]Paper   bibtex
  2006 (3)
Using Model Checking for evaluation of arbitration schemes in IBM’s CoreConnect bus protocol. Mundra, A.; and Sahula, V. In Institute of Engineers (I) National Convention & Seminar on Advances in Electronics and Telecommunication: Vision 2020, Jaipur, 4-5 August, 2006.
Using Model Checking for evaluation of arbitration schemes in IBM’s CoreConnect bus protocol [pdf]Paper   bibtex
USB Bus architecture for ARM Processor based System-on-Chip (SoC) Communication. Singhal, A.; Deshmukh, U.; and Sahula, V. In Institute of Engineers (I) National Convention & Seminar on Advances in Electronics and Telecommunication: Vision 2020, Jaipur, 4-5 August, 2006.
USB Bus architecture for ARM Processor based System-on-Chip (SoC) Communication [pdf]Paper   bibtex
CROSS TALK AWARE MULTI-OBJECTIVE OPTIMAL ROUTING FOR ISLAND-STYLE FPGAs. Tiwari, R.; and Sahula, V. In 10th IEEE VLSI Design and Test Symposium, Goa, India, pages 1-9, 2006.
CROSS TALK AWARE MULTI-OBJECTIVE OPTIMAL ROUTING FOR ISLAND-STYLE FPGAs [pdf]Paper   bibtex
  2005 (1)
Challenges & Implications for VLSI Architectures for Multimedia Processing. Sahula, V. In IETE National Symposium on Mobile Handsets, Jaipur, April, 2005.
Challenges & Implications for VLSI Architectures for Multimedia Processing [pdf]Paper   bibtex
  2004 (2)
An Evaluation of March-based Testing Algorithms Using Switch Level Model of Bit-oriented SRAM. Rawat, I.; and Sahula, V. In 8th IEEE VLSI Design and Test Workshops, 2004.
An Evaluation of March-based Testing Algorithms Using Switch Level Model of Bit-oriented SRAM [pdf]Paper   bibtex
VLSI Curriculum in Indian Universities: An Analysis & Prescription. Sahula, V. In 8th IEEE VLSI Design and Test Workshops, 2004.
VLSI Curriculum in Indian Universities: An Analysis & Prescription [pdf]Paper   bibtex
  2003 (6)
VLSI CAD: Design Methodologies & algorithms. Sahula, V. In IETE Annual Zonal seminar on Electronic Design Automation: Issues & Challenges, Jaipur, May, 2003.
VLSI CAD: Design Methodologies & algorithms [pdf]Paper   bibtex
Optimizing ARM7 like Processor Architecture for Video Applications (Motion Estimation). Govind S., C., S.; and Sahula, V. In 7th IEEE VLSI Design and Test Workshops, 2003.
Optimizing ARM7 like Processor Architecture for Video Applications (Motion Estimation) [pdf]Paper   bibtex
A study of low power design techniques for ASIPs. Bhargava, M.; Bhargava, L.; and Sahula, V. In IETE Annual Zonal seminar on Electronic Design Automation: Issues & Challenges, Jaipur, May, 2003.
A study of low power design techniques for ASIPs [pdf]Paper   bibtex
On modeling of Chip Interconnects. Boolchandani, D.; and Sahula, V. In IETE Annual Zonal seminar on Electronic Design Automation: Issues & Challenges, Jaipur, May, 2003.
On modeling of Chip Interconnects [pdf]Paper   bibtex
BDDs applications into formal verification. Bali, B.; and Sahula, V. In IETE Annual Zonal seminar on Electronic Design Automation: Issues & Challenges, Jaipur, May, 2003.
BDDs applications into formal verification [pdf]Paper   bibtex
Output prediction based High performance CMOS logic: A comparative study. Tiwari, R.; and Sahula, V. In IETE Annual Zonal seminar on Electronic Design Automation: Issues & Challenges, Jaipur, May, 2003.
Output prediction based High performance CMOS logic: A comparative study [pdf]Paper   bibtex
  2002 (5)
Power Aware Characterization of Sequence of Input-Vectors for Standard-Cell based Digital circuits. Jain, P.; Boolchandani, D.; and Sahula, V. In 6th IEEE VLSI Design and Test Workshops, Bangalore, Aug., 2002.
Power Aware Characterization of Sequence of Input-Vectors for Standard-Cell based Digital circuits [pdf]Paper   bibtex
Formal Verification of Finite State Machines. Chandran, U.; Kuldeep, D.; and Sahula, V. In 6th IEEE VLSI Design and Test Workshops, 2002.
Formal Verification of Finite State Machines [pdf]Paper   bibtex
Layout Design of Cascode Current Mirror with Improved Current Mismatch. Dhawan, D.; Boolchandani, D.; and Sahula, V. In 6th IEEE VLSI Design and Test Workshops, Bangalore, Aug., 2002.
Layout Design of Cascode Current Mirror with Improved Current Mismatch [pdf]Paper   bibtex
On Evaluation of Parametric Yield for an Operational Transconductance Amplifier (OTA). Sharma, H., K.; Bhargava, L.; and Sahula, V. In 6th IEEE VLSI Design and Test Workshops, 2002.
On Evaluation of Parametric Yield for an Operational Transconductance Amplifier (OTA) [pdf]Paper   bibtex
Improvement of ASIC design processes. Sahula, V.; Ravikumar, C., P.; and Nagchoudhuri, D. In Proceedings of ASP-DAC/VLSI Design 2002. 7th Asia and South Pacific Design Automation Conference and 15h International Conference on VLSI Design, pages 105-110, 2002. IEEE Comput. Soc
Improvement of ASIC design processes [pdf]Paper   Improvement of ASIC design processes [link]Website   bibtex   abstract
  2001 (2)
Design methodologies for Design of Wireless Mobile Transceivers: A tutorial. Sahula, V.; Ravikumar, C., P.; and Nagchoudhuri, D. In IETE Annual seminar on Wireless Communications, Jaipur, May, 2001.
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The hierarchical concurrent flow graph approach for modeling and analysis of design processes. Sahula, V.; and Ravikumar, C. In Fourteenth IEEE International Conference on VLSI Design, pages 91-96, 2001. IEEE Comput. Soc
The hierarchical concurrent flow graph approach for modeling and analysis of design processes [link]Website   bibtex   abstract
  2000 (3)
Yield Oriented Design Planning for MCM based Systems. Sahula, V.; and Ravikumar, C., P. In IMAPS International conference on Emerging Microelectronics and Interconnection Technology, 2000.
Yield Oriented Design Planning for MCM based Systems [pdf]Paper   bibtex
Improving VLSI design processes using Hierarchical concurrent flow graph approach. Sahula, V.; and Ravikumar, C., P. In 4th IEEE VLSI Design and Test Workshops, 2000.
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Design planning for single chip implementation of digital wireless mobile transceiver. Sahula, V.; and Ravikumar, C. In 2000 IEEE International Conference on Personal Wireless Communications. Conference Proceedings (Cat. No.00TH8488), pages 19-23, 2000. IEEE
Design planning for single chip implementation of digital wireless mobile transceiver [pdf]Paper   Design planning for single chip implementation of digital wireless mobile transceiver [link]Website   bibtex   abstract
  1999 (1)
Extended Signal Flow Graph Technique for Concurrent VLSI Design Processes. Sahula, V.; and Ravikumar, C., P. In 3rd IEEE VLSI Design and Test Workshops, New Delhi, 1999.
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  1998 (2)
Optimal Interconnects: Modeling and Synthesis. Sahula, V.; Ravikumar, C., P.; and Nagchoudhuri, D. In IMAPS International conference on Emerging Microelectronics and Interconnection Technology, 1998.
Optimal Interconnects: Modeling and Synthesis [pdf]Paper   bibtex
VLSI Design Flow Management. Sahula, V.; Ravikumar, C., P.; and Nagchoudhuri, D. In 2nd IEEE VLSI Design and Test Workshops, New Delhi, 1998.
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  1995 (1)
Multi-valued Logic Function Minimization and Review of HW Implementation Techniques. Sahula, V.; and Nagchoudhuri, D. In Indian Science Congress, Jaipur, 1995.
Multi-valued Logic Function Minimization and Review of HW Implementation Techniques [pdf]Paper   bibtex
  undefined (2)
Probabilistic Modeling and Analysis of Nanocell based Molecular Memory. Renu Kumawat, Vineet Sahula, M., S., G. . .
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Graph Based Analytical Approach for Evaluation of Semi Markov Process Model for System-on-Chip Communication. Deshmukh, Ulhas; Sahula, V. . .
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