Spatio-temporal wafer-level correlation modeling with progressive sampling: A pathway to HVM yield estimation. Ahmadi, A., Huang, K., Natarajan, S., Jr., Carulli, J. M., & Makris, Y. In ITC, pages 1-10, 2014. IEEE Computer Society.
Spatio-temporal wafer-level correlation modeling with progressive sampling: A pathway to HVM yield estimation. [link]Link  Spatio-temporal wafer-level correlation modeling with progressive sampling: A pathway to HVM yield estimation. [link]Paper  bibtex   
@inproceedings{ conf/itc/AhmadiHNCM14,
  added-at = {2015-08-26T00:00:00.000+0200},
  author = {Ahmadi, Ali and Huang, Ke and Natarajan, Suriyaprakash and Jr., John M. Carulli and Makris, Yiorgos},
  biburl = {http://www.bibsonomy.org/bibtex/21f40891299a916342b2b343fffc9a75d/dblp},
  booktitle = {ITC},
  crossref = {conf/itc/2014},
  ee = {http://doi.ieeecomputersociety.org/10.1109/TEST.2014.7035325},
  interhash = {4eca81c6997aab94f92ed1541ff6c14c},
  intrahash = {1f40891299a916342b2b343fffc9a75d},
  isbn = {978-1-4799-4722-5},
  keywords = {dblp},
  pages = {1-10},
  publisher = {IEEE Computer Society},
  title = {Spatio-temporal wafer-level correlation modeling with progressive sampling: A pathway to HVM yield estimation.},
  url = {http://dblp.uni-trier.de/db/conf/itc/itc2014.html#AhmadiHNCM14},
  year = {2014}
}

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