Reachability analysis of nonlinear analog circuits through iterative reachable set reduction. Ahmadyan, S. N. & Vasudevan, S. In Design, Automation and Test in Europe, DATE 13, Grenoble, France, March 18-22, 2013, pages 1436–1441, 2013. EDA Consortium San Jose, CA, USA / ACM DL. Paper doi bibtex @inproceedings{DBLP:conf/date/AhmadyanV13,
author = {Seyed Nematollah Ahmadyan and
Shobha Vasudevan},
editor = {Enrico Macii},
title = {Reachability analysis of nonlinear analog circuits through iterative
reachable set reduction},
booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France,
March 18-22, 2013},
pages = {1436--1441},
publisher = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}},
year = {2013},
url = {https://doi.org/10.7873/DATE.2013.293},
doi = {10.7873/DATE.2013.293},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/AhmadyanV13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
Downloads: 0
{"_id":"zWGTxBMHhoqR3FAp6","bibbaseid":"ahmadyan-vasudevan-reachabilityanalysisofnonlinearanalogcircuitsthroughiterativereachablesetreduction-2013","author_short":["Ahmadyan, S. N.","Vasudevan, S."],"bibdata":{"bibtype":"inproceedings","type":"inproceedings","author":[{"firstnames":["Seyed","Nematollah"],"propositions":[],"lastnames":["Ahmadyan"],"suffixes":[]},{"firstnames":["Shobha"],"propositions":[],"lastnames":["Vasudevan"],"suffixes":[]}],"editor":[{"firstnames":["Enrico"],"propositions":[],"lastnames":["Macii"],"suffixes":[]}],"title":"Reachability analysis of nonlinear analog circuits through iterative reachable set reduction","booktitle":"Design, Automation and Test in Europe, DATE 13, Grenoble, France, March 18-22, 2013","pages":"1436–1441","publisher":"EDA Consortium San Jose, CA, USA / ACM DL","year":"2013","url":"https://doi.org/10.7873/DATE.2013.293","doi":"10.7873/DATE.2013.293","timestamp":"Tue, 23 May 2017 01:00:00 +0200","biburl":"https://dblp.org/rec/conf/date/AhmadyanV13.bib","bibsource":"dblp computer science bibliography, https://dblp.org","bibtex":"@inproceedings{DBLP:conf/date/AhmadyanV13,\n author = {Seyed Nematollah Ahmadyan and\n Shobha Vasudevan},\n editor = {Enrico Macii},\n title = {Reachability analysis of nonlinear analog circuits through iterative\n reachable set reduction},\n booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France,\n March 18-22, 2013},\n pages = {1436--1441},\n publisher = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}},\n year = {2013},\n url = {https://doi.org/10.7873/DATE.2013.293},\n doi = {10.7873/DATE.2013.293},\n timestamp = {Tue, 23 May 2017 01:00:00 +0200},\n biburl = {https://dblp.org/rec/conf/date/AhmadyanV13.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n","author_short":["Ahmadyan, S. N.","Vasudevan, S."],"editor_short":["Macii, E."],"key":"DBLP:conf/date/AhmadyanV13","id":"DBLP:conf/date/AhmadyanV13","bibbaseid":"ahmadyan-vasudevan-reachabilityanalysisofnonlinearanalogcircuitsthroughiterativereachablesetreduction-2013","role":"author","urls":{"Paper":"https://doi.org/10.7873/DATE.2013.293"},"metadata":{"authorlinks":{}}},"bibtype":"inproceedings","biburl":"https://dblp.org/pid/70/5718.bib","dataSources":["W78kunfpG8FDG5szo"],"keywords":[],"search_terms":["reachability","analysis","nonlinear","analog","circuits","through","iterative","reachable","set","reduction","ahmadyan","vasudevan"],"title":"Reachability analysis of nonlinear analog circuits through iterative reachable set reduction","year":2013}