RIJID: Random Code Injection to Mask Power Analysis based Side Channel Attacks. Ambrose, Angelo, J., Ragel, R., & Parameswaran, S. In Design Automation Conference (DAC '07), pages 6pp, San Diego, Ca, USA, 2007.
abstract   bibtex   
Side channel attacks are becoming a major threat to the security of embedded systems. Countermeasures proposed to overcome Simple Power Analysis and Differential Power Analysis, are data masking, table masking, current flattening, circuitry level solutions, dummy instruction insertions and balancing bit-flips. All these techniques are either susceptible to multi-order side channel attacks, not sufficiently generic to cover all encryption algorithms, or burden the system with high area cost, run-time or energy consumption. A HW/SW based randomized instruction injection technique is proposed in this paper to overcome the pitfalls of previous countermeasures. Our technique injects random instructions at random places during the execution of an application which protects the system from both SPA and DPA. Further, we devise a systematic method to measure the security level of a power sequence and use it to measure the number of random instructions needed, to suitably confuse the adversary. Our processor model costs 1.9% in additional area for a simplescalar processor, and costs on average 29.8% in runtime and 27.1% in additional energy consumption for six industry standard cryptographic algorithms.
@inproceedings{ Jude07,
  author = {Ambrose, Jude Angelo and Ragel, Roshan and Parameswaran, Sri},
  title = {RIJID: Random Code Injection to Mask Power Analysis based Side Channel
	Attacks},
  booktitle = {Design Automation Conference (DAC '07)},
  year = {2007},
  pages = {6pp},
  address = {San Diego, Ca, USA},
  abstract = {Side channel attacks are becoming a major threat to the security of
	embedded systems. Countermeasures proposed to overcome Simple Power
	Analysis and Differential Power Analysis, are data masking, table
	masking, current flattening, circuitry level solutions, dummy instruction
	insertions and balancing bit-flips. All these techniques are either
	susceptible to multi-order side channel attacks, not sufficiently
	generic to cover all encryption algorithms, or burden the system
	with high area cost, run-time or energy consumption. 
	
	 A HW/SW based randomized instruction injection technique is proposed
	in this paper to overcome the pitfalls of previous countermeasures.
	Our technique injects random instructions at random places during
	the execution of an application which protects the system from both
	SPA and DPA. Further, we devise a systematic method to measure the
	security level of a power sequence and use it to measure the number
	of random instructions needed, to suitably confuse the adversary.
	Our processor model costs 1.9% in additional area for a simplescalar
	processor, and costs on average 29.8% in runtime and 27.1% in additional
	energy consumption for six industry standard cryptographic algorithms.},
  pdf = {http://www.cse.unsw.edu.au/~sridevan/index_files/Paper_1101_abstract_321_0.pdf }
}

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