MUTE-AES: a multiprocessor architecture to prevent power analysis based side channel attack of the AES algorithm. Ambrose, J. A., Parameswaran, S., & Ignjatovic, A. In Nassif, S. R. & Roychowdhury, J. S., editors, 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pages 678–684, 2008. IEEE Computer Society.
MUTE-AES: a multiprocessor architecture to prevent power analysis based side channel attack of the AES algorithm [link]Paper  doi  bibtex   
@inproceedings{DBLP:conf/iccad/AmbrosePI08,
  author    = {Jude Angelo Ambrose and
               Sri Parameswaran and
               Aleksandar Ignjatovic},
  editor    = {Sani R. Nassif and
               Jaijeet S. Roychowdhury},
  title     = {{MUTE-AES:} a multiprocessor architecture to prevent power analysis
               based side channel attack of the {AES} algorithm},
  booktitle = {2008 International Conference on Computer-Aided Design, {ICCAD} 2008,
               San Jose, CA, USA, November 10-13, 2008},
  pages     = {678--684},
  publisher = {{IEEE} Computer Society},
  year      = {2008},
  url       = {https://doi.org/10.1109/ICCAD.2008.4681650},
  doi       = {10.1109/ICCAD.2008.4681650},
  timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/iccad/AmbrosePI08.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

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