DfT for the Reuse of Networks-on-Chip as Test Access Mechanism. Amory, A. M., Ferlini, F., Lubaszewski, M., & Moraes, F. G. In 25th IEEE VLSI Test Symposium (VTS 2007), 6-10 May 2007, Berkeley, California, USA, pages 435–440, 2007.
DfT for the Reuse of Networks-on-Chip as Test Access Mechanism [link]Paper  doi  bibtex   
@inproceedings{DBLP:conf/vts/AmoryFLM07,
  author    = {Alexandre M. Amory and
               Frederico Ferlini and
               Marcelo Lubaszewski and
               Fernando  Gehm Moraes},
  title     = {DfT for the Reuse of Networks-on-Chip as Test Access Mechanism},
  booktitle = {25th {IEEE} {VLSI} Test Symposium {(VTS} 2007), 6-10 May 2007, Berkeley,
               California, {USA}},
  pages     = {435--440},
  year      = {2007},
  crossref  = {DBLP:conf/vts/2007},
  url       = {http://dx.doi.org/10.1109/VTS.2007.26},
  doi       = {10.1109/VTS.2007.26},
  timestamp = {Wed, 05 Nov 2014 16:44:47 +0100},
  biburl    = {http://dblp.uni-trier.de/rec/bib/conf/vts/AmoryFLM07},
  bibsource = {dblp computer science bibliography, http://dblp.org},
  keywords  = {noc,testing}
}

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