DfT for the Reuse of Networks-on-Chip as Test Access Mechanism

DfT for the Reuse of Networks-on-Chip as Test Access Mechanism. Amory, A. M., Ferlini, F., Lubaszewski, M., & Moraes, F. In 25th IEEE VLSI Test Symposium (VTS 2007), 6-10 May 2007, Berkeley, California, USA, pages 435–440, 2007. IEEE Computer Society.

Paper doi bibtex

@inproceedings{DBLP:conf/vts/AmoryFLM07,
  author       = {Alexandre M. Amory and
                  Frederico Ferlini and
                  Marcelo Lubaszewski and
                  Fernando Moraes},
  title        = {DfT for the Reuse of Networks-on-Chip as Test Access Mechanism},
  booktitle    = {25th {IEEE} {VLSI} Test Symposium {(VTS} 2007), 6-10 May 2007, Berkeley,
                  California, {USA}},
  pages        = {435--440},
  publisher    = {{IEEE} Computer Society},
  year         = {2007},
  url          = {https://doi.org/10.1109/VTS.2007.26},
  doi          = {10.1109/VTS.2007.26},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vts/AmoryFLM07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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{"_id":"Z3PZApThPZPJYQfvq","bibbaseid":"amory-ferlini-lubaszewski-moraes-dftforthereuseofnetworksonchipastestaccessmechanism-2007","downloads":0,"creationDate":"2016-08-26T18:21:53.450Z","title":"DfT for the Reuse of Networks-on-Chip as Test Access Mechanism","author_short":["Amory, A. M.","Ferlini, F.","Lubaszewski, M.","Moraes, F."],"year":2007,"bibtype":"inproceedings","biburl":"https://dblp.org/pid/m/FernandoGehmMoraes.bib","bibdata":{"bibtype":"inproceedings","type":"inproceedings","author":[{"firstnames":["Alexandre","M."],"propositions":[],"lastnames":["Amory"],"suffixes":[]},{"firstnames":["Frederico"],"propositions":[],"lastnames":["Ferlini"],"suffixes":[]},{"firstnames":["Marcelo"],"propositions":[],"lastnames":["Lubaszewski"],"suffixes":[]},{"firstnames":["Fernando"],"propositions":[],"lastnames":["Moraes"],"suffixes":[]}],"title":"DfT for the Reuse of Networks-on-Chip as Test Access Mechanism","booktitle":"25th IEEE VLSI Test Symposium (VTS 2007), 6-10 May 2007, Berkeley, California, USA","pages":"435–440","publisher":"IEEE Computer Society","year":"2007","url":"https://doi.org/10.1109/VTS.2007.26","doi":"10.1109/VTS.2007.26","timestamp":"Fri, 24 Mar 2023 00:00:00 +0100","biburl":"https://dblp.org/rec/conf/vts/AmoryFLM07.bib","bibsource":"dblp computer science bibliography, https://dblp.org","bibtex":"@inproceedings{DBLP:conf/vts/AmoryFLM07,\n author = {Alexandre M. Amory and\n Frederico Ferlini and\n Marcelo Lubaszewski and\n Fernando Moraes},\n title = {DfT for the Reuse of Networks-on-Chip as Test Access Mechanism},\n booktitle = {25th {IEEE} {VLSI} Test Symposium {(VTS} 2007), 6-10 May 2007, Berkeley,\n California, {USA}},\n pages = {435--440},\n publisher = {{IEEE} Computer Society},\n year = {2007},\n url = {https://doi.org/10.1109/VTS.2007.26},\n doi = {10.1109/VTS.2007.26},\n timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},\n biburl = {https://dblp.org/rec/conf/vts/AmoryFLM07.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n","author_short":["Amory, A. M.","Ferlini, F.","Lubaszewski, M.","Moraes, F."],"key":"DBLP:conf/vts/AmoryFLM07","id":"DBLP:conf/vts/AmoryFLM07","bibbaseid":"amory-ferlini-lubaszewski-moraes-dftforthereuseofnetworksonchipastestaccessmechanism-2007","role":"author","urls":{"Paper":"https://doi.org/10.1109/VTS.2007.26"},"metadata":{"authorlinks":{"amory, a":"https://amamory.github.io/research/pub.html","moraes, f":"https://fgmoraes.github.io/frames/pub_bibbase.html"}},"downloads":0},"search_terms":["dft","reuse","networks","chip","test","access","mechanism","amory","ferlini","lubaszewski","moraes"],"keywords":[],"authorIDs":["57c091645abfdd4d54000320","NPvGiXycNumKM5EF4","aZmE7qmCtnswuExac"],"dataSources":["iPiqqxPye3Nc7QBGs","pEib8arMvtjpTWFyZ","zyfHk33kC8cfNu3vx","ZnKvBZN9FDvFao2cx","WSHz5SBkJZfKc2YAB","CZjH9DaszPZg8XTvs"]}