Low-power bandgap references featuring DTMOSTs. Annema, A. J. IEEE Journal of Solid-State Circuits, 34(7):949–955, July, 1999. doi abstract bibtex This paper describes two CMOS bandgap reference circuits featuring dynamic-threshold MOS transistors. The first bandgap reference circuit aims at application in low-voltage, low-power ICs that tolerate medium accuracy. The circuit runs at supply voltages down to 0.85 V while consuming only 1 μW; the die area is 0.063 mm2 in a standard digital 0.35-μm CMOS process. The second bandgap reference circuit aims at high accuracy operation (σ=0.3%) without trimming. It consumes approximately 5 μW from a 1.8-V supply voltage and occupies 0.06 mm2 in a standard 0.35-μm CMOS process
@article{annema_low-power_1999,
title = {Low-power bandgap references featuring {DTMOSTs}},
volume = {34},
issn = {0018-9200},
doi = {10.1109/4.772409},
abstract = {This paper describes two CMOS bandgap reference circuits featuring dynamic-threshold MOS transistors. The first bandgap reference circuit aims at application in low-voltage, low-power ICs that tolerate medium accuracy. The circuit runs at supply voltages down to 0.85 V while consuming only 1 μW; the die area is 0.063 mm2 in a standard digital 0.35-μm CMOS process. The second bandgap reference circuit aims at high accuracy operation (σ=0.3\%) without trimming. It consumes approximately 5 μW from a 1.8-V supply voltage and occupies 0.06 mm2 in a standard 0.35-μm CMOS process},
number = {7},
journal = {IEEE Journal of Solid-State Circuits},
author = {Annema, A. J.},
month = jul,
year = {1999},
pages = {949--955}
}
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