Von Neumann architecture. September, 2014. Page Version ID: 623855849![Von Neumann architecture [link]](https://bibbase.org/img/filetypes/link.svg "link")
Paper abstract bibtex The Von Neumann architecture, also known as the Von Neumann model and Princeton architecture, is a computer architecture based on that described in 1945 by the mathematician and physicist John von Neumann and others in the First Draft of a Report on the EDVAC.[1] This describes a design architecture for an electronic digital computer with parts consisting of a processing unit containing an arithmetic logic unit and processor registers, a control unit containing an instruction register and program counter, a memory to store both data and instructions, external mass storage, and input and output mechanisms.[1][2] The meaning has evolved to be any stored-program computer in which an instruction fetch and a data operation cannot occur at the same time because they share a common bus. This is referred to as the Von Neumann bottleneck and often limits the performance of the system.[3]
@misc{noauthor_von_2014,
title = {Von {Neumann} architecture},
copyright = {Creative Commons Attribution-ShareAlike License},
url = {http://en.wikipedia.org/w/index.php?title=Von_Neumann_architecture&oldid=623855849},
abstract = {The Von Neumann architecture, also known as the Von Neumann model and Princeton architecture, is a computer architecture based on that described in 1945 by the mathematician and physicist John von Neumann and others in the First Draft of a Report on the EDVAC.[1] This describes a design architecture for an electronic digital computer with parts consisting of a processing unit containing an arithmetic logic unit and processor registers, a control unit containing an instruction register and program counter, a memory to store both data and instructions, external mass storage, and input and output mechanisms.[1][2] The meaning has evolved to be any stored-program computer in which an instruction fetch and a data operation cannot occur at the same time because they share a common bus. This is referred to as the Von Neumann bottleneck and often limits the performance of the system.[3]},
language = {en},
urldate = {2014-09-24TZ},
journal = {Wikipedia, the free encyclopedia},
month = sep,
year = {2014},
note = {Page Version ID: 623855849}
}
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{"_id":"cexmPgod4h2onfn8H","authorIDs":[],"author_short":null,"bibbaseid":"anonymous-vonneumannarchitecture-2014","bibdata":{"bibtype":"misc","type":"misc","title":"Von Neumann architecture","copyright":"Creative Commons Attribution-ShareAlike License","url":"http://en.wikipedia.org/w/index.php?title=Von_Neumann_architecture&oldid=623855849","abstract":"The Von Neumann architecture, also known as the Von Neumann model and Princeton architecture, is a computer architecture based on that described in 1945 by the mathematician and physicist John von Neumann and others in the First Draft of a Report on the EDVAC.[1] This describes a design architecture for an electronic digital computer with parts consisting of a processing unit containing an arithmetic logic unit and processor registers, a control unit containing an instruction register and program counter, a memory to store both data and instructions, external mass storage, and input and output mechanisms.[1][2] The meaning has evolved to be any stored-program computer in which an instruction fetch and a data operation cannot occur at the same time because they share a common bus. This is referred to as the Von Neumann bottleneck and often limits the performance of the system.[3]","language":"en","urldate":"2014-09-24TZ","journal":"Wikipedia, the free encyclopedia","month":"September","year":"2014","note":"Page Version ID: 623855849","bibtex":"@misc{noauthor_von_2014,\n\ttitle = {Von {Neumann} architecture},\n\tcopyright = {Creative Commons Attribution-ShareAlike License},\n\turl = {http://en.wikipedia.org/w/index.php?title=Von_Neumann_architecture&oldid=623855849},\n\tabstract = {The Von Neumann architecture, also known as the Von Neumann model and Princeton architecture, is a computer architecture based on that described in 1945 by the mathematician and physicist John von Neumann and others in the First Draft of a Report on the EDVAC.[1] This describes a design architecture for an electronic digital computer with parts consisting of a processing unit containing an arithmetic logic unit and processor registers, a control unit containing an instruction register and program counter, a memory to store both data and instructions, external mass storage, and input and output mechanisms.[1][2] The meaning has evolved to be any stored-program computer in which an instruction fetch and a data operation cannot occur at the same time because they share a common bus. This is referred to as the Von Neumann bottleneck and often limits the performance of the system.[3]},\n\tlanguage = {en},\n\turldate = {2014-09-24TZ},\n\tjournal = {Wikipedia, the free encyclopedia},\n\tmonth = sep,\n\tyear = {2014},\n\tnote = {Page Version ID: 623855849}\n}\n\n","key":"noauthor_von_2014","id":"noauthor_von_2014","bibbaseid":"anonymous-vonneumannarchitecture-2014","urls":{"Paper":"http://en.wikipedia.org/w/index.php?title=Von_Neumann_architecture&oldid=623855849"},"downloads":0},"bibtype":"misc","biburl":"http://bibbase.org/zotero/samsonw","creationDate":"2014-09-30T03:58:02.782Z","downloads":0,"keywords":[],"search_terms":["von","neumann","architecture"],"title":"Von Neumann architecture","year":2014,"dataSources":["WfsWNXW7J3LJA5jGM"]}