Architectural Support for Run-Time Validation of Program Data Properties. Arora, D., Ravi, S., Raghunathan, A., & Jha, N. K. IEEE Trans. VLSI Syst., 15(5):546–559, 2007.
Architectural Support for Run-Time Validation of Program Data Properties [link]Paper  doi  bibtex   
@article{DBLP:journals/tvlsi/AroraRRJ07,
  author    = {Divya Arora and
               Srivaths Ravi and
               Anand Raghunathan and
               Niraj K. Jha},
  title     = {Architectural Support for Run-Time Validation of Program Data Properties},
  journal   = {{IEEE} Trans. {VLSI} Syst.},
  volume    = {15},
  number    = {5},
  pages     = {546--559},
  year      = {2007},
  url       = {https://doi.org/10.1109/TVLSI.2007.896913},
  doi       = {10.1109/TVLSI.2007.896913},
  timestamp = {Thu, 18 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/tvlsi/AroraRRJ07},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

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