Architectural Support for Run-Time Validation of Program Data Properties. Arora, D., Ravi, S., Raghunathan, A., & Jha, N. K. IEEE Trans. VLSI Syst., 15(5):546–559, 2007.
Paper doi bibtex @article{DBLP:journals/tvlsi/AroraRRJ07,
author = {Divya Arora and
Srivaths Ravi and
Anand Raghunathan and
Niraj K. Jha},
title = {Architectural Support for Run-Time Validation of Program Data Properties},
journal = {{IEEE} Trans. {VLSI} Syst.},
volume = {15},
number = {5},
pages = {546--559},
year = {2007},
url = {https://doi.org/10.1109/TVLSI.2007.896913},
doi = {10.1109/TVLSI.2007.896913},
timestamp = {Thu, 18 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/bib/journals/tvlsi/AroraRRJ07},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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{"_id":"zJKerJ2oCxbFzySr5","bibbaseid":"arora-ravi-raghunathan-jha-architecturalsupportforruntimevalidationofprogramdataproperties-2007","downloads":0,"creationDate":"2018-06-20T07:11:31.592Z","title":"Architectural Support for Run-Time Validation of Program Data Properties","author_short":["Arora, D.","Ravi, S.","Raghunathan, A.","Jha, N. K."],"year":2007,"bibtype":"article","biburl":"https://dblp.org/pid/74/3747.bib","bibdata":{"bibtype":"article","type":"article","author":[{"firstnames":["Divya"],"propositions":[],"lastnames":["Arora"],"suffixes":[]},{"firstnames":["Srivaths"],"propositions":[],"lastnames":["Ravi"],"suffixes":[]},{"firstnames":["Anand"],"propositions":[],"lastnames":["Raghunathan"],"suffixes":[]},{"firstnames":["Niraj","K."],"propositions":[],"lastnames":["Jha"],"suffixes":[]}],"title":"Architectural Support for Run-Time Validation of Program Data Properties","journal":"IEEE Trans. VLSI Syst.","volume":"15","number":"5","pages":"546–559","year":"2007","url":"https://doi.org/10.1109/TVLSI.2007.896913","doi":"10.1109/TVLSI.2007.896913","timestamp":"Thu, 18 May 2017 01:00:00 +0200","biburl":"https://dblp.org/rec/bib/journals/tvlsi/AroraRRJ07","bibsource":"dblp computer science bibliography, https://dblp.org","bibtex":"@article{DBLP:journals/tvlsi/AroraRRJ07,\n author = {Divya Arora and\n Srivaths Ravi and\n Anand Raghunathan and\n Niraj K. Jha},\n title = {Architectural Support for Run-Time Validation of Program Data Properties},\n journal = {{IEEE} Trans. {VLSI} Syst.},\n volume = {15},\n number = {5},\n pages = {546--559},\n year = {2007},\n url = {https://doi.org/10.1109/TVLSI.2007.896913},\n doi = {10.1109/TVLSI.2007.896913},\n timestamp = {Thu, 18 May 2017 01:00:00 +0200},\n biburl = {https://dblp.org/rec/bib/journals/tvlsi/AroraRRJ07},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n","author_short":["Arora, D.","Ravi, S.","Raghunathan, A.","Jha, N. K."],"key":"DBLP:journals/tvlsi/AroraRRJ07","id":"DBLP:journals/tvlsi/AroraRRJ07","bibbaseid":"arora-ravi-raghunathan-jha-architecturalsupportforruntimevalidationofprogramdataproperties-2007","role":"author","urls":{"Paper":"https://doi.org/10.1109/TVLSI.2007.896913"},"downloads":0},"search_terms":["architectural","support","run","time","validation","program","data","properties","arora","ravi","raghunathan","jha"],"keywords":[],"authorIDs":[],"dataSources":["QATSsZPCAGgNRpLA3"]}