A pipelined architecture for image segmentation by adaptive progressive thresholding. Asari, K. V.; Srikanthan, T.; Kumar, S.; and Radhakrishnan, D. Microprocessors and Microsystems - Embedded Hardware Design, 23(8-9):493-499, 1999.
A pipelined architecture for image segmentation by adaptive progressive thresholding. [link]Link  A pipelined architecture for image segmentation by adaptive progressive thresholding. [link]Paper  bibtex   
@article{journals/mam/AsariSKR99,
  author = {Asari, K. Vijayan and Srikanthan, Thambipillai and Kumar, Sanjiv and Radhakrishnan, D.},
  ee = {http://dx.doi.org/10.1016/S0141-9331(99)00057-5},
  interhash = {4a134857a517170a3d10cea8b2ef6d37},
  intrahash = {bcddb8b2cd27b401684aee7eb49dcd2e},
  journal = {Microprocessors and Microsystems - Embedded Hardware Design},
  number = {8-9},
  pages = {493-499},
  title = {A pipelined architecture for image segmentation by adaptive progressive thresholding.},
  url = {http://dblp.uni-trier.de/db/journals/mam/mam23.html#AsariSKR99},
  volume = 23,
  year = 1999
}
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