@inproceedings{DBLP:conf/hipeac/AshouriBPS16,
  author    = {Amir Hossein Ashouri and
               Andrea Bignoli and
               Gianluca Palermo and
               Cristina Silvano},
  title     = {Predictive modeling methodology for compiler phase-ordering},
  booktitle = {Proceedings of the 7th Workshop on Parallel Programming and Run-Time
               Management Techniques for Many-core Architectures and the 5th Workshop
               on Design Tools and Architectures For Multicore Embedded Computing
               Platforms, {PARMA-DITAM} 2016, Prague, Czech Republic, January 18,
               2016},
  pages     = {7--12},
  year      = {2016},
  crossref  = {DBLP:conf/hipeac/2016parma},
  url       = {https://doi.org/10.1145/2872421.2872424},
  doi       = {10.1145/2872421.2872424},
  timestamp = {Tue, 06 Nov 2018 16:58:21 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/hipeac/AshouriBPS16},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

{"_id":"gArGgpaqo8TKn65hp","bibbaseid":"ashouri-bignoli-palermo-silvano-predictivemodelingmethodologyforcompilerphaseordering-2016","downloads":0,"creationDate":"2018-12-05T22:58:23.346Z","title":"Predictive modeling methodology for compiler phase-ordering","author_short":["Ashouri, A. H.","Bignoli, A.","Palermo, G.","Silvano, C."],"year":2016,"bibtype":"inproceedings","biburl":"https://dblp.org/pid/137/9297.bib","bibdata":{"bibtype":"inproceedings","type":"inproceedings","author":[{"firstnames":["Amir","Hossein"],"propositions":[],"lastnames":["Ashouri"],"suffixes":[]},{"firstnames":["Andrea"],"propositions":[],"lastnames":["Bignoli"],"suffixes":[]},{"firstnames":["Gianluca"],"propositions":[],"lastnames":["Palermo"],"suffixes":[]},{"firstnames":["Cristina"],"propositions":[],"lastnames":["Silvano"],"suffixes":[]}],"title":"Predictive modeling methodology for compiler phase-ordering","booktitle":"Proceedings of the 7th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and the 5th Workshop on Design Tools and Architectures For Multicore Embedded Computing Platforms, PARMA-DITAM 2016, Prague, Czech Republic, January 18, 2016","pages":"7–12","year":"2016","crossref":"DBLP:conf/hipeac/2016parma","url":"https://doi.org/10.1145/2872421.2872424","doi":"10.1145/2872421.2872424","timestamp":"Tue, 06 Nov 2018 16:58:21 +0100","biburl":"https://dblp.org/rec/bib/conf/hipeac/AshouriBPS16","bibsource":"dblp computer science bibliography, https://dblp.org","bibtex":"@inproceedings{DBLP:conf/hipeac/AshouriBPS16,\n author = {Amir Hossein Ashouri and\n Andrea Bignoli and\n Gianluca Palermo and\n Cristina Silvano},\n title = {Predictive modeling methodology for compiler phase-ordering},\n booktitle = {Proceedings of the 7th Workshop on Parallel Programming and Run-Time\n Management Techniques for Many-core Architectures and the 5th Workshop\n on Design Tools and Architectures For Multicore Embedded Computing\n Platforms, {PARMA-DITAM} 2016, Prague, Czech Republic, January 18,\n 2016},\n pages = {7--12},\n year = {2016},\n crossref = {DBLP:conf/hipeac/2016parma},\n url = {https://doi.org/10.1145/2872421.2872424},\n doi = {10.1145/2872421.2872424},\n timestamp = {Tue, 06 Nov 2018 16:58:21 +0100},\n biburl = {https://dblp.org/rec/bib/conf/hipeac/AshouriBPS16},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n","author_short":["Ashouri, A. H.","Bignoli, A.","Palermo, G.","Silvano, C."],"key":"DBLP:conf/hipeac/AshouriBPS16","id":"DBLP:conf/hipeac/AshouriBPS16","bibbaseid":"ashouri-bignoli-palermo-silvano-predictivemodelingmethodologyforcompilerphaseordering-2016","role":"author","urls":{"Paper":"https://doi.org/10.1145/2872421.2872424"},"downloads":0},"search_terms":["predictive","modeling","methodology","compiler","phase","ordering","ashouri","bignoli","palermo","silvano"],"keywords":[],"authorIDs":[],"dataSources":["NDZktRvfYnqhNdnND"]}