A framework for Compiler Level statistical analysis over customized VLIW architecture. Ashouri, A. H., Zaccaria, V., Xydis, S., Palermo, G., & Silvano, C. In 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2013, Istanbul, Turkey, October 7-9, 2013, pages 124–129, 2013.
A framework for Compiler Level statistical analysis over customized VLIW architecture [link]Paper  doi  bibtex   
@inproceedings{DBLP:conf/vlsi/AshouriZXPS13,
  author    = {Amir Hossein Ashouri and
               Vittorio Zaccaria and
               Sotirios Xydis and
               Gianluca Palermo and
               Cristina Silvano},
  title     = {A framework for Compiler Level statistical analysis over customized
               {VLIW} architecture},
  booktitle = {21st {IEEE/IFIP} International Conference on {VLSI} and System-on-Chip,
               VLSI-SoC 2013, Istanbul, Turkey, October 7-9, 2013},
  pages     = {124--129},
  year      = {2013},
  crossref  = {DBLP:conf/vlsi/2013soc},
  url       = {https://doi.org/10.1109/VLSI-SoC.2013.6673262},
  doi       = {10.1109/VLSI-SoC.2013.6673262},
  timestamp = {Fri, 30 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/vlsi/AshouriZXPS13},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

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