Low-cost and area-efficient FPGA implementations of lattice-based cryptography

Low-cost and area-efficient FPGA implementations of lattice-based cryptography. Aysu, A., Patterson, C., & Schaumont, P. In 2013 IEEE International Symposium on Hardware-Oriented Security and Trust, HOST 2013, Austin, TX, USA, June 2-3, 2013, pages 81–86, 2013. IEEE Computer Society.

Paper doi bibtex

@inproceedings{DBLP:conf/host/AysuPS13,
  author       = {Aydin Aysu and
                  Cameron Patterson and
                  Patrick Schaumont},
  title        = {Low-cost and area-efficient {FPGA} implementations of lattice-based
                  cryptography},
  booktitle    = {2013 {IEEE} International Symposium on Hardware-Oriented Security
                  and Trust, {HOST} 2013, Austin, TX, USA, June 2-3, 2013},
  pages        = {81--86},
  publisher    = {{IEEE} Computer Society},
  year         = {2013},
  url          = {https://doi.org/10.1109/HST.2013.6581570},
  doi          = {10.1109/HST.2013.6581570},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/host/AysuPS13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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