Targeting Redundancy In ICs. Bailey, B.
Paper bibtex @Misc{bailey21targeting,
author = {Bailey, Brian},
date = {2021-06},
title = {Targeting Redundancy In ICs},
url = {https://semiengineering.com/redundancy-resiliency-and-robustness/},
comment = {* \#
* basically, it is about redundancy in hardware
* DMR vs. TMR / error detection (only) vs. error correction
* not too relevant to me but contains some interesting information
* IC manufacturing
* there is redundant hardware for dealing with manufacturing defects
* e.g., active extra memory cells if some others don't work
* e.g., deactivate working memory cells and sell as smaller
device if too many memory cells are broken
* reliable chips usually have larger semiconductors
* e.g., 350nm or 180nm in automotive
* ? reliable hardware is less high-tech
* technology developed for specialized purposes gets cheaper over
time and moves to other fields
* e.g., power reduction circuitry
* discussion about repair
* e.g., active spare memory cells
* soft: during runtime, lost at reboot
* hard: persistent across reboots},
groups = {hardware},
journaltitle = {Semiconductor Engineering},
publisher = {Sperling Media Group LLC},
timestamp = {2021-06-15},
}
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