Design tradeoffs for tiled CMP on-chip networks. Balfour, J. D. & Dally, W. J. In Proceedings of International Conference on Supercomputing (ICS), pages 187-198, 2006.
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Paper bibtex
Paper bibtex @inproceedings{ dblp2682733,
title = {Design tradeoffs for tiled CMP on-chip networks},
author = {James D. Balfour and William J. Dally},
author_short = {Balfour, J. D. and Dally, W. J.},
bibtype = {inproceedings},
type = {inproceedings},
year = {2006},
key = {dblp2682733},
id = {dblp2682733},
biburl = {http://www.dblp.org/rec/bibtex/conf/ics/BalfourD06},
url = {http://doi.acm.org/10.1145/1183401.1183430},
conference = {ICS},
pages = {187-198},
text = {ICS 2006:187-198},
booktitle = {Proceedings of International Conference on Supercomputing (ICS)}
}Downloads: 0
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