@inProceedings{
 title = {A 65-nm low power ECG feature extraction system},
 type = {inProceedings},
 year = {2015},
 identifiers = {[object Object]},
 keywords = {ASIC design,ECG signal,QRS detection,T- and P- wave delineation,adaptive technique,hardware implementation,low power},
 volume = {2015-July},
 id = {2afe5f24-8230-380a-813e-bd16f0927647},
 created = {2017-12-04T05:35:04.419Z},
 file_attached = {false},
 profile_id = {99d7e05e-a704-3549-ada2-dfc74a2d55ec},
 last_modified = {2017-12-04T05:35:04.419Z},
 read = {false},
 starred = {false},
 authored = {true},
 confirmed = {false},
 hidden = {false},
 private_publication = {false},
 abstract = {© 2015 IEEE. This paper presents a real-time adaptive ECG detection and delineation algorithm alongside an architecture based on time-domain signal processing of the ECG signal. The algorithm is enhanced to detect large number of different P-QRS-T waveform morphologies using adaptive search windows and adaptive threshold levels. The proposed architecture has been implemented in the state-of-the-art 65-nm CMOS technology. It occupied 0.03416 mm2 area and consumed 0.614 mW power. Furthermore, the non-complex nature of the architecture resulted with a realization using smaller number of computation and higher performance. The design of the QRS detector was tested on ECG records obtained from the Physionet QT database and achieved a sensitivity of Se =99.83% and a positive predictivity of P + = 98.65%. Similarly, the mean error values of the T peak, T offset, P peak and P offset were found to be -1.367, 6.36, 5.5 and -2.59 milliseconds, respectively, using the same database. The small area, low power, and high performance of our architecture makes it suitable for inclusion in System On Chips (SOCs) targeting wearable mobile medical devices.},
 bibtype = {inProceedings},
 author = {Bayasi, N. and Tekeste, T. and Saleh, H. and Mohammad, B. and Ismail, M.},
 booktitle = {Proceedings - IEEE International Symposium on Circuits and Systems}
}

{"_id":"gK3wK6aRd44DHDuQN","bibbaseid":"bayasi-tekeste-saleh-mohammad-ismail-a65nmlowpowerecgfeatureextractionsystem-2015","downloads":0,"creationDate":"2018-11-02T20:16:34.770Z","title":"A 65-nm low power ECG feature extraction system","author_short":["Bayasi, N.","Tekeste, T.","Saleh, H.","Mohammad, B.","Ismail, M."],"year":2015,"bibtype":"inProceedings","biburl":null,"bibdata":{"title":"A 65-nm low power ECG feature extraction system","type":"inProceedings","year":"2015","identifiers":"[object Object]","keywords":"ASIC design,ECG signal,QRS detection,T- and P- wave delineation,adaptive technique,hardware implementation,low power","volume":"2015-July","id":"2afe5f24-8230-380a-813e-bd16f0927647","created":"2017-12-04T05:35:04.419Z","file_attached":false,"profile_id":"99d7e05e-a704-3549-ada2-dfc74a2d55ec","last_modified":"2017-12-04T05:35:04.419Z","read":false,"starred":false,"authored":"true","confirmed":false,"hidden":false,"private_publication":false,"abstract":"© 2015 IEEE. This paper presents a real-time adaptive ECG detection and delineation algorithm alongside an architecture based on time-domain signal processing of the ECG signal. The algorithm is enhanced to detect large number of different P-QRS-T waveform morphologies using adaptive search windows and adaptive threshold levels. The proposed architecture has been implemented in the state-of-the-art 65-nm CMOS technology. It occupied 0.03416 mm2 area and consumed 0.614 mW power. Furthermore, the non-complex nature of the architecture resulted with a realization using smaller number of computation and higher performance. The design of the QRS detector was tested on ECG records obtained from the Physionet QT database and achieved a sensitivity of Se =99.83% and a positive predictivity of P + = 98.65%. Similarly, the mean error values of the T peak, T offset, P peak and P offset were found to be -1.367, 6.36, 5.5 and -2.59 milliseconds, respectively, using the same database. The small area, low power, and high performance of our architecture makes it suitable for inclusion in System On Chips (SOCs) targeting wearable mobile medical devices.","bibtype":"inProceedings","author":"Bayasi, N. and Tekeste, T. and Saleh, H. and Mohammad, B. and Ismail, M.","booktitle":"Proceedings - IEEE International Symposium on Circuits and Systems","bibtex":"@inProceedings{\n title = {A 65-nm low power ECG feature extraction system},\n type = {inProceedings},\n year = {2015},\n identifiers = {[object Object]},\n keywords = {ASIC design,ECG signal,QRS detection,T- and P- wave delineation,adaptive technique,hardware implementation,low power},\n volume = {2015-July},\n id = {2afe5f24-8230-380a-813e-bd16f0927647},\n created = {2017-12-04T05:35:04.419Z},\n file_attached = {false},\n profile_id = {99d7e05e-a704-3549-ada2-dfc74a2d55ec},\n last_modified = {2017-12-04T05:35:04.419Z},\n read = {false},\n starred = {false},\n authored = {true},\n confirmed = {false},\n hidden = {false},\n private_publication = {false},\n abstract = {© 2015 IEEE. This paper presents a real-time adaptive ECG detection and delineation algorithm alongside an architecture based on time-domain signal processing of the ECG signal. The algorithm is enhanced to detect large number of different P-QRS-T waveform morphologies using adaptive search windows and adaptive threshold levels. The proposed architecture has been implemented in the state-of-the-art 65-nm CMOS technology. It occupied 0.03416 mm2 area and consumed 0.614 mW power. Furthermore, the non-complex nature of the architecture resulted with a realization using smaller number of computation and higher performance. The design of the QRS detector was tested on ECG records obtained from the Physionet QT database and achieved a sensitivity of Se =99.83% and a positive predictivity of P + = 98.65%. Similarly, the mean error values of the T peak, T offset, P peak and P offset were found to be -1.367, 6.36, 5.5 and -2.59 milliseconds, respectively, using the same database. The small area, low power, and high performance of our architecture makes it suitable for inclusion in System On Chips (SOCs) targeting wearable mobile medical devices.},\n bibtype = {inProceedings},\n author = {Bayasi, N. and Tekeste, T. and Saleh, H. and Mohammad, B. and Ismail, M.},\n booktitle = {Proceedings - IEEE International Symposium on Circuits and Systems}\n}","author_short":["Bayasi, N.","Tekeste, T.","Saleh, H.","Mohammad, B.","Ismail, M."],"bibbaseid":"bayasi-tekeste-saleh-mohammad-ismail-a65nmlowpowerecgfeatureextractionsystem-2015","role":"author","urls":{},"keyword":["ASIC design","ECG signal","QRS detection","T- and P- wave delineation","adaptive technique","hardware implementation","low power"],"downloads":0,"html":""},"search_terms":["low","power","ecg","feature","extraction","system","bayasi","tekeste","saleh","mohammad","ismail"],"keywords":["asic design","ecg signal","qrs detection","t- and p- wave delineation","adaptive technique","hardware implementation","low power"],"authorIDs":[]}