A framework for macro- and micro-time to model VHDL attributes. Belhadj, M., McConnell, R., & Guernic, P. L. In EURO-DAC, pages 520-525, 1993. IEEE Computer Society.
A framework for macro- and micro-time to model VHDL attributes. [link]Link  A framework for macro- and micro-time to model VHDL attributes. [link]Paper  bibtex   
@inproceedings{conf/eurodac/BelhadjMG93,
  added-at = {2015-11-16T00:00:00.000+0100},
  author = {Belhadj, Mohamed and McConnell, Roderick and Guernic, Paul Le},
  biburl = {http://www.bibsonomy.org/bibtex/2bf6698555cdbeff1ae181c5636bca36c/dblp},
  booktitle = {EURO-DAC},
  crossref = {conf/eurodac/1993},
  ee = {http://dx.doi.org/10.1109/EURDAC.1993.410686},
  interhash = {32fb3adb700e3ea0f9b8b748775ead78},
  intrahash = {bf6698555cdbeff1ae181c5636bca36c},
  isbn = {0-8186-4350-1},
  keywords = {dblp},
  pages = {520-525},
  publisher = {IEEE Computer Society},
  timestamp = {2015-11-17T11:38:23.000+0100},
  title = {A framework for macro- and micro-time to model VHDL attributes.},
  url = {http://dblp.uni-trier.de/db/conf/eurodac/euro-dac1993.html#BelhadjMG93},
  year = 1993
}

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