Ianus: An Adaptive FPGA Computer. Belletti, F., Mantovani, F., Poli, G., Schifano, S. F., Tripiccione, R., Plasencia, I. C., Flor, A. C., Navarro, D., Gaviro, S. P., Sciretti, D., Tarancón, A., Velasco, J. L., Tellez, P., Fernandez, L. A., Martin-Mayor, V., Sudupe, A. M., Jimenez, S., Maiorano, A., Marinari, E., & Ruiz-Lorenzo, J. J. Computing in Science and Engineering, 8(1):41-49, 2006.
Ianus: An Adaptive FPGA Computer. [link]Link  Ianus: An Adaptive FPGA Computer. [link]Paper  bibtex   
@article{journals/cse/BellettiMPSTCFNGSTVTFMSJMMR06,
  added-at = {2019-06-02T00:00:00.000+0200},
  author = {Belletti, Francesco and Mantovani, Filippo and Poli, Giorgio and Schifano, Sebastiano Fabio and Tripiccione, Raffaele and Plasencia, Isabel Campos and Flor, Andres Cruz and Navarro, Denis and Gaviro, Sergio Perez and Sciretti, Daniele and Tarancón, Alfonso and Velasco, Jose Luis and Tellez, Pedro and Fernandez, Luis Antonio and Martin-Mayor, Victor and Sudupe, Antonio Munoz and Jimenez, Sergio and Maiorano, Andrea and Marinari, Enzo and Ruiz-Lorenzo, Juan Jesus},
  biburl = {https://www.bibsonomy.org/bibtex/2e48c5251ba600bcb54c3ee436e8642f9/dblp},
  ee = {https://www.wikidata.org/entity/Q59102550},
  interhash = {f65f61a1e245743b34bd292f2ceb9dfd},
  intrahash = {e48c5251ba600bcb54c3ee436e8642f9},
  journal = {Computing in Science and Engineering},
  keywords = {dblp},
  number = 1,
  pages = {41-49},
  timestamp = {2019-06-04T12:03:23.000+0200},
  title = {Ianus: An Adaptive FPGA Computer.},
  url = {http://dblp.uni-trier.de/db/journals/cse/cse8.html#BellettiMPSTCFNGSTVTFMSJMMR06},
  volume = 8,
  year = 2006
}

Downloads: 0