@inproceedings{DBLP:conf/asap/BertoniBRR06,
  author    = {Guido Bertoni and
               Luca Breveglieri and
               Roberto Farina and
               Francesco Regazzoni},
  title     = {Speeding Up {AES} By Extending a 32 bit Processor Instruction Set},
  booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
               Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
               Springs, Colorado, {USA}},
  pages     = {275--282},
  publisher = {{IEEE} Computer Society},
  year      = {2006},
  url       = {https://doi.org/10.1109/ASAP.2006.62},
  doi       = {10.1109/ASAP.2006.62},
  timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/conf/asap/BertoniBRR06.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

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