Design of a low power, relative timing based asynchronous MSP430 microprocessor. Bhadra, D. & Stevens, K. S. In Design, Automation & Test in Europe Conference & Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017, pages 794–799, 2017.
Paper doi bibtex @inproceedings{DBLP:conf/date/BhadraS17,
author = {Dipanjan Bhadra and
Kenneth S. Stevens},
title = {Design of a low power, relative timing based asynchronous {MSP430}
microprocessor},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2017, Lausanne, Switzerland, March 27-31, 2017},
pages = {794--799},
year = {2017},
crossref = {DBLP:conf/date/2017},
url = {https://doi.org/10.23919/DATE.2017.7927097},
doi = {10.23919/DATE.2017.7927097},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/bib/conf/date/BhadraS17},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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