@INPROCEEDINGS{Bhattacharya12-SSBSE-ThreadAlignment,
   AUTHOR       = {Neelesh Bhattacharya and El Mahi, Olfat and 
      Etienne Duclos and Giovanni Beltrame and Giuliano Antoniol and 
      Le Digabel, S�bastien and Yann-Ga�l Gu�h�neuc},
   BOOKTITLE    = {Proceedings of the 4<sup>th</sup> Symposium on Search Based Software Engineering (SSBSE)},
   TITLE        = {Optimizing Threads Schedule Alignments to Expose the 
      Interference Bug Pattern},
   YEAR         = {2012},
   OPTADDRESS   = {},
   OPTCROSSREF  = {},
   EDITOR       = {Gordon Fraser and de Souza, Jerffeson Teixeira},
   MONTH        = {September},
   NOTE         = {15 pages.},
   OPTNUMBER    = {},
   OPTORGANIZATION = {},
   PAGES        = {90--104},
   PUBLISHER    = {IEEE CS Press},
   OPTSERIES    = {},
   OPTVOLUME    = {},
   KEYWORDS     = {Topic: <b>Test case generation</b>, Venue: <c>SSBSE</c>},
   URL          = {http://www.ptidej.net/publications/documents/SSBSE12b.doc.pdf},
   PDF          = {http://www.ptidej.net/publications/documents/SSBSE12b.ppt.pdf},
   ABSTRACT     = {Managing and controlling interference conditions in 
      multi-threaded programs has been an issue of worry for application 
      developers for a long time. Typically, when write events from two 
      concurrent threads to the same shared variable are not properly 
      protected, an occurrence of the interference bug pattern could be 
      exposed. We propose a mathematical formulation and its resolution to 
      maximize the possibility of exposing occurrences of the interference 
      bug pattern. We formulate and solve the issue as an optimization 
      problem that gives us (1) the optimal position to inject a delay in 
      the execution flow of a thread and (2) the optimal duration for this 
      delay to align at least two different write events in a 
      multi-threaded program. To run the injected threads and calculate the 
      thread execution times for validating the results, we use a virtual 
      platform modelling a perfectly parallel system. All the effects due 
      to the operating system's scheduler or the latencies of hardware 
      components are reduced to zero, exposing only the interactions 
      between threads. To the best of our knowledge, no previous work has 
      formalized the alignment of memory access events to expose 
      occurrences of the interference bug pattern. We use three different 
      algorithms (random, stochastic hill climbing, and simulated 
      annealing) to solve the optimization problem and compare their 
      performance. We carry out experiments on four small synthetic 
      programs and three real-world applications with varying numbers of 
      threads and read/write executions. Our results show that the 
      possibility of exposing interference bug pattern can be significantly 
      enhanced, and that metaheuristics (hill climbing and simulated 
      annealing) provide much better results than a random algorithm.}
}

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Typically, when write events from two concurrent threads to the same shared variable are not properly protected, an occurrence of the interference bug pattern could be exposed. We propose a mathematical formulation and its resolution to maximize the possibility of exposing occurrences of the interference bug pattern. We formulate and solve the issue as an optimization problem that gives us (1) the optimal position to inject a delay in the execution flow of a thread and (2) the optimal duration for this delay to align at least two different write events in a multi-threaded program. To run the injected threads and calculate the thread execution times for validating the results, we use a virtual platform modelling a perfectly parallel system. All the effects due to the operating system's scheduler or the latencies of hardware components are reduced to zero, exposing only the interactions between threads. To the best of our knowledge, no previous work has formalized the alignment of memory access events to expose occurrences of the interference bug pattern. We use three different algorithms (random, stochastic hill climbing, and simulated annealing) to solve the optimization problem and compare their performance. We carry out experiments on four small synthetic programs and three real-world applications with varying numbers of threads and read/write executions. Our results show that the possibility of exposing interference bug pattern can be significantly enhanced, and that metaheuristics (hill climbing and simulated annealing) provide much better results than a random algorithm.","bibtex":"@INPROCEEDINGS{Bhattacharya12-SSBSE-ThreadAlignment,\r\n AUTHOR = {Neelesh Bhattacharya and El Mahi, Olfat and \r\n Etienne Duclos and Giovanni Beltrame and Giuliano Antoniol and \r\n Le Digabel, S�bastien and Yann-Ga�l Gu�h�neuc},\r\n BOOKTITLE = {Proceedings of the 4^th Symposium on Search Based Software Engineering (SSBSE)},\r\n TITLE = {Optimizing Threads Schedule Alignments to Expose the \r\n Interference Bug Pattern},\r\n YEAR = {2012},\r\n OPTADDRESS = {},\r\n OPTCROSSREF = {},\r\n EDITOR = {Gordon Fraser and de Souza, Jerffeson Teixeira},\r\n MONTH = {September},\r\n NOTE = {15 pages.},\r\n OPTNUMBER = {},\r\n OPTORGANIZATION = {},\r\n PAGES = {90--104},\r\n PUBLISHER = {IEEE CS Press},\r\n OPTSERIES = {},\r\n OPTVOLUME = {},\r\n KEYWORDS = {Topic: <b>Test case generation</b>, Venue: <c>SSBSE</c>},\r\n URL = {http://www.ptidej.net/publications/documents/SSBSE12b.doc.pdf},\r\n PDF = {http://www.ptidej.net/publications/documents/SSBSE12b.ppt.pdf},\r\n ABSTRACT = {Managing and controlling interference conditions in \r\n multi-threaded programs has been an issue of worry for application \r\n developers for a long time. Typically, when write events from two \r\n concurrent threads to the same shared variable are not properly \r\n protected, an occurrence of the interference bug pattern could be \r\n exposed. We propose a mathematical formulation and its resolution to \r\n maximize the possibility of exposing occurrences of the interference \r\n bug pattern. We formulate and solve the issue as an optimization \r\n problem that gives us (1) the optimal position to inject a delay in \r\n the execution flow of a thread and (2) the optimal duration for this \r\n delay to align at least two different write events in a \r\n multi-threaded program. To run the injected threads and calculate the \r\n thread execution times for validating the results, we use a virtual \r\n platform modelling a perfectly parallel system. All the effects due \r\n to the operating system's scheduler or the latencies of hardware \r\n components are reduced to zero, exposing only the interactions \r\n between threads. To the best of our knowledge, no previous work has \r\n formalized the alignment of memory access events to expose \r\n occurrences of the interference bug pattern. We use three different \r\n algorithms (random, stochastic hill climbing, and simulated \r\n annealing) to solve the optimization problem and compare their \r\n performance. We carry out experiments on four small synthetic \r\n programs and three real-world applications with varying numbers of \r\n threads and read/write executions. Our results show that the \r\n possibility of exposing interference bug pattern can be significantly \r\n enhanced, and that metaheuristics (hill climbing and simulated \r\n annealing) provide much better results than a random algorithm.}\r\n}\r\n\r\n","author_short":["Bhattacharya, N.","El Mahi, O.","Duclos, E.","Beltrame, G.","Antoniol, G.","Le Digabel, S.","Gu�h�neuc, Y."],"editor_short":["Fraser, G.","de Souza, J. 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