Resource optimization for emulation of behavioral models of mixed signal circuits on FPGA: a case study of DC-DC buck converter. Bhattacharya, R., Kumar, S., & Biswas, S. Int. J. Circuit Theory Appl., 45(11):1701-1741, 2017.
Link
Paper bibtex @article{journals/ijcta/BhattacharyaKB17,
added-at = {2025-03-03T00:00:00.000+0100},
author = {Bhattacharya, Rahul and Kumar, Subindu and Biswas, Santosh},
biburl = {https://www.bibsonomy.org/bibtex/27f14cd6ec75cf51bcd27747ee512b49c/dblp},
ee = {https://doi.org/10.1002/cta.2323},
interhash = {39f314c8d610a4d785bf7827fa6bfbaa},
intrahash = {7f14cd6ec75cf51bcd27747ee512b49c},
journal = {Int. J. Circuit Theory Appl.},
keywords = {dblp},
number = 11,
pages = {1701-1741},
timestamp = {2025-04-01T18:09:13.000+0200},
title = {Resource optimization for emulation of behavioral models of mixed signal circuits on FPGA: a case study of DC-DC buck converter.},
url = {http://dblp.uni-trier.de/db/journals/ijcta/ijcta45.html#BhattacharyaKB17},
volume = 45,
year = 2017
}
Downloads: 0
{"_id":"o6vJpLYWnGfLNak2A","bibbaseid":"bhattacharya-kumar-biswas-resourceoptimizationforemulationofbehavioralmodelsofmixedsignalcircuitsonfpgaacasestudyofdcdcbuckconverter-2017","author_short":["Bhattacharya, R.","Kumar, S.","Biswas, S."],"bibdata":{"bibtype":"article","type":"article","added-at":"2025-03-03T00:00:00.000+0100","author":[{"propositions":[],"lastnames":["Bhattacharya"],"firstnames":["Rahul"],"suffixes":[]},{"propositions":[],"lastnames":["Kumar"],"firstnames":["Subindu"],"suffixes":[]},{"propositions":[],"lastnames":["Biswas"],"firstnames":["Santosh"],"suffixes":[]}],"biburl":"https://www.bibsonomy.org/bibtex/27f14cd6ec75cf51bcd27747ee512b49c/dblp","ee":"https://doi.org/10.1002/cta.2323","interhash":"39f314c8d610a4d785bf7827fa6bfbaa","intrahash":"7f14cd6ec75cf51bcd27747ee512b49c","journal":"Int. J. Circuit Theory Appl.","keywords":"dblp","number":"11","pages":"1701-1741","timestamp":"2025-04-01T18:09:13.000+0200","title":"Resource optimization for emulation of behavioral models of mixed signal circuits on FPGA: a case study of DC-DC buck converter.","url":"http://dblp.uni-trier.de/db/journals/ijcta/ijcta45.html#BhattacharyaKB17","volume":"45","year":"2017","bibtex":"@article{journals/ijcta/BhattacharyaKB17,\n added-at = {2025-03-03T00:00:00.000+0100},\n author = {Bhattacharya, Rahul and Kumar, Subindu and Biswas, Santosh},\n biburl = {https://www.bibsonomy.org/bibtex/27f14cd6ec75cf51bcd27747ee512b49c/dblp},\n ee = {https://doi.org/10.1002/cta.2323},\n interhash = {39f314c8d610a4d785bf7827fa6bfbaa},\n intrahash = {7f14cd6ec75cf51bcd27747ee512b49c},\n journal = {Int. J. Circuit Theory Appl.},\n keywords = {dblp},\n number = 11,\n pages = {1701-1741},\n timestamp = {2025-04-01T18:09:13.000+0200},\n title = {Resource optimization for emulation of behavioral models of mixed signal circuits on FPGA: a case study of DC-DC buck converter.},\n url = {http://dblp.uni-trier.de/db/journals/ijcta/ijcta45.html#BhattacharyaKB17},\n volume = 45,\n year = 2017\n}\n\n","author_short":["Bhattacharya, R.","Kumar, S.","Biswas, S."],"key":"journals/ijcta/BhattacharyaKB17","id":"journals/ijcta/BhattacharyaKB17","bibbaseid":"bhattacharya-kumar-biswas-resourceoptimizationforemulationofbehavioralmodelsofmixedsignalcircuitsonfpgaacasestudyofdcdcbuckconverter-2017","role":"author","urls":{"Link":"https://doi.org/10.1002/cta.2323","Paper":"http://dblp.uni-trier.de/db/journals/ijcta/ijcta45.html#BhattacharyaKB17"},"keyword":["dblp"],"metadata":{"authorlinks":{}},"downloads":0,"html":""},"bibtype":"article","biburl":"http://www.bibsonomy.org/bib/author/rahul ?items=1000","dataSources":["JwYijr7YMA4Gkd5HT"],"keywords":["dblp"],"search_terms":["resource","optimization","emulation","behavioral","models","mixed","signal","circuits","fpga","case","study","buck","converter","bhattacharya","kumar","biswas"],"title":"Resource optimization for emulation of behavioral models of mixed signal circuits on FPGA: a case study of DC-DC buck converter.","year":2017}