{"_id":"af9oHFSyHyYLsoJx3","bibbaseid":"bokhari-javaid-shafique-henkel-parameswaran-supernetmultimodeinterconnectarchitectureformanycorechips-2015","author_short":["Bokhari, H.","Javaid, H.","Shafique, M.","Henkel, J.","Parameswaran, S."],"bibdata":{"bibtype":"inproceedings","type":"inproceedings","author":[{"firstnames":["Haseeb"],"propositions":[],"lastnames":["Bokhari"],"suffixes":[]},{"firstnames":["Haris"],"propositions":[],"lastnames":["Javaid"],"suffixes":[]},{"firstnames":["Muhammad"],"propositions":[],"lastnames":["Shafique"],"suffixes":[]},{"firstnames":["Jörg"],"propositions":[],"lastnames":["Henkel"],"suffixes":[]},{"firstnames":["Sri"],"propositions":[],"lastnames":["Parameswaran"],"suffixes":[]}],"title":"SuperNet: multimode interconnect architecture for manycore chips","booktitle":"Proceedings of the 52nd Annual Design Automation Conference, San Francisco, CA, USA, June 7-11, 2015","pages":"85:1–85:6","publisher":"ACM","year":"2015","url":"https://doi.org/10.1145/2744769.2744912","doi":"10.1145/2744769.2744912","timestamp":"Tue, 29 Dec 2020 00:00:00 +0100","biburl":"https://dblp.org/rec/conf/dac/BokhariJSHP15.bib","bibsource":"dblp computer science bibliography, https://dblp.org","bibtex":"@inproceedings{DBLP:conf/dac/BokhariJSHP15,\n  author    = {Haseeb Bokhari and\n               Haris Javaid and\n               Muhammad Shafique and\n               J{\\\"{o}}rg Henkel and\n               Sri Parameswaran},\n  title     = {SuperNet: multimode interconnect architecture for manycore chips},\n  booktitle = {Proceedings of the 52nd Annual Design Automation Conference, San Francisco,\n               CA, USA, June 7-11, 2015},\n  pages     = {85:1--85:6},\n  publisher = {{ACM}},\n  year      = {2015},\n  url       = {https://doi.org/10.1145/2744769.2744912},\n  doi       = {10.1145/2744769.2744912},\n  timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},\n  biburl    = {https://dblp.org/rec/conf/dac/BokhariJSHP15.bib},\n  bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n","author_short":["Bokhari, H.","Javaid, H.","Shafique, M.","Henkel, J.","Parameswaran, S."],"key":"DBLP:conf/dac/BokhariJSHP15","id":"DBLP:conf/dac/BokhariJSHP15","bibbaseid":"bokhari-javaid-shafique-henkel-parameswaran-supernetmultimodeinterconnectarchitectureformanycorechips-2015","role":"author","urls":{"Paper":"https://doi.org/10.1145/2744769.2744912"},"metadata":{"authorlinks":{}}},"bibtype":"inproceedings","biburl":"https://dblp.org/pid/38/622.bib","dataSources":["zWbzKDC4EZwNR4qnS","rkWLtMBFrgunygLgE"],"keywords":[],"search_terms":["supernet","multimode","interconnect","architecture","manycore","chips","bokhari","javaid","shafique","henkel","parameswaran"],"title":"SuperNet: multimode interconnect architecture for manycore chips","year":2015}