Analyzing Sub-Threshold Bitcell Topologies and the Effects of Assist Methods on SRAM VMIN. Boley, J., Wang, J., & Calhoun, B. H. 2012.
bibtex   
@article{810,
  author = {James Boley and Jiajing Wang and Benton H. Calhoun},
  title = {Analyzing Sub-Threshold Bitcell Topologies and the Effects of Assist Methods on SRAM VMIN},
  year = {2012}
}

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