@Article{boolchandani2011exploring,
  author   = {Boolchandani, D and Sahula, Vineet},
  journal  = {Journal of Design, Analysis and Tools for Integrated Circuits and Systems (JDATICS)},
  title    = {Exploring Efficient Kernel Functions for Support Vector Machine Based Feasibility Models for Analog Circuits},
  year     = {2011},
  number   = {1},
  volume   = {1},
  doi      = {10.1.1.149.656},
  file     = {:C$\backslash$:/Users/Vineet/Documents/Mendeley Desktop/Boolchandani, Sahula - 2011 - Exploring Efficient Kernel Functions for Support Vector Machine Based Feasibility Models for Analog Circui.pdf:pdf},
  isbn     = {9789881701275},
  keywords = {1, analog synthesis, chine, designer such that the, devices are not excessively, eqn, feasibility classification, ge-, into the form of, kernel, large, macromodels, ometry constraint are transformed, support vector ma-},
  url      = {http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.149.656},
}

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