A New Hardware Friendly 2D-DCT HEVC Compliant Algorithm and its High Throughput and Low Power Hardware Design. Braatz, L. A., Beck, A. C. S., Zatt, B., Agostini, L. V., Palomino, D. M., & Porto, M. S. In ICECS, pages 654-657, 2019. IEEE.
A New Hardware Friendly 2D-DCT HEVC Compliant Algorithm and its High Throughput and Low Power Hardware Design. [link]Link  A New Hardware Friendly 2D-DCT HEVC Compliant Algorithm and its High Throughput and Low Power Hardware Design. [link]Paper  bibtex   
@inproceedings{conf/icecsys/BraatzBZAPP19,
  added-at = {2020-09-05T00:00:00.000+0200},
  author = {Braatz, Luciano Almeida and Beck, Antonio Carlos Schneider and Zatt, Bruno and Agostini, Luciano Volcan and Palomino, Daniel Munari and Porto, Marcelo Schiavon},
  biburl = {https://www.bibsonomy.org/bibtex/2690caa65a8111420e2e1cdbdef5652a7/dblp},
  booktitle = {ICECS},
  crossref = {conf/icecsys/2019},
  ee = {https://doi.org/10.1109/ICECS46596.2019.8965063},
  interhash = {e5e1f81fdb63849fb1012ac3a49d8390},
  intrahash = {690caa65a8111420e2e1cdbdef5652a7},
  isbn = {978-1-7281-0996-1},
  keywords = {dblp},
  pages = {654-657},
  publisher = {IEEE},
  timestamp = {2020-09-09T14:54:23.000+0200},
  title = {A New Hardware Friendly 2D-DCT HEVC Compliant Algorithm and its High Throughput and Low Power Hardware Design.},
  url = {http://dblp.uni-trier.de/db/conf/icecsys/icecsys2019.html#BraatzBZAPP19},
  year = 2019
}

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