Dynamic global security-aware synthesis using SystemC. Burns, F., Murphy, J., Shang, D., Koelmans, A., & Yakorlev, A. IET Computers Digital Techniques, 1(4):405–413, July, 2007. doi abstract bibtex A dynamic global security-aware synthesis flow using the SystemC language is presented. SystemC security models are first specified at the system or behavioural level using a library of SystemC behavioural descriptions which provide for the reuse and extension of security modules. At the core of the system is incorporated a global security-aware scheduling algorithm which allows for scheduling to a mixture of components of varying security level. The output from the scheduler is translated into annotated nets which are subsequently passed to allocation, optimisation and mapping tools for mapping into circuits. The synthesised circuits incorporate asynchronous secure power-balanced and fault-protected components. Results show that the approach offers robust implementations and efficient security/area trade-offs leading to significant improvements in turnover.
@article{burns_dynamic_2007,
title = {Dynamic global security-aware synthesis using {SystemC}},
volume = {1},
issn = {1751-8601},
doi = {10.1049/iet-cdt:20060121},
abstract = {A dynamic global security-aware synthesis flow using the SystemC language is presented. SystemC security models are first specified at the system or behavioural level using a library of SystemC behavioural descriptions which provide for the reuse and extension of security modules. At the core of the system is incorporated a global security-aware scheduling algorithm which allows for scheduling to a mixture of components of varying security level. The output from the scheduler is translated into annotated nets which are subsequently passed to allocation, optimisation and mapping tools for mapping into circuits. The synthesised circuits incorporate asynchronous secure power-balanced and fault-protected components. Results show that the approach offers robust implementations and efficient security/area trade-offs leading to significant improvements in turnover.},
number = {4},
journal = {IET Computers Digital Techniques},
author = {Burns, F. and Murphy, J. and Shang, D. and Koelmans, A. and Yakorlev, A.},
month = jul,
year = {2007},
keywords = {\#broken, Jab/\#ICDT, Petri nets, SystemC behavioural description library, SystemC specification language, annotated nets, asynchronous circuits, circuit synthesis, cryptography, dynamic global security-aware synthesis flow, global security-aware scheduling algorithm, hardware description languages, high level synthesis, low-power electronics, scheduling, secure asynchronous crypto-accelerators, software libraries},
pages = {405--413},
}
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