Power-gated MOS current mode logic (PG-MCML): a power aware DPA-resistant standard cell library. Cevrero, A., Regazzoni, F., Schwander, M., Badel, S., Ienne, P., & Leblebici, Y. In Stok, L., Dutt, N. D., & Hassoun, S., editors, Proceedings of the 48th Design Automation Conference, DAC 2011, San Diego, California, USA, June 5-10, 2011, pages 1014–1019, 2011. ACM.
Power-gated MOS current mode logic (PG-MCML): a power aware DPA-resistant standard cell library [link]Paper  doi  bibtex   
@inproceedings{DBLP:conf/dac/CevreroRSBIL11,
  author    = {Alessandro Cevrero and
               Francesco Regazzoni and
               Micheal Schwander and
               St{\'{e}}phane Badel and
               Paolo Ienne and
               Yusuf Leblebici},
  editor    = {Leon Stok and
               Nikil D. Dutt and
               Soha Hassoun},
  title     = {Power-gated {MOS} current mode logic {(PG-MCML):} a power aware DPA-resistant
               standard cell library},
  booktitle = {Proceedings of the 48th Design Automation Conference, {DAC} 2011,
               San Diego, California, USA, June 5-10, 2011},
  pages     = {1014--1019},
  publisher = {{ACM}},
  year      = {2011},
  url       = {https://doi.org/10.1145/2024724.2024947},
  doi       = {10.1145/2024724.2024947},
  timestamp = {Tue, 31 Mar 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/dac/CevreroRSBIL11.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

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