CORDIC-Based High-Speed VLSI Architecture of Transform Model Estimation for Real-Time Imaging. Chakraborty, A. & Banerjee, A. IEEE Trans. Very Large Scale Integr. Syst., 29(1):215–226, 2021.
CORDIC-Based High-Speed VLSI Architecture of Transform Model Estimation for Real-Time Imaging [link]Paper  doi  bibtex   
@article{DBLP:journals/tvlsi/ChakrabortyB21,
  author    = {Anirban Chakraborty and
               Ayan Banerjee},
  title     = {CORDIC-Based High-Speed {VLSI} Architecture of Transform Model Estimation
               for Real-Time Imaging},
  journal   = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume    = {29},
  number    = {1},
  pages     = {215--226},
  year      = {2021},
  url       = {https://doi.org/10.1109/TVLSI.2020.3035514},
  doi       = {10.1109/TVLSI.2020.3035514},
  timestamp = {Thu, 11 Feb 2021 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/journals/tvlsi/ChakrabortyB21.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

Downloads: 0