Considering process variations during system-level power analysis. Chandra, S., Lahiri, K., Raghunathan, A., & Dey, S. In Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006, pages 342–345, 2006. Paper doi bibtex @inproceedings{DBLP:conf/islped/ChandraLRD06,
author = {Saumya Chandra and
Kanishka Lahiri and
Anand Raghunathan and
Sujit Dey},
title = {Considering process variations during system-level power analysis},
booktitle = {Proceedings of the 2006 International Symposium on Low Power Electronics
and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006},
pages = {342--345},
year = {2006},
crossref = {DBLP:conf/islped/2006},
url = {http://doi.acm.org/10.1145/1165573.1165654},
doi = {10.1145/1165573.1165654},
timestamp = {Tue, 23 Jan 2007 08:44:21 +0100},
biburl = {https://dblp.org/rec/bib/conf/islped/ChandraLRD06},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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