{"_id":"oZqXMSztCxXyFZ4bh","bibbaseid":"chang-wen-accurateperformanceevaluationofvlsidesignswithselectedcmosprocessparameters-2018","author_short":["Chang, C. L.","Wen, C. H."],"bibdata":{"bibtype":"article","type":"article","added-at":"2020-09-10T00:00:00.000+0200","author":[{"propositions":[],"lastnames":["Chang"],"firstnames":["Chia-Ling","Lynn"],"suffixes":[]},{"propositions":[],"lastnames":["Wen"],"firstnames":["Charles","H.-P."],"suffixes":[]}],"biburl":"https://www.bibsonomy.org/bibtex/2ef97006e35c511a69daf6fddcbf78abb/dblp","ee":"https://doi.org/10.1049/iet-cds.2017.0097","interhash":"14870dab20e7a81faea552b7c06b66cb","intrahash":"ef97006e35c511a69daf6fddcbf78abb","journal":"IET Circuits Devices Syst.","keywords":"dblp","number":"1","pages":"116-123","timestamp":"2020-09-11T11:44:15.000+0200","title":"Accurate performance evaluation of VLSI designs with selected CMOS process parameters.","url":"http://dblp.uni-trier.de/db/journals/iet-cds/iet-cds12.html#ChangW18","volume":"12","year":"2018","bibtex":"@article{journals/iet-cds/ChangW18,\n added-at = {2020-09-10T00:00:00.000+0200},\n author = {Chang, Chia-Ling Lynn and Wen, Charles H.-P.},\n biburl = {https://www.bibsonomy.org/bibtex/2ef97006e35c511a69daf6fddcbf78abb/dblp},\n ee = {https://doi.org/10.1049/iet-cds.2017.0097},\n interhash = {14870dab20e7a81faea552b7c06b66cb},\n intrahash = {ef97006e35c511a69daf6fddcbf78abb},\n journal = {IET Circuits Devices Syst.},\n keywords = {dblp},\n number = 1,\n pages = {116-123},\n timestamp = {2020-09-11T11:44:15.000+0200},\n title = {Accurate performance evaluation of VLSI designs with selected CMOS process parameters.},\n url = {http://dblp.uni-trier.de/db/journals/iet-cds/iet-cds12.html#ChangW18},\n volume = 12,\n year = 2018\n}\n\n","author_short":["Chang, C. L.","Wen, C. H."],"key":"journals/iet-cds/ChangW18","id":"journals/iet-cds/ChangW18","bibbaseid":"chang-wen-accurateperformanceevaluationofvlsidesignswithselectedcmosprocessparameters-2018","role":"author","urls":{"Link":"https://doi.org/10.1049/iet-cds.2017.0097","Paper":"http://dblp.uni-trier.de/db/journals/iet-cds/iet-cds12.html#ChangW18"},"keyword":["dblp"],"metadata":{"authorlinks":{}}},"bibtype":"article","biburl":"http://www.bibsonomy.org/bib/author/lynn?items=1000","dataSources":["jrmreZGeQB4kJdEkY"],"keywords":["dblp"],"search_terms":["accurate","performance","evaluation","vlsi","designs","selected","cmos","process","parameters","chang","wen"],"title":"Accurate performance evaluation of VLSI designs with selected CMOS process parameters.","year":2018}