Verification and debugging of lc-3 test bench environment using system verilog

Verification and debugging of lc-3 test bench environment using system verilog. Chatterjee, J., Saxena, A., Mehra, A., Vyas, G., & Mukesh, V. In 2018 Second International Conference on Electronics, Communication and Aerospace Technology (ICECA), pages 1253–1258, 2018. IEEE.
bibtex

@inproceedings{chatterjee2018verification,
  title={Verification and debugging of lc-3 test bench environment using system verilog},
  author={Chatterjee, Joyjit and Saxena, Ayush and Mehra, Anu and Vyas, Garima and Mukesh, Vajja},
  booktitle={2018 Second International Conference on Electronics, Communication and Aerospace Technology (ICECA)},
  pages={1253--1258},
  year={2018},
  organization={IEEE}
}

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