RIMAC: An Array-Level ADC/DAC-Free ReRAM-Based in-Memory DNN Processor with Analog Cache and Computation. Chen, P., Wu, M., Ma, Y., Ye, L., & Huang, R. In Proceedings of the 28th Asia and South Pacific Design Automation Conference, pages 228–233, Tokyo Japan, January, 2023. ACM. 0 citations (Semantic Scholar/DOI) [2023-05-05]
RIMAC: An Array-Level ADC/DAC-Free ReRAM-Based in-Memory DNN Processor with Analog Cache and Computation [link]Paper  doi  bibtex   
@inproceedings{chen_rimac_2023,
	address = {Tokyo Japan},
	title = {{RIMAC}: {An} {Array}-{Level} {ADC}/{DAC}-{Free} {ReRAM}-{Based} in-{Memory} {DNN} {Processor} with {Analog} {Cache} and {Computation}},
	isbn = {978-1-4503-9783-4},
	shorttitle = {{RIMAC}},
	url = {https://dl.acm.org/doi/10.1145/3566097.3567860},
	doi = {10.1145/3566097.3567860},
	language = {en},
	urldate = {2023-04-20},
	booktitle = {Proceedings of the 28th {Asia} and {South} {Pacific} {Design} {Automation} {Conference}},
	publisher = {ACM},
	author = {Chen, Peiyu and Wu, Meng and Ma, Yufei and Ye, Le and Huang, Ru},
	month = jan,
	year = {2023},
	note = {0 citations (Semantic Scholar/DOI) [2023-05-05]},
	pages = {228--233},
}

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