A 35-Gb/s 0.65-pJ/b Asymmetric Push-Pull Inverter-Based VCSEL Driver With Series Inductive Peaking in 65-nm CMOS. Choi, H., Hwang, J., Jeong, G., Kim, G., & Jeong, D. IEEE Trans. on Circuits and Systems, 65-II(12):1824-1828, 2018. Link Paper bibtex @article{journals/tcas/ChoiHJKJ18,
added-at = {2018-12-26T00:00:00.000+0100},
author = {Choi, Hong-Seok and Hwang, Jeongho and Jeong, Gyu-Seob and Kim, Gyungock and Jeong, Deog-Kyoon},
biburl = {https://www.bibsonomy.org/bibtex/2e106ab06e6ab66d2ad90b3bd21050c45/dblp},
ee = {https://doi.org/10.1109/TCSII.2018.2870181},
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journal = {IEEE Trans. on Circuits and Systems},
keywords = {dblp},
number = 12,
pages = {1824-1828},
timestamp = {2018-12-28T11:38:33.000+0100},
title = {A 35-Gb/s 0.65-pJ/b Asymmetric Push-Pull Inverter-Based VCSEL Driver With Series Inductive Peaking in 65-nm CMOS.},
url = {http://dblp.uni-trier.de/db/journals/tcas/tcasII65.html#ChoiHJKJ18},
volume = {65-II},
year = 2018
}
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