A 2.22 Gbps high-throughput NB-LDPC decoder in 65nm CMOS with aggressive overlap scheduling. Choi, I. & Kim, J. In ASP-DAC, pages 315-316, 2018. IEEE.
A 2.22 Gbps high-throughput NB-LDPC decoder in 65nm CMOS with aggressive overlap scheduling. [link]Link  A 2.22 Gbps high-throughput NB-LDPC decoder in 65nm CMOS with aggressive overlap scheduling. [link]Paper  bibtex   
@inproceedings{conf/aspdac/ChoiK18,
  added-at = {2018-04-09T00:00:00.000+0200},
  author = {Choi, Injun and Kim, Ji-Hoon},
  biburl = {https://www.bibsonomy.org/bibtex/2a2a3cb1a094bb68001c6a34940762a92/dblp},
  booktitle = {ASP-DAC},
  crossref = {conf/aspdac/2018},
  editor = {Shin, Youngsoo},
  ee = {http://dl.acm.org/citation.cfm?id=3201684},
  interhash = {5de29833ca4b91e0245ba6857e8e0692},
  intrahash = {a2a3cb1a094bb68001c6a34940762a92},
  isbn = {978-1-5090-0602-1},
  keywords = {dblp},
  pages = {315-316},
  publisher = {IEEE},
  timestamp = {2018-04-10T11:37:21.000+0200},
  title = {A 2.22 Gbps high-throughput NB-LDPC decoder in 65nm CMOS with aggressive overlap scheduling.},
  url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2018.html#ChoiK18},
  year = 2018
}

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