Average-Case Optimized Technology Mapping of One-Hot Domino CircuitsAverage-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode Circuits. Chou, W., Beerel, P. A., Ginosar, R., Kol, R., Myers, C. J., Rotem, S., Stevens, K. S., & Yun, K. Y. In 4th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '98), 30 March - 2 April 1998, San Diego, CA, USA, pages 80, 1998. Paper doi bibtex @inproceedings{DBLP:conf/async/ChouBGKMRSY98,
author = {Wei{-}Chun Chou and
Peter A. Beerel and
Ran Ginosar and
Rakefet Kol and
Chris J. Myers and
Shai Rotem and
Ken S. Stevens and
Kenneth Y. Yun},
title = {Average-Case Optimized Technology Mapping of One-Hot Domino CircuitsAverage-Case
Optimized Transistor-Level Technology Mapping of Extended Burst-Mode
Circuits},
booktitle = {4th International Symposium on Advanced Research in Asynchronous Circuits
and Systems {(ASYNC} '98), 30 March - 2 April 1998, San Diego, CA,
{USA}},
pages = {80},
year = {1998},
crossref = {DBLP:conf/async/1998},
url = {https://doi.org/10.1109/ASYNC.1998.666496},
doi = {10.1109/ASYNC.1998.666496},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/bib/conf/async/ChouBGKMRSY98},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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