Hardware efficient recursive VLSI architecture for multilevel lifting 2-D DWT. Darji, A. D., Trivedi, N., Merchant, S. N., & Chandorkar, A. N. In Proceedings of International Symposium on Circuits and Systems (ISCAS), pages 1014-1017, 2012.
Hardware efficient recursive VLSI architecture for multilevel lifting 2-D DWT [link]Paper  bibtex   
@inproceedings{ dblp2432181,
  title = {Hardware efficient recursive VLSI architecture for multilevel lifting 2-D DWT},
  author = {Anand D. Darji and Nisarg Trivedi and S. N. Merchant and Arun N. Chandorkar},
  author_short = {Darji, A. D. and Trivedi, N. and Merchant, S. N. and Chandorkar, A. N.},
  bibtype = {inproceedings},
  type = {inproceedings},
  year = {2012},
  key = {dblp2432181},
  id = {dblp2432181},
  biburl = {http://www.dblp.org/rec/bibtex/conf/iscas/DarjiTMC12},
  url = {http://dx.doi.org/10.1109/ISCAS.2012.6271399},
  conference = {ISCAS},
  pages = {1014-1017},
  text = {ISCAS 2012:1014-1017},
  booktitle = {Proceedings of International Symposium on Circuits and Systems (ISCAS)}
}

Downloads: 0