{"_id":"Pah3eDCWaRSfkTPw9","bibbaseid":"das-unnithan-menon-rebeiro-veezhinathan-shaktimsariscvprocessorformemorysafetyinc-2019","author_short":["Das, S.","Unnithan, R. H.","Menon, A.","Rebeiro, C.","Veezhinathan, K."],"bibdata":{"bibtype":"inproceedings","type":"inproceedings","author":[{"firstnames":["Sourav"],"propositions":[],"lastnames":["Das"],"suffixes":[]},{"firstnames":["R.","Harikrishnan"],"propositions":[],"lastnames":["Unnithan"],"suffixes":[]},{"firstnames":["Arjun"],"propositions":[],"lastnames":["Menon"],"suffixes":[]},{"firstnames":["Chester"],"propositions":[],"lastnames":["Rebeiro"],"suffixes":[]},{"firstnames":["Kamakoti"],"propositions":[],"lastnames":["Veezhinathan"],"suffixes":[]}],"editor":[{"firstnames":["Jian-Jia"],"propositions":[],"lastnames":["Chen"],"suffixes":[]},{"firstnames":["Aviral"],"propositions":[],"lastnames":["Shrivastava"],"suffixes":[]}],"title":"SHAKTI-MS: a RISC-V processor for memory safety in C","booktitle":"Proceedings of the 20th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems, LCTES 2019, Phoenix, AZ, USA, June 23-23, 2019","pages":"19–32","publisher":"ACM","year":"2019","url":"https://doi.org/10.1145/3316482.3326356","doi":"10.1145/3316482.3326356","timestamp":"Thu, 14 Oct 2021 01:00:00 +0200","biburl":"https://dblp.org/rec/conf/lctrts/DasUMRV19.bib","bibsource":"dblp computer science bibliography, https://dblp.org","bibtex":"@inproceedings{DBLP:conf/lctrts/DasUMRV19,\n author = {Sourav Das and\n R. Harikrishnan Unnithan and\n Arjun Menon and\n Chester Rebeiro and\n Kamakoti Veezhinathan},\n editor = {Jian{-}Jia Chen and\n Aviral Shrivastava},\n title = {{SHAKTI-MS:} a {RISC-V} processor for memory safety in {C}},\n booktitle = {Proceedings of the 20th {ACM} {SIGPLAN/SIGBED} International Conference\n on Languages, Compilers, and Tools for Embedded Systems, {LCTES} 2019,\n Phoenix, AZ, USA, June 23-23, 2019},\n pages = {19--32},\n publisher = {{ACM}},\n year = {2019},\n url = {https://doi.org/10.1145/3316482.3326356},\n doi = {10.1145/3316482.3326356},\n timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},\n biburl = {https://dblp.org/rec/conf/lctrts/DasUMRV19.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n","author_short":["Das, S.","Unnithan, R. H.","Menon, A.","Rebeiro, C.","Veezhinathan, K."],"editor_short":["Chen, J.","Shrivastava, A."],"key":"DBLP:conf/lctrts/DasUMRV19","id":"DBLP:conf/lctrts/DasUMRV19","bibbaseid":"das-unnithan-menon-rebeiro-veezhinathan-shaktimsariscvprocessorformemorysafetyinc-2019","role":"author","urls":{"Paper":"https://doi.org/10.1145/3316482.3326356"},"metadata":{"authorlinks":{}}},"bibtype":"inproceedings","biburl":"https://dblp.org/pid/37/4129.bib","dataSources":["6KLtipE4h7YvMqbm4"],"keywords":[],"search_terms":["shakti","risc","processor","memory","safety","das","unnithan","menon","rebeiro","veezhinathan"],"title":"SHAKTI-MS: a RISC-V processor for memory safety in C","year":2019}