1.1 The Deep Learning Revolution and Its Implications for Computer Architecture and Chip Design. Dean, J. In 2020 IEEE International Solid- State Circuits Conference, ISSCC 2020, San Francisco, CA, USA, February 16-20, 2020, pages 8–14, 2020.
1.1 The Deep Learning Revolution and Its Implications for Computer Architecture and Chip Design [link]Paper  doi  bibtex   
@inproceedings{DBLP:conf/isscc/Dean20,
  author    = {Jeffrey Dean},
  title     = {1.1 The Deep Learning Revolution and Its Implications for Computer
               Architecture and Chip Design},
  booktitle = {2020 {IEEE} International Solid- State Circuits Conference, {ISSCC}
               2020, San Francisco, CA, USA, February 16-20, 2020},
  pages     = {8--14},
  year      = {2020},
  crossref  = {DBLP:conf/isscc/2020},
  url       = {https://doi.org/10.1109/ISSCC19947.2020.9063049},
  doi       = {10.1109/ISSCC19947.2020.9063049},
  timestamp = {Sat, 18 Apr 2020 17:41:44 +0200},
  biburl    = {https://dblp.org/rec/conf/isscc/Dean20.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

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