Layout Design of Cascode Current Mirror with Improved Current Mismatch. Dhawan, D., Boolchandani, D., & Sahula, V. In 6th IEEE VLSI Design and Test Workshops, Bangalore, Aug., 2002. Paper bibtex @inproceedings{
title = {Layout Design of Cascode Current Mirror with Improved Current Mismatch},
type = {inproceedings},
year = {2002},
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last_modified = {2017-03-14T01:22:09.162Z},
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bibtype = {inproceedings},
author = {Dhawan, Deepak and Boolchandani, D and Sahula, V},
booktitle = {6th IEEE VLSI Design and Test Workshops, Bangalore, Aug.}
}
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