Satisfiability Models and Algorithms for Circuit Delay Computation

Satisfiability Models and Algorithms for Circuit Delay Computation. e Silva, L. G., Marques-Silva, J., Silveira, L. M., & Sakallah, K. A. In TAU97-ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, pages 57-62, Austin, Texas, December, 1997.
bibtex

@inproceedings{esilva1997satisfiability,
   author = {e Silva, Luis Guerra and Marques-Silva, {J\~oao} and Silveira, Luis Miguel and Sakallah, Karem A.},
   title = {{Satisfiability Models and Algorithms for Circuit Delay Computation}},
   booktitle = {TAU97-ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems},
   address = {Austin, Texas},
   pages = {57-62},
   month = {December},
   year = {1997}
}

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